Commit da8ff2a2 authored by David S. Miller's avatar David S. Miller

Merge branch 'mlxsw-unified-bridge-conversion-part-5'

Ido Schimmel says:

====================
mlxsw: Unified bridge conversion - part 5/6

This is the fifth part of the conversion of mlxsw to the unified bridge
model.

The previous part that was merged in commit d521bc0a ("Merge branch
'mlxsw-unified-bridge-conversion-part-4-6'") converted the flooding code
to use the new APIs of the unified bridge model. As part of this
conversion, the flooding code started accessing the port group table
(PGT) directly in order to allocate MID indexes and configure the ports
via which a packet needs to be replicated.

MDB entries in the device also make use of the PGT table, but the
related code has its own PGT allocator and does not make use of the
common core that was added in the previous patchset. This patchset
converts the MDB code to use the common PGT code.

The first nine patches prepare the MDB code for the conversion that is
performed by the last patch.
====================
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents d640516a e28cd993
...@@ -112,15 +112,6 @@ enum mlxsw_sp_nve_type { ...@@ -112,15 +112,6 @@ enum mlxsw_sp_nve_type {
MLXSW_SP_NVE_TYPE_VXLAN, MLXSW_SP_NVE_TYPE_VXLAN,
}; };
struct mlxsw_sp_mid {
struct list_head list;
unsigned char addr[ETH_ALEN];
u16 fid;
u16 mid;
bool in_hw;
unsigned long *ports_in_mid; /* bits array */
};
struct mlxsw_sp_sb; struct mlxsw_sp_sb;
struct mlxsw_sp_bridge; struct mlxsw_sp_bridge;
struct mlxsw_sp_router; struct mlxsw_sp_router;
...@@ -1485,6 +1476,7 @@ void mlxsw_sp_pgt_mid_free_range(struct mlxsw_sp *mlxsw_sp, u16 mid_base, ...@@ -1485,6 +1476,7 @@ void mlxsw_sp_pgt_mid_free_range(struct mlxsw_sp *mlxsw_sp, u16 mid_base,
u16 count); u16 count);
int mlxsw_sp_pgt_entry_port_set(struct mlxsw_sp *mlxsw_sp, u16 mid, int mlxsw_sp_pgt_entry_port_set(struct mlxsw_sp *mlxsw_sp, u16 mid,
u16 smpe, u16 local_port, bool member); u16 smpe, u16 local_port, bool member);
u16 mlxsw_sp_pgt_index_to_mid(const struct mlxsw_sp *mlxsw_sp, u16 pgt_index);
int mlxsw_sp_pgt_init(struct mlxsw_sp *mlxsw_sp); int mlxsw_sp_pgt_init(struct mlxsw_sp *mlxsw_sp);
void mlxsw_sp_pgt_fini(struct mlxsw_sp *mlxsw_sp); void mlxsw_sp_pgt_fini(struct mlxsw_sp *mlxsw_sp);
......
...@@ -182,6 +182,16 @@ static void mlxsw_sp_pgt_entry_put(struct mlxsw_sp_pgt *pgt, u16 mid) ...@@ -182,6 +182,16 @@ static void mlxsw_sp_pgt_entry_put(struct mlxsw_sp_pgt *pgt, u16 mid)
mlxsw_sp_pgt_entry_destroy(pgt, pgt_entry); mlxsw_sp_pgt_entry_destroy(pgt, pgt_entry);
} }
#define MLXSW_SP_FID_PGT_FLOOD_ENTRIES 15354 /* Reserved for flooding. */
u16 mlxsw_sp_pgt_index_to_mid(const struct mlxsw_sp *mlxsw_sp, u16 pgt_index)
{
if (mlxsw_sp->ubridge)
return pgt_index;
return pgt_index - MLXSW_SP_FID_PGT_FLOOD_ENTRIES;
}
static void mlxsw_sp_pgt_smid2_port_set(char *smid2_pl, u16 local_port, static void mlxsw_sp_pgt_smid2_port_set(char *smid2_pl, u16 local_port,
bool member) bool member)
{ {
...@@ -196,7 +206,7 @@ mlxsw_sp_pgt_entry_port_write(struct mlxsw_sp *mlxsw_sp, ...@@ -196,7 +206,7 @@ mlxsw_sp_pgt_entry_port_write(struct mlxsw_sp *mlxsw_sp,
{ {
bool smpe_index_valid; bool smpe_index_valid;
char *smid2_pl; char *smid2_pl;
u16 smpe; u16 smpe, mid;
int err; int err;
smid2_pl = kmalloc(MLXSW_REG_SMID2_LEN, GFP_KERNEL); smid2_pl = kmalloc(MLXSW_REG_SMID2_LEN, GFP_KERNEL);
...@@ -206,9 +216,9 @@ mlxsw_sp_pgt_entry_port_write(struct mlxsw_sp *mlxsw_sp, ...@@ -206,9 +216,9 @@ mlxsw_sp_pgt_entry_port_write(struct mlxsw_sp *mlxsw_sp,
smpe_index_valid = mlxsw_sp->ubridge ? mlxsw_sp->pgt->smpe_index_valid : smpe_index_valid = mlxsw_sp->ubridge ? mlxsw_sp->pgt->smpe_index_valid :
false; false;
smpe = mlxsw_sp->ubridge ? pgt_entry->smpe_index : 0; smpe = mlxsw_sp->ubridge ? pgt_entry->smpe_index : 0;
mid = mlxsw_sp_pgt_index_to_mid(mlxsw_sp, pgt_entry->index);
mlxsw_reg_smid2_pack(smid2_pl, pgt_entry->index, 0, 0, smpe_index_valid, mlxsw_reg_smid2_pack(smid2_pl, mid, 0, 0, smpe_index_valid, smpe);
smpe);
mlxsw_sp_pgt_smid2_port_set(smid2_pl, local_port, member); mlxsw_sp_pgt_smid2_port_set(smid2_pl, local_port, member);
err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(smid2), smid2_pl); err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(smid2), smid2_pl);
......
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