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Commit e0ff30b2 authored by Joseph S. Barrera III's avatar Joseph S. Barrera III Committed by Bjorn Andersson
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arm64: dts: qcom: sc7180: Add wormdingler dts files 

Wormdingler is a trogdor-based board, shipping to customers as the
Lenovo IdeaPad Chromebook Duet 3. These dts files are copies from
the downstream Chrome OS 5.4 kernel, but with the camera
(sc7180-trogdor-mipi-camera.dtsi) #include removed.
Signed-off-by: default avatarJoseph S. Barrera III <joebar@chromium.org>
Reviewed-by: default avatarDouglas Anderson <dianders@chromium.org>
Tested-by: default avatarDouglas Anderson <dianders@chromium.org>
Signed-off-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220625183538.v14.1.Id769ddc5dbf570ccb511db96da59f97d08f75a9c@changeid
parent 9c54f171
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arch/arm64/boot/dts/qcom/Makefile
View file @ e0ff30b2
......@@ -79,6 +79,12 @@ dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-pompom-r2.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-pompom-r2-lte.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-pompom-r3.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-pompom-r3-lte.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-wormdingler-rev0-boe.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-wormdingler-rev0-inx.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-wormdingler-rev1-boe.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-wormdingler-rev1-inx.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-wormdingler-rev1-inx-rt5682s.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-wormdingler-rev1-boe-rt5682s.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-r1.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-r1-lte.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7280-herobrine-crd.dtb
......
arch/arm64/boot/dts/qcom/sc7180-trogdor-wormdingler-rev0-boe.dts 0 → 100644
View file @ e0ff30b2
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Google Wormdingler board device tree source
*
* Copyright 2021 Google LLC.
*
* SKU: 0x10 => 16
* - bits 7..4: Panel ID: 0x1 (BOE)
*/
/dts-v1/;
#include "sc7180-trogdor-wormdingler-rev0.dtsi"
/ {
model = "Google Wormdingler rev0 BOE panel board";
compatible = "google,wormdingler-rev0-sku16", "qcom,sc7180";
};
&panel {
compatible = "boe,tv110c9m-ll3";
};
arch/arm64/boot/dts/qcom/sc7180-trogdor-wormdingler-rev0-inx.dts 0 → 100644
View file @ e0ff30b2
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Google Wormdingler board device tree source
*
* Copyright 2021 Google LLC.
*
* SKU: 0x0 => 0
* - bits 7..4: Panel ID: 0x0 (INX)
*/
/dts-v1/;
#include "sc7180-trogdor-wormdingler-rev0.dtsi"
/ {
model = "Google Wormdingler rev0 INX panel board";
compatible = "google,wormdingler-rev0-sku0", "qcom,sc7180";
};
&panel {
compatible = "innolux,hj110iz-01a";
};
arch/arm64/boot/dts/qcom/sc7180-trogdor-wormdingler-rev0.dtsi 0 → 100644
View file @ e0ff30b2
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Google Wormdingler board device tree source
*
* Copyright 2021 Google LLC.
*
*/
/dts-v1/;
#include "sc7180-trogdor-wormdingler.dtsi"
&avdd_lcd {
gpio = <&tlmm 80 GPIO_ACTIVE_HIGH>;
};
&panel {
enable-gpios = <&tlmm 76 GPIO_ACTIVE_HIGH>;
};
&v1p8_mipi {
gpio = <&tlmm 81 GPIO_ACTIVE_HIGH>;
};
/* PINCTRL - modifications to sc7180-trogdor-wormdingler.dtsi */
&avdd_lcd_en {
pinmux {
pins = "gpio80";
};
pinconf {
pins = "gpio80";
};
};
&mipi_1800_en {
pinmux {
pins = "gpio81";
};
pinconf {
pins = "gpio81";
};
};
&vdd_reset_1800 {
pinmux {
pins = "gpio76";
};
pinconf {
pins = "gpio76";
};
};
arch/arm64/boot/dts/qcom/sc7180-trogdor-wormdingler-rev1-boe-rt5682s.dts 0 → 100644
View file @ e0ff30b2
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Google Wormdingler board device tree source
*
* Copyright 2021 Google LLC.
*
* SKU: 0x401 => 1025
* - bits 11..8: Panel ID: 0x4 (BOE)
*/
/dts-v1/;
#include "sc7180-trogdor-wormdingler-rev1-boe.dts"
/ {
model = "Google Wormdingler rev1+ (BOE, rt5682s)";
compatible = "google,wormdingler-sku1025", "qcom,sc7180";
};
&alc5682 {
compatible = "realtek,rt5682s";
realtek,dmic1-clk-pin = <2>;
realtek,dmic-clk-rate-hz = <2048000>;
};
&sound {
compatible = "google,sc7180-trogdor";
model = "sc7180-rt5682s-max98357a-1mic";
};
arch/arm64/boot/dts/qcom/sc7180-trogdor-wormdingler-rev1-boe.dts 0 → 100644
View file @ e0ff30b2
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Google Wormdingler board device tree source
*
* Copyright 2021 Google LLC.
*
* SKU: 0x400 => 1024
* - bits 11..8: Panel ID: 0x4 (BOE)
*/
/dts-v1/;
#include "sc7180-trogdor-wormdingler.dtsi"
/ {
model = "Google Wormdingler rev1+ BOE panel board";
compatible = "google,wormdingler-sku1024", "qcom,sc7180";
};
&dsi_phy {
qcom,phy-rescode-offset-top = /bits/ 8 <31 31 31 31 (-32)>;
qcom,phy-rescode-offset-bot = /bits/ 8 <31 31 31 31 (-32)>;
qcom,phy-drive-ldo-level = <450>;
};
&panel {
compatible = "boe,tv110c9m-ll3";
};
arch/arm64/boot/dts/qcom/sc7180-trogdor-wormdingler-rev1-inx-rt5682s.dts 0 → 100644
View file @ e0ff30b2
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Google Wormdingler board device tree source
*
* Copyright 2021 Google LLC.
*
* SKU: 0x0001 => 1
* - bits 11..8: Panel ID: 0x0 (INX)
*/
/dts-v1/;
#include "sc7180-trogdor-wormdingler-rev1-inx.dts"
/ {
model = "Google Wormdingler rev1+ (INX, rt5682s)";
compatible = "google,wormdingler-sku1", "qcom,sc7180";
};
&alc5682 {
compatible = "realtek,rt5682s";
realtek,dmic1-clk-pin = <2>;
realtek,dmic-clk-rate-hz = <2048000>;
};
&sound {
compatible = "google,sc7180-trogdor";
model = "sc7180-rt5682s-max98357a-1mic";
};
arch/arm64/boot/dts/qcom/sc7180-trogdor-wormdingler-rev1-inx.dts 0 → 100644
View file @ e0ff30b2
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Google Wormdingler board device tree source
*
* Copyright 2021 Google LLC.
*
* SKU: 0x0000 => 0
* - bits 11..8: Panel ID: 0x0 (INX)
*/
/dts-v1/;
#include "sc7180-trogdor-wormdingler.dtsi"
/ {
model = "Google Wormdingler rev1+ INX panel board";
compatible = "google,wormdingler-sku0", "qcom,sc7180";
};
&panel {
compatible = "innolux,hj110iz-01a";
};
arch/arm64/boot/dts/qcom/sc7180-trogdor-wormdingler.dtsi 0 → 100644
View file @ e0ff30b2
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Google Wormdingler board device tree source
*
* Copyright 2021 Google LLC.
*/
/dts-v1/;
#include "sc7180-trogdor.dtsi"
/ {
avdd_lcd: avdd-lcd {
compatible = "regulator-fixed";
regulator-name = "avdd_lcd";
gpio = <&tlmm 88 GPIO_ACTIVE_HIGH>;
enable-active-high;
pinctrl-names = "default";
pinctrl-0 = <&avdd_lcd_en>;
vin-supply = <&pp5000_a>;
};
avee_lcd: avee-lcd {
compatible = "regulator-fixed";
regulator-name = "avee_lcd";
gpio = <&tlmm 21 GPIO_ACTIVE_HIGH>;
enable-active-high;
pinctrl-names = "default";
pinctrl-0 = <&avee_lcd_en>;
vin-supply = <&pp5000_a>;
};
pp1800_ts:
v1p8_mipi: v1p8-mipi {
compatible = "regulator-fixed";
regulator-name = "v1p8_mipi";
gpio = <&tlmm 86 GPIO_ACTIVE_HIGH>;
enable-active-high;
pinctrl-names = "default";
pinctrl-0 = <&mipi_1800_en>;
vin-supply = <&pp3300_a>;
};
thermal-zones {
skin_temp_thermal: skin-temp-thermal {
polling-delay-passive = <250>;
polling-delay = <0>;
thermal-sensors = <&pm6150_adc_tm 1>;
sustainable-power = <574>;
trips {
skin_temp_alert0: trip-point0 {
temperature = <58000>;
hysteresis = <1000>;
type = "passive";
};
skin_temp_alert1: trip-point1 {
temperature = <62500>;
hysteresis = <1000>;
type = "passive";
};
skin-temp-crit {
temperature = <68000>;
hysteresis = <1000>;
type = "critical";
};
};
cooling-maps {
map0 {
trip = <&skin_temp_alert0>;
cooling-device = <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
map1 {
trip = <&skin_temp_alert1>;
cooling-device = <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
};
};
};
};
&backlight {
pwms = <&cros_ec_pwm 0>;
};
&camcc {
status = "okay";
};
&cros_ec {
base_detection: cbas {
compatible = "google,cros-cbas";
};
};
&dsi0 {
panel: panel@0 {
reg = <0>;
enable-gpios = <&tlmm 87 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&vdd_reset_1800>;
avdd-supply = <&avdd_lcd>;
avee-supply = <&avee_lcd>;
pp1800-supply = <&v1p8_mipi>;
pp3300-supply = <&pp3300_dx_edp>;
backlight = <&backlight>;
rotation = <270>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
panel_in: endpoint {
remote-endpoint = <&dsi0_out>;
};
};
};
};
ports {
port@1 {
endpoint {
remote-endpoint = <&panel_in>;
data-lanes = <0 1 2 3>;
};
};
};
};
&i2c4 {
status = "okay";
clock-frequency = <400000>;
ap_ts: touchscreen@1 {
compatible = "hid-over-i2c";
reg = <0x01>;
pinctrl-names = "default";
pinctrl-0 = <&ts_int_l>;
interrupt-parent = <&tlmm>;
interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
post-power-on-delay-ms = <70>;
hid-descr-addr = <0x0001>;
vdd-supply = <&pp3300_ts>;
vddl-supply = <&pp1800_ts>;
};
};
&pm6150_adc {
skin-temp-thermistor@4d {
reg = <ADC5_AMUX_THM1_100K_PU>;
qcom,ratiometric;
qcom,hw-settle-time = <200>;
};
};
&pm6150_adc_tm {
status = "okay";
skin-temp-thermistor@1 {
reg = <1>;
io-channels = <&pm6150_adc ADC5_AMUX_THM1_100K_PU>;
qcom,ratiometric;
qcom,hw-settle-time-us = <200>;
};
};
&pp1800_uf_cam {
status = "okay";
};
&pp1800_wf_cam {
status = "okay";
};
&pp2800_uf_cam {
status = "okay";
};
&pp2800_wf_cam {
status = "okay";
};
&wifi {
qcom,ath10k-calibration-variant = "GO_WORMDINGLER";
};
/*
* No eDP on this board but it's logically the same signal so just give it
* a new name and assign the proper GPIO.
*/
pp3300_disp_on: &pp3300_dx_edp {
gpio = <&tlmm 85 GPIO_ACTIVE_HIGH>;
};
/* PINCTRL - modifications to sc7180-trogdor.dtsi */
/*
* No eDP on this board but it's logically the same signal so just give it
* a new name and assign the proper GPIO.
*/
tp_en: &en_pp3300_dx_edp {
pinmux {
pins = "gpio85";
};
pinconf {
pins = "gpio85";
};
};
/* PINCTRL - board-specific pinctrl */
&tlmm {
gpio-line-names = "HUB_RST_L",
"AP_RAM_ID0",
"AP_SKU_ID2",
"AP_RAM_ID1",
"",
"AP_RAM_ID2",
"UF_CAM_EN",
"WF_CAM_EN",
"TS_RESET_L",
"TS_INT_L",
"",
"",
"AP_EDP_BKLTEN",
"UF_CAM_MCLK",
"WF_CAM_CLK",
"",
"",
"UF_CAM_SDA",
"UF_CAM_SCL",
"WF_CAM_SDA",
"WF_CAM_SCL",
"AVEE_LCD_EN",
"",
"AMP_EN",
"",
"",
"",
"",
"HP_IRQ",
"WF_CAM_RST_L",
"UF_CAM_RST_L",
"AP_BRD_ID2",
"",
"AP_BRD_ID0",
"AP_H1_SPI_MISO",
"AP_H1_SPI_MOSI",
"AP_H1_SPI_CLK",
"AP_H1_SPI_CS_L",
"BT_UART_CTS",
"BT_UART_RTS",
"BT_UART_TXD",
"BT_UART_RXD",
"H1_AP_INT_ODL",
"",
"UART_AP_TX_DBG_RX",
"UART_DBG_TX_AP_RX",
"HP_I2C_SDA",
"HP_I2C_SCL",
"FORCED_USB_BOOT",
"AMP_BCLK",
"AMP_LRCLK",
"AMP_DIN",
"",
"HP_BCLK",
"HP_LRCLK",
"HP_DOUT",
"HP_DIN",
"HP_MCLK",
"AP_SKU_ID0",
"AP_EC_SPI_MISO",
"AP_EC_SPI_MOSI",
"AP_EC_SPI_CLK",
"AP_EC_SPI_CS_L",
"AP_SPI_CLK",
"AP_SPI_MOSI",
"AP_SPI_MISO",
/*
* AP_FLASH_WP_L is crossystem ABI. Schematics
* call it BIOS_FLASH_WP_L.
*/
"AP_FLASH_WP_L",
"",
"AP_SPI_CS0_L",
"",
"",
"",
"",
"WLAN_SW_CTRL",
"",
"REPORT_E",
"",
"ID0",
"",
"ID1",
"",
"",
"",
"CODEC_PWR_EN",
"HUB_EN",
"TP_EN",
"MIPI_1.8V_EN",
"VDD_RESET_1.8V",
"AVDD_LCD_EN",
"",
"AP_SKU_ID1",
"AP_RST_REQ",
"",
"AP_BRD_ID1",
"AP_EC_INT_L",
"SDM_GRFC_3",
"",
"",
"BOOT_CONFIG_4",
"BOOT_CONFIG_2",
"",
"",
"",
"",
"",
"",
"",
"BOOT_CONFIG_3",
"WCI2_LTE_COEX_TXD",
"WCI2_LTE_COEX_RXD",
"",
"",
"",
"",
"FORCED_USB_BOOT_POL",
"AP_TS_PEN_I2C_SDA",
"AP_TS_PEN_I2C_SCL",
"DP_HOT_PLUG_DET",
"EC_IN_RW_ODL";
avdd_lcd_en: avdd-lcd-en {
pinmux {
pins = "gpio88";
function = "gpio";
};
pinconf {
pins = "gpio88";
drive-strength = <2>;
bias-disable;
};
};
avee_lcd_en: avee-lcd-en {
pinmux {
pins = "gpio21";
function = "gpio";
};
pinconf {
pins = "gpio21";
drive-strength = <2>;
bias-disable;
};
};
mipi_1800_en: mipi-1800-en {
pinmux {
pins = "gpio86";
function = "gpio";
};
pinconf {
pins = "gpio86";
drive-strength = <2>;
bias-disable;
};
};
vdd_reset_1800: vdd-reset-1800 {
pinmux {
pins = "gpio87";
function = "gpio";
};
pinconf {
pins = "gpio87";
drive-strength = <2>;
bias-disable;
};
};
};
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