Commit e17e237c authored by Chen-Yu Tsai's avatar Chen-Yu Tsai Committed by Maxime Ripard

ARM: dts: sunxi: Convert to CCU index macros for HDMI controller

When the HDMI controller device node was added, the needed PLL clock
macros were not exported. A separate patch addresses that, but it is
merged through a different tree.

Now that both patches are in mainline proper, we can convert the raw
numbers to proper macros.
Signed-off-by: default avatarChen-Yu Tsai <wens@csie.org>
Signed-off-by: default avatarMaxime Ripard <maxime.ripard@free-electrons.com>
parent e2bf801e
...@@ -502,8 +502,8 @@ hdmi: hdmi@1c16000 { ...@@ -502,8 +502,8 @@ hdmi: hdmi@1c16000 {
reg = <0x01c16000 0x1000>; reg = <0x01c16000 0x1000>;
interrupts = <58>; interrupts = <58>;
clocks = <&ccu CLK_AHB_HDMI0>, <&ccu CLK_HDMI>, clocks = <&ccu CLK_AHB_HDMI0>, <&ccu CLK_HDMI>,
<&ccu 9>, <&ccu CLK_PLL_VIDEO0_2X>,
<&ccu 18>; <&ccu CLK_PLL_VIDEO1_2X>;
clock-names = "ahb", "mod", "pll-0", "pll-1"; clock-names = "ahb", "mod", "pll-0", "pll-1";
dmas = <&dma SUN4I_DMA_NORMAL 16>, dmas = <&dma SUN4I_DMA_NORMAL 16>,
<&dma SUN4I_DMA_NORMAL 16>, <&dma SUN4I_DMA_NORMAL 16>,
......
...@@ -82,8 +82,8 @@ hdmi: hdmi@1c16000 { ...@@ -82,8 +82,8 @@ hdmi: hdmi@1c16000 {
reg = <0x01c16000 0x1000>; reg = <0x01c16000 0x1000>;
interrupts = <58>; interrupts = <58>;
clocks = <&ccu CLK_AHB_HDMI>, <&ccu CLK_HDMI>, clocks = <&ccu CLK_AHB_HDMI>, <&ccu CLK_HDMI>,
<&ccu 9>, <&ccu CLK_PLL_VIDEO0_2X>,
<&ccu 16>; <&ccu CLK_PLL_VIDEO1_2X>;
clock-names = "ahb", "mod", "pll-0", "pll-1"; clock-names = "ahb", "mod", "pll-0", "pll-1";
dmas = <&dma SUN4I_DMA_NORMAL 16>, dmas = <&dma SUN4I_DMA_NORMAL 16>,
<&dma SUN4I_DMA_NORMAL 16>, <&dma SUN4I_DMA_NORMAL 16>,
......
...@@ -429,8 +429,8 @@ hdmi: hdmi@1c16000 { ...@@ -429,8 +429,8 @@ hdmi: hdmi@1c16000 {
interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_AHB1_HDMI>, <&ccu CLK_HDMI>, clocks = <&ccu CLK_AHB1_HDMI>, <&ccu CLK_HDMI>,
<&ccu CLK_HDMI_DDC>, <&ccu CLK_HDMI_DDC>,
<&ccu 7>, <&ccu CLK_PLL_VIDEO0_2X>,
<&ccu 13>; <&ccu CLK_PLL_VIDEO1_2X>;
clock-names = "ahb", "mod", "ddc", "pll-0", "pll-1"; clock-names = "ahb", "mod", "ddc", "pll-0", "pll-1";
resets = <&ccu RST_AHB1_HDMI>; resets = <&ccu RST_AHB1_HDMI>;
reset-names = "ahb"; reset-names = "ahb";
......
...@@ -581,8 +581,8 @@ hdmi: hdmi@1c16000 { ...@@ -581,8 +581,8 @@ hdmi: hdmi@1c16000 {
reg = <0x01c16000 0x1000>; reg = <0x01c16000 0x1000>;
interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_AHB_HDMI0>, <&ccu CLK_HDMI>, clocks = <&ccu CLK_AHB_HDMI0>, <&ccu CLK_HDMI>,
<&ccu 9>, <&ccu CLK_PLL_VIDEO0_2X>,
<&ccu 18>; <&ccu CLK_PLL_VIDEO1_2X>;
clock-names = "ahb", "mod", "pll-0", "pll-1"; clock-names = "ahb", "mod", "pll-0", "pll-1";
dmas = <&dma SUN4I_DMA_NORMAL 16>, dmas = <&dma SUN4I_DMA_NORMAL 16>,
<&dma SUN4I_DMA_NORMAL 16>, <&dma SUN4I_DMA_NORMAL 16>,
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment