Commit e486781b authored by AngeloGioacchino Del Regno's avatar AngeloGioacchino Del Regno Committed by Mauro Carvalho Chehab

media: camss: csiphy-3ph: Add support for SDM630/660

The CSIPHY on SDM630/660 needs a slightly longer T_HS_CLK_MISS
configuration on lanes CFG4.
Signed-off-by: default avatarAngeloGioacchino Del Regno <kholk11@gmail.com>
Reviewed-by: default avatarRobert Foss <robert.foss@linaro.org>
Signed-off-by: default avatarHans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: default avatarMauro Carvalho Chehab <mchehab+huawei@kernel.org>
parent 9e5d1581
...@@ -8,6 +8,7 @@ ...@@ -8,6 +8,7 @@
* Copyright (C) 2016-2018 Linaro Ltd. * Copyright (C) 2016-2018 Linaro Ltd.
*/ */
#include "camss.h"
#include "camss-csiphy.h" #include "camss-csiphy.h"
#include <linux/delay.h> #include <linux/delay.h>
...@@ -21,6 +22,7 @@ ...@@ -21,6 +22,7 @@
#define CSIPHY_3PH_LNn_CFG3(n) (0x008 + 0x100 * (n)) #define CSIPHY_3PH_LNn_CFG3(n) (0x008 + 0x100 * (n))
#define CSIPHY_3PH_LNn_CFG4(n) (0x00c + 0x100 * (n)) #define CSIPHY_3PH_LNn_CFG4(n) (0x00c + 0x100 * (n))
#define CSIPHY_3PH_LNn_CFG4_T_HS_CLK_MISS 0xa4 #define CSIPHY_3PH_LNn_CFG4_T_HS_CLK_MISS 0xa4
#define CSIPHY_3PH_LNn_CFG4_T_HS_CLK_MISS_660 0xa5
#define CSIPHY_3PH_LNn_CFG5(n) (0x010 + 0x100 * (n)) #define CSIPHY_3PH_LNn_CFG5(n) (0x010 + 0x100 * (n))
#define CSIPHY_3PH_LNn_CFG5_T_HS_DTERM 0x02 #define CSIPHY_3PH_LNn_CFG5_T_HS_DTERM 0x02
#define CSIPHY_3PH_LNn_CFG5_HS_REC_EQ_FQ_INT 0x50 #define CSIPHY_3PH_LNn_CFG5_HS_REC_EQ_FQ_INT 0x50
...@@ -198,6 +200,9 @@ static void csiphy_lanes_enable(struct csiphy_device *csiphy, ...@@ -198,6 +200,9 @@ static void csiphy_lanes_enable(struct csiphy_device *csiphy,
val = CSIPHY_3PH_LNn_CFG1_SWI_REC_DLY_PRG; val = CSIPHY_3PH_LNn_CFG1_SWI_REC_DLY_PRG;
writel_relaxed(val, csiphy->base + CSIPHY_3PH_LNn_CFG1(l)); writel_relaxed(val, csiphy->base + CSIPHY_3PH_LNn_CFG1(l));
if (csiphy->camss->version == CAMSS_660)
val = CSIPHY_3PH_LNn_CFG4_T_HS_CLK_MISS_660;
else
val = CSIPHY_3PH_LNn_CFG4_T_HS_CLK_MISS; val = CSIPHY_3PH_LNn_CFG4_T_HS_CLK_MISS;
writel_relaxed(val, csiphy->base + CSIPHY_3PH_LNn_CFG4(l)); writel_relaxed(val, csiphy->base + CSIPHY_3PH_LNn_CFG4(l));
......
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