Commit ed1666f6 authored by Pi-Hsun Shih's avatar Pi-Hsun Shih Committed by Mark Brown

ASoC: mediatek: Fix UBSAN warning.

In sound/soc/mediatek/common/mtk-afe-fe-dai.c, when xxx_reg is -1, it's
a no-op to call mtk_regmap_update_bits, but since both xxx_reg and
xxx_shift are set to -1, the (1 << xxx_shift) in the argument would
trigger a UBSAN warning.

Fix the warning by setting those xxx_shift to 0 instead.

Note that since the code explicitly checks .mono_shift >= 0 and
.fs_shift >= 0 before using them in '<<' operator, those two members are
not set to 0.
Signed-off-by: default avatarPi-Hsun Shih <pihsun@chromium.org>
Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent 4e08d50d
...@@ -197,11 +197,10 @@ int mtk_afe_fe_trigger(struct snd_pcm_substream *substream, int cmd, ...@@ -197,11 +197,10 @@ int mtk_afe_fe_trigger(struct snd_pcm_substream *substream, int cmd,
switch (cmd) { switch (cmd) {
case SNDRV_PCM_TRIGGER_START: case SNDRV_PCM_TRIGGER_START:
case SNDRV_PCM_TRIGGER_RESUME: case SNDRV_PCM_TRIGGER_RESUME:
if (memif->data->enable_shift >= 0) mtk_regmap_update_bits(afe->regmap,
mtk_regmap_update_bits(afe->regmap, memif->data->enable_reg,
memif->data->enable_reg, 1 << memif->data->enable_shift,
1 << memif->data->enable_shift, 1 << memif->data->enable_shift);
1 << memif->data->enable_shift);
/* set irq counter */ /* set irq counter */
mtk_regmap_update_bits(afe->regmap, irq_data->irq_cnt_reg, mtk_regmap_update_bits(afe->regmap, irq_data->irq_cnt_reg,
......
...@@ -994,7 +994,6 @@ static const struct mtk_base_memif_data memif_data[MT2701_MEMIF_NUM] = { ...@@ -994,7 +994,6 @@ static const struct mtk_base_memif_data memif_data[MT2701_MEMIF_NUM] = {
.agent_disable_reg = AUDIO_TOP_CON5, .agent_disable_reg = AUDIO_TOP_CON5,
.agent_disable_shift = 6, .agent_disable_shift = 6,
.msb_reg = -1, .msb_reg = -1,
.msb_shift = -1,
}, },
{ {
.name = "DL2", .name = "DL2",
...@@ -1013,7 +1012,6 @@ static const struct mtk_base_memif_data memif_data[MT2701_MEMIF_NUM] = { ...@@ -1013,7 +1012,6 @@ static const struct mtk_base_memif_data memif_data[MT2701_MEMIF_NUM] = {
.agent_disable_reg = AUDIO_TOP_CON5, .agent_disable_reg = AUDIO_TOP_CON5,
.agent_disable_shift = 7, .agent_disable_shift = 7,
.msb_reg = -1, .msb_reg = -1,
.msb_shift = -1,
}, },
{ {
.name = "DL3", .name = "DL3",
...@@ -1032,7 +1030,6 @@ static const struct mtk_base_memif_data memif_data[MT2701_MEMIF_NUM] = { ...@@ -1032,7 +1030,6 @@ static const struct mtk_base_memif_data memif_data[MT2701_MEMIF_NUM] = {
.agent_disable_reg = AUDIO_TOP_CON5, .agent_disable_reg = AUDIO_TOP_CON5,
.agent_disable_shift = 8, .agent_disable_shift = 8,
.msb_reg = -1, .msb_reg = -1,
.msb_shift = -1,
}, },
{ {
.name = "DL4", .name = "DL4",
...@@ -1051,7 +1048,6 @@ static const struct mtk_base_memif_data memif_data[MT2701_MEMIF_NUM] = { ...@@ -1051,7 +1048,6 @@ static const struct mtk_base_memif_data memif_data[MT2701_MEMIF_NUM] = {
.agent_disable_reg = AUDIO_TOP_CON5, .agent_disable_reg = AUDIO_TOP_CON5,
.agent_disable_shift = 9, .agent_disable_shift = 9,
.msb_reg = -1, .msb_reg = -1,
.msb_shift = -1,
}, },
{ {
.name = "DL5", .name = "DL5",
...@@ -1070,7 +1066,6 @@ static const struct mtk_base_memif_data memif_data[MT2701_MEMIF_NUM] = { ...@@ -1070,7 +1066,6 @@ static const struct mtk_base_memif_data memif_data[MT2701_MEMIF_NUM] = {
.agent_disable_reg = AUDIO_TOP_CON5, .agent_disable_reg = AUDIO_TOP_CON5,
.agent_disable_shift = 10, .agent_disable_shift = 10,
.msb_reg = -1, .msb_reg = -1,
.msb_shift = -1,
}, },
{ {
.name = "DLM", .name = "DLM",
...@@ -1089,7 +1084,6 @@ static const struct mtk_base_memif_data memif_data[MT2701_MEMIF_NUM] = { ...@@ -1089,7 +1084,6 @@ static const struct mtk_base_memif_data memif_data[MT2701_MEMIF_NUM] = {
.agent_disable_reg = AUDIO_TOP_CON5, .agent_disable_reg = AUDIO_TOP_CON5,
.agent_disable_shift = 12, .agent_disable_shift = 12,
.msb_reg = -1, .msb_reg = -1,
.msb_shift = -1,
}, },
{ {
.name = "UL1", .name = "UL1",
...@@ -1108,7 +1102,6 @@ static const struct mtk_base_memif_data memif_data[MT2701_MEMIF_NUM] = { ...@@ -1108,7 +1102,6 @@ static const struct mtk_base_memif_data memif_data[MT2701_MEMIF_NUM] = {
.agent_disable_reg = AUDIO_TOP_CON5, .agent_disable_reg = AUDIO_TOP_CON5,
.agent_disable_shift = 0, .agent_disable_shift = 0,
.msb_reg = -1, .msb_reg = -1,
.msb_shift = -1,
}, },
{ {
.name = "UL2", .name = "UL2",
...@@ -1127,7 +1120,6 @@ static const struct mtk_base_memif_data memif_data[MT2701_MEMIF_NUM] = { ...@@ -1127,7 +1120,6 @@ static const struct mtk_base_memif_data memif_data[MT2701_MEMIF_NUM] = {
.agent_disable_reg = AUDIO_TOP_CON5, .agent_disable_reg = AUDIO_TOP_CON5,
.agent_disable_shift = 1, .agent_disable_shift = 1,
.msb_reg = -1, .msb_reg = -1,
.msb_shift = -1,
}, },
{ {
.name = "UL3", .name = "UL3",
...@@ -1146,7 +1138,6 @@ static const struct mtk_base_memif_data memif_data[MT2701_MEMIF_NUM] = { ...@@ -1146,7 +1138,6 @@ static const struct mtk_base_memif_data memif_data[MT2701_MEMIF_NUM] = {
.agent_disable_reg = AUDIO_TOP_CON5, .agent_disable_reg = AUDIO_TOP_CON5,
.agent_disable_shift = 2, .agent_disable_shift = 2,
.msb_reg = -1, .msb_reg = -1,
.msb_shift = -1,
}, },
{ {
.name = "UL4", .name = "UL4",
...@@ -1165,7 +1156,6 @@ static const struct mtk_base_memif_data memif_data[MT2701_MEMIF_NUM] = { ...@@ -1165,7 +1156,6 @@ static const struct mtk_base_memif_data memif_data[MT2701_MEMIF_NUM] = {
.agent_disable_reg = AUDIO_TOP_CON5, .agent_disable_reg = AUDIO_TOP_CON5,
.agent_disable_shift = 3, .agent_disable_shift = 3,
.msb_reg = -1, .msb_reg = -1,
.msb_shift = -1,
}, },
{ {
.name = "UL5", .name = "UL5",
...@@ -1184,7 +1174,6 @@ static const struct mtk_base_memif_data memif_data[MT2701_MEMIF_NUM] = { ...@@ -1184,7 +1174,6 @@ static const struct mtk_base_memif_data memif_data[MT2701_MEMIF_NUM] = {
.agent_disable_reg = AUDIO_TOP_CON5, .agent_disable_reg = AUDIO_TOP_CON5,
.agent_disable_shift = 4, .agent_disable_shift = 4,
.msb_reg = -1, .msb_reg = -1,
.msb_shift = -1,
}, },
{ {
.name = "DLBT", .name = "DLBT",
...@@ -1203,7 +1192,6 @@ static const struct mtk_base_memif_data memif_data[MT2701_MEMIF_NUM] = { ...@@ -1203,7 +1192,6 @@ static const struct mtk_base_memif_data memif_data[MT2701_MEMIF_NUM] = {
.agent_disable_reg = AUDIO_TOP_CON5, .agent_disable_reg = AUDIO_TOP_CON5,
.agent_disable_shift = 13, .agent_disable_shift = 13,
.msb_reg = -1, .msb_reg = -1,
.msb_shift = -1,
}, },
{ {
.name = "ULBT", .name = "ULBT",
...@@ -1222,7 +1210,6 @@ static const struct mtk_base_memif_data memif_data[MT2701_MEMIF_NUM] = { ...@@ -1222,7 +1210,6 @@ static const struct mtk_base_memif_data memif_data[MT2701_MEMIF_NUM] = {
.agent_disable_reg = AUDIO_TOP_CON5, .agent_disable_reg = AUDIO_TOP_CON5,
.agent_disable_shift = 16, .agent_disable_shift = 16,
.msb_reg = -1, .msb_reg = -1,
.msb_shift = -1,
}, },
}; };
......
...@@ -401,9 +401,7 @@ static const struct mtk_base_memif_data memif_data[MT6797_MEMIF_NUM] = { ...@@ -401,9 +401,7 @@ static const struct mtk_base_memif_data memif_data[MT6797_MEMIF_NUM] = {
.hd_reg = AFE_MEMIF_HD_MODE, .hd_reg = AFE_MEMIF_HD_MODE,
.hd_shift = DL1_HD_SFT, .hd_shift = DL1_HD_SFT,
.agent_disable_reg = -1, .agent_disable_reg = -1,
.agent_disable_shift = -1,
.msb_reg = -1, .msb_reg = -1,
.msb_shift = -1,
}, },
[MT6797_MEMIF_DL2] = { [MT6797_MEMIF_DL2] = {
.name = "DL2", .name = "DL2",
...@@ -420,9 +418,7 @@ static const struct mtk_base_memif_data memif_data[MT6797_MEMIF_NUM] = { ...@@ -420,9 +418,7 @@ static const struct mtk_base_memif_data memif_data[MT6797_MEMIF_NUM] = {
.hd_reg = AFE_MEMIF_HD_MODE, .hd_reg = AFE_MEMIF_HD_MODE,
.hd_shift = DL2_HD_SFT, .hd_shift = DL2_HD_SFT,
.agent_disable_reg = -1, .agent_disable_reg = -1,
.agent_disable_shift = -1,
.msb_reg = -1, .msb_reg = -1,
.msb_shift = -1,
}, },
[MT6797_MEMIF_DL3] = { [MT6797_MEMIF_DL3] = {
.name = "DL3", .name = "DL3",
...@@ -439,9 +435,7 @@ static const struct mtk_base_memif_data memif_data[MT6797_MEMIF_NUM] = { ...@@ -439,9 +435,7 @@ static const struct mtk_base_memif_data memif_data[MT6797_MEMIF_NUM] = {
.hd_reg = AFE_MEMIF_HD_MODE, .hd_reg = AFE_MEMIF_HD_MODE,
.hd_shift = DL3_HD_SFT, .hd_shift = DL3_HD_SFT,
.agent_disable_reg = -1, .agent_disable_reg = -1,
.agent_disable_shift = -1,
.msb_reg = -1, .msb_reg = -1,
.msb_shift = -1,
}, },
[MT6797_MEMIF_VUL] = { [MT6797_MEMIF_VUL] = {
.name = "VUL", .name = "VUL",
...@@ -458,9 +452,7 @@ static const struct mtk_base_memif_data memif_data[MT6797_MEMIF_NUM] = { ...@@ -458,9 +452,7 @@ static const struct mtk_base_memif_data memif_data[MT6797_MEMIF_NUM] = {
.hd_reg = AFE_MEMIF_HD_MODE, .hd_reg = AFE_MEMIF_HD_MODE,
.hd_shift = VUL_HD_SFT, .hd_shift = VUL_HD_SFT,
.agent_disable_reg = -1, .agent_disable_reg = -1,
.agent_disable_shift = -1,
.msb_reg = -1, .msb_reg = -1,
.msb_shift = -1,
}, },
[MT6797_MEMIF_AWB] = { [MT6797_MEMIF_AWB] = {
.name = "AWB", .name = "AWB",
...@@ -477,9 +469,7 @@ static const struct mtk_base_memif_data memif_data[MT6797_MEMIF_NUM] = { ...@@ -477,9 +469,7 @@ static const struct mtk_base_memif_data memif_data[MT6797_MEMIF_NUM] = {
.hd_reg = AFE_MEMIF_HD_MODE, .hd_reg = AFE_MEMIF_HD_MODE,
.hd_shift = AWB_HD_SFT, .hd_shift = AWB_HD_SFT,
.agent_disable_reg = -1, .agent_disable_reg = -1,
.agent_disable_shift = -1,
.msb_reg = -1, .msb_reg = -1,
.msb_shift = -1,
}, },
[MT6797_MEMIF_VUL12] = { [MT6797_MEMIF_VUL12] = {
.name = "VUL12", .name = "VUL12",
...@@ -496,9 +486,7 @@ static const struct mtk_base_memif_data memif_data[MT6797_MEMIF_NUM] = { ...@@ -496,9 +486,7 @@ static const struct mtk_base_memif_data memif_data[MT6797_MEMIF_NUM] = {
.hd_reg = AFE_MEMIF_HD_MODE, .hd_reg = AFE_MEMIF_HD_MODE,
.hd_shift = VUL_DATA2_HD_SFT, .hd_shift = VUL_DATA2_HD_SFT,
.agent_disable_reg = -1, .agent_disable_reg = -1,
.agent_disable_shift = -1,
.msb_reg = -1, .msb_reg = -1,
.msb_shift = -1,
}, },
[MT6797_MEMIF_DAI] = { [MT6797_MEMIF_DAI] = {
.name = "DAI", .name = "DAI",
...@@ -515,9 +503,7 @@ static const struct mtk_base_memif_data memif_data[MT6797_MEMIF_NUM] = { ...@@ -515,9 +503,7 @@ static const struct mtk_base_memif_data memif_data[MT6797_MEMIF_NUM] = {
.hd_reg = AFE_MEMIF_HD_MODE, .hd_reg = AFE_MEMIF_HD_MODE,
.hd_shift = DAI_HD_SFT, .hd_shift = DAI_HD_SFT,
.agent_disable_reg = -1, .agent_disable_reg = -1,
.agent_disable_shift = -1,
.msb_reg = -1, .msb_reg = -1,
.msb_shift = -1,
}, },
[MT6797_MEMIF_MOD_DAI] = { [MT6797_MEMIF_MOD_DAI] = {
.name = "MOD_DAI", .name = "MOD_DAI",
...@@ -534,9 +520,7 @@ static const struct mtk_base_memif_data memif_data[MT6797_MEMIF_NUM] = { ...@@ -534,9 +520,7 @@ static const struct mtk_base_memif_data memif_data[MT6797_MEMIF_NUM] = {
.hd_reg = AFE_MEMIF_HD_MODE, .hd_reg = AFE_MEMIF_HD_MODE,
.hd_shift = MOD_DAI_HD_SFT, .hd_shift = MOD_DAI_HD_SFT,
.agent_disable_reg = -1, .agent_disable_reg = -1,
.agent_disable_shift = -1,
.msb_reg = -1, .msb_reg = -1,
.msb_shift = -1,
}, },
}; };
......
...@@ -714,13 +714,11 @@ static const struct mtk_base_memif_data memif_data[MT8173_AFE_MEMIF_NUM] = { ...@@ -714,13 +714,11 @@ static const struct mtk_base_memif_data memif_data[MT8173_AFE_MEMIF_NUM] = {
.mono_reg = AFE_DAC_CON1, .mono_reg = AFE_DAC_CON1,
.mono_shift = 21, .mono_shift = 21,
.hd_reg = -1, .hd_reg = -1,
.hd_shift = -1,
.enable_reg = AFE_DAC_CON0, .enable_reg = AFE_DAC_CON0,
.enable_shift = 1, .enable_shift = 1,
.msb_reg = AFE_MEMIF_MSB, .msb_reg = AFE_MEMIF_MSB,
.msb_shift = 0, .msb_shift = 0,
.agent_disable_reg = -1, .agent_disable_reg = -1,
.agent_disable_shift = -1,
}, { }, {
.name = "DL2", .name = "DL2",
.id = MT8173_AFE_MEMIF_DL2, .id = MT8173_AFE_MEMIF_DL2,
...@@ -732,13 +730,11 @@ static const struct mtk_base_memif_data memif_data[MT8173_AFE_MEMIF_NUM] = { ...@@ -732,13 +730,11 @@ static const struct mtk_base_memif_data memif_data[MT8173_AFE_MEMIF_NUM] = {
.mono_reg = AFE_DAC_CON1, .mono_reg = AFE_DAC_CON1,
.mono_shift = 22, .mono_shift = 22,
.hd_reg = -1, .hd_reg = -1,
.hd_shift = -1,
.enable_reg = AFE_DAC_CON0, .enable_reg = AFE_DAC_CON0,
.enable_shift = 2, .enable_shift = 2,
.msb_reg = AFE_MEMIF_MSB, .msb_reg = AFE_MEMIF_MSB,
.msb_shift = 1, .msb_shift = 1,
.agent_disable_reg = -1, .agent_disable_reg = -1,
.agent_disable_shift = -1,
}, { }, {
.name = "VUL", .name = "VUL",
.id = MT8173_AFE_MEMIF_VUL, .id = MT8173_AFE_MEMIF_VUL,
...@@ -750,13 +746,11 @@ static const struct mtk_base_memif_data memif_data[MT8173_AFE_MEMIF_NUM] = { ...@@ -750,13 +746,11 @@ static const struct mtk_base_memif_data memif_data[MT8173_AFE_MEMIF_NUM] = {
.mono_reg = AFE_DAC_CON1, .mono_reg = AFE_DAC_CON1,
.mono_shift = 27, .mono_shift = 27,
.hd_reg = -1, .hd_reg = -1,
.hd_shift = -1,
.enable_reg = AFE_DAC_CON0, .enable_reg = AFE_DAC_CON0,
.enable_shift = 3, .enable_shift = 3,
.msb_reg = AFE_MEMIF_MSB, .msb_reg = AFE_MEMIF_MSB,
.msb_shift = 6, .msb_shift = 6,
.agent_disable_reg = -1, .agent_disable_reg = -1,
.agent_disable_shift = -1,
}, { }, {
.name = "DAI", .name = "DAI",
.id = MT8173_AFE_MEMIF_DAI, .id = MT8173_AFE_MEMIF_DAI,
...@@ -768,13 +762,11 @@ static const struct mtk_base_memif_data memif_data[MT8173_AFE_MEMIF_NUM] = { ...@@ -768,13 +762,11 @@ static const struct mtk_base_memif_data memif_data[MT8173_AFE_MEMIF_NUM] = {
.mono_reg = -1, .mono_reg = -1,
.mono_shift = -1, .mono_shift = -1,
.hd_reg = -1, .hd_reg = -1,
.hd_shift = -1,
.enable_reg = AFE_DAC_CON0, .enable_reg = AFE_DAC_CON0,
.enable_shift = 4, .enable_shift = 4,
.msb_reg = AFE_MEMIF_MSB, .msb_reg = AFE_MEMIF_MSB,
.msb_shift = 5, .msb_shift = 5,
.agent_disable_reg = -1, .agent_disable_reg = -1,
.agent_disable_shift = -1,
}, { }, {
.name = "AWB", .name = "AWB",
.id = MT8173_AFE_MEMIF_AWB, .id = MT8173_AFE_MEMIF_AWB,
...@@ -786,13 +778,11 @@ static const struct mtk_base_memif_data memif_data[MT8173_AFE_MEMIF_NUM] = { ...@@ -786,13 +778,11 @@ static const struct mtk_base_memif_data memif_data[MT8173_AFE_MEMIF_NUM] = {
.mono_reg = AFE_DAC_CON1, .mono_reg = AFE_DAC_CON1,
.mono_shift = 24, .mono_shift = 24,
.hd_reg = -1, .hd_reg = -1,
.hd_shift = -1,
.enable_reg = AFE_DAC_CON0, .enable_reg = AFE_DAC_CON0,
.enable_shift = 6, .enable_shift = 6,
.msb_reg = AFE_MEMIF_MSB, .msb_reg = AFE_MEMIF_MSB,
.msb_shift = 3, .msb_shift = 3,
.agent_disable_reg = -1, .agent_disable_reg = -1,
.agent_disable_shift = -1,
}, { }, {
.name = "MOD_DAI", .name = "MOD_DAI",
.id = MT8173_AFE_MEMIF_MOD_DAI, .id = MT8173_AFE_MEMIF_MOD_DAI,
...@@ -804,13 +794,11 @@ static const struct mtk_base_memif_data memif_data[MT8173_AFE_MEMIF_NUM] = { ...@@ -804,13 +794,11 @@ static const struct mtk_base_memif_data memif_data[MT8173_AFE_MEMIF_NUM] = {
.mono_reg = AFE_DAC_CON1, .mono_reg = AFE_DAC_CON1,
.mono_shift = 30, .mono_shift = 30,
.hd_reg = -1, .hd_reg = -1,
.hd_shift = -1,
.enable_reg = AFE_DAC_CON0, .enable_reg = AFE_DAC_CON0,
.enable_shift = 7, .enable_shift = 7,
.msb_reg = AFE_MEMIF_MSB, .msb_reg = AFE_MEMIF_MSB,
.msb_shift = 4, .msb_shift = 4,
.agent_disable_reg = -1, .agent_disable_reg = -1,
.agent_disable_shift = -1,
}, { }, {
.name = "HDMI", .name = "HDMI",
.id = MT8173_AFE_MEMIF_HDMI, .id = MT8173_AFE_MEMIF_HDMI,
...@@ -822,13 +810,10 @@ static const struct mtk_base_memif_data memif_data[MT8173_AFE_MEMIF_NUM] = { ...@@ -822,13 +810,10 @@ static const struct mtk_base_memif_data memif_data[MT8173_AFE_MEMIF_NUM] = {
.mono_reg = -1, .mono_reg = -1,
.mono_shift = -1, .mono_shift = -1,
.hd_reg = -1, .hd_reg = -1,
.hd_shift = -1,
.enable_reg = -1, .enable_reg = -1,
.enable_shift = -1,
.msb_reg = AFE_MEMIF_MSB, .msb_reg = AFE_MEMIF_MSB,
.msb_shift = 8, .msb_shift = 8,
.agent_disable_reg = -1, .agent_disable_reg = -1,
.agent_disable_shift = -1,
}, },
}; };
...@@ -914,7 +899,6 @@ static const struct mtk_base_irq_data irq_data[MT8173_AFE_IRQ_NUM] = { ...@@ -914,7 +899,6 @@ static const struct mtk_base_irq_data irq_data[MT8173_AFE_IRQ_NUM] = {
.irq_en_reg = AFE_IRQ_MCU_CON, .irq_en_reg = AFE_IRQ_MCU_CON,
.irq_en_shift = 12, .irq_en_shift = 12,
.irq_fs_reg = -1, .irq_fs_reg = -1,
.irq_fs_shift = -1,
.irq_fs_maskbit = -1, .irq_fs_maskbit = -1,
.irq_clr_reg = AFE_IRQ_CLR, .irq_clr_reg = AFE_IRQ_CLR,
.irq_clr_shift = 4, .irq_clr_shift = 4,
......
...@@ -421,9 +421,7 @@ static const struct mtk_base_memif_data memif_data[MT8183_MEMIF_NUM] = { ...@@ -421,9 +421,7 @@ static const struct mtk_base_memif_data memif_data[MT8183_MEMIF_NUM] = {
.hd_reg = AFE_MEMIF_HD_MODE, .hd_reg = AFE_MEMIF_HD_MODE,
.hd_shift = DL1_HD_SFT, .hd_shift = DL1_HD_SFT,
.agent_disable_reg = -1, .agent_disable_reg = -1,
.agent_disable_shift = -1,
.msb_reg = -1, .msb_reg = -1,
.msb_shift = -1,
}, },
[MT8183_MEMIF_DL2] = { [MT8183_MEMIF_DL2] = {
.name = "DL2", .name = "DL2",
...@@ -440,9 +438,7 @@ static const struct mtk_base_memif_data memif_data[MT8183_MEMIF_NUM] = { ...@@ -440,9 +438,7 @@ static const struct mtk_base_memif_data memif_data[MT8183_MEMIF_NUM] = {
.hd_reg = AFE_MEMIF_HD_MODE, .hd_reg = AFE_MEMIF_HD_MODE,
.hd_shift = DL2_HD_SFT, .hd_shift = DL2_HD_SFT,
.agent_disable_reg = -1, .agent_disable_reg = -1,
.agent_disable_shift = -1,
.msb_reg = -1, .msb_reg = -1,
.msb_shift = -1,
}, },
[MT8183_MEMIF_DL3] = { [MT8183_MEMIF_DL3] = {
.name = "DL3", .name = "DL3",
...@@ -459,9 +455,7 @@ static const struct mtk_base_memif_data memif_data[MT8183_MEMIF_NUM] = { ...@@ -459,9 +455,7 @@ static const struct mtk_base_memif_data memif_data[MT8183_MEMIF_NUM] = {
.hd_reg = AFE_MEMIF_HD_MODE, .hd_reg = AFE_MEMIF_HD_MODE,
.hd_shift = DL3_HD_SFT, .hd_shift = DL3_HD_SFT,
.agent_disable_reg = -1, .agent_disable_reg = -1,
.agent_disable_shift = -1,
.msb_reg = -1, .msb_reg = -1,
.msb_shift = -1,
}, },
[MT8183_MEMIF_VUL2] = { [MT8183_MEMIF_VUL2] = {
.name = "VUL2", .name = "VUL2",
...@@ -478,9 +472,7 @@ static const struct mtk_base_memif_data memif_data[MT8183_MEMIF_NUM] = { ...@@ -478,9 +472,7 @@ static const struct mtk_base_memif_data memif_data[MT8183_MEMIF_NUM] = {
.hd_reg = AFE_MEMIF_HD_MODE, .hd_reg = AFE_MEMIF_HD_MODE,
.hd_shift = VUL2_HD_SFT, .hd_shift = VUL2_HD_SFT,
.agent_disable_reg = -1, .agent_disable_reg = -1,
.agent_disable_shift = -1,
.msb_reg = -1, .msb_reg = -1,
.msb_shift = -1,
}, },
[MT8183_MEMIF_AWB] = { [MT8183_MEMIF_AWB] = {
.name = "AWB", .name = "AWB",
...@@ -497,9 +489,7 @@ static const struct mtk_base_memif_data memif_data[MT8183_MEMIF_NUM] = { ...@@ -497,9 +489,7 @@ static const struct mtk_base_memif_data memif_data[MT8183_MEMIF_NUM] = {
.hd_reg = AFE_MEMIF_HD_MODE, .hd_reg = AFE_MEMIF_HD_MODE,
.hd_shift = AWB_HD_SFT, .hd_shift = AWB_HD_SFT,
.agent_disable_reg = -1, .agent_disable_reg = -1,
.agent_disable_shift = -1,
.msb_reg = -1, .msb_reg = -1,
.msb_shift = -1,
}, },
[MT8183_MEMIF_AWB2] = { [MT8183_MEMIF_AWB2] = {
.name = "AWB2", .name = "AWB2",
...@@ -516,9 +506,7 @@ static const struct mtk_base_memif_data memif_data[MT8183_MEMIF_NUM] = { ...@@ -516,9 +506,7 @@ static const struct mtk_base_memif_data memif_data[MT8183_MEMIF_NUM] = {
.hd_reg = AFE_MEMIF_HD_MODE, .hd_reg = AFE_MEMIF_HD_MODE,
.hd_shift = AWB2_HD_SFT, .hd_shift = AWB2_HD_SFT,
.agent_disable_reg = -1, .agent_disable_reg = -1,
.agent_disable_shift = -1,
.msb_reg = -1, .msb_reg = -1,
.msb_shift = -1,
}, },
[MT8183_MEMIF_VUL12] = { [MT8183_MEMIF_VUL12] = {
.name = "VUL12", .name = "VUL12",
...@@ -535,9 +523,7 @@ static const struct mtk_base_memif_data memif_data[MT8183_MEMIF_NUM] = { ...@@ -535,9 +523,7 @@ static const struct mtk_base_memif_data memif_data[MT8183_MEMIF_NUM] = {
.hd_reg = AFE_MEMIF_HD_MODE, .hd_reg = AFE_MEMIF_HD_MODE,
.hd_shift = VUL12_HD_SFT, .hd_shift = VUL12_HD_SFT,
.agent_disable_reg = -1, .agent_disable_reg = -1,
.agent_disable_shift = -1,
.msb_reg = -1, .msb_reg = -1,
.msb_shift = -1,
}, },
[MT8183_MEMIF_MOD_DAI] = { [MT8183_MEMIF_MOD_DAI] = {
.name = "MOD_DAI", .name = "MOD_DAI",
...@@ -554,9 +540,7 @@ static const struct mtk_base_memif_data memif_data[MT8183_MEMIF_NUM] = { ...@@ -554,9 +540,7 @@ static const struct mtk_base_memif_data memif_data[MT8183_MEMIF_NUM] = {
.hd_reg = AFE_MEMIF_HD_MODE, .hd_reg = AFE_MEMIF_HD_MODE,
.hd_shift = MOD_DAI_HD_SFT, .hd_shift = MOD_DAI_HD_SFT,
.agent_disable_reg = -1, .agent_disable_reg = -1,
.agent_disable_shift = -1,
.msb_reg = -1, .msb_reg = -1,
.msb_shift = -1,
}, },
[MT8183_MEMIF_HDMI] = { [MT8183_MEMIF_HDMI] = {
.name = "HDMI", .name = "HDMI",
...@@ -569,13 +553,10 @@ static const struct mtk_base_memif_data memif_data[MT8183_MEMIF_NUM] = { ...@@ -569,13 +553,10 @@ static const struct mtk_base_memif_data memif_data[MT8183_MEMIF_NUM] = {
.mono_reg = -1, .mono_reg = -1,
.mono_shift = -1, .mono_shift = -1,
.enable_reg = -1, /* control in tdm for sync start */ .enable_reg = -1, /* control in tdm for sync start */
.enable_shift = -1,
.hd_reg = AFE_MEMIF_HD_MODE, .hd_reg = AFE_MEMIF_HD_MODE,
.hd_shift = HDMI_HD_SFT, .hd_shift = HDMI_HD_SFT,
.agent_disable_reg = -1, .agent_disable_reg = -1,
.agent_disable_shift = -1,
.msb_reg = -1, .msb_reg = -1,
.msb_shift = -1,
}, },
}; };
...@@ -690,7 +671,6 @@ static const struct mtk_base_irq_data irq_data[MT8183_IRQ_NUM] = { ...@@ -690,7 +671,6 @@ static const struct mtk_base_irq_data irq_data[MT8183_IRQ_NUM] = {
.irq_cnt_shift = 0, .irq_cnt_shift = 0,
.irq_cnt_maskbit = 0x3ffff, .irq_cnt_maskbit = 0x3ffff,
.irq_fs_reg = -1, .irq_fs_reg = -1,
.irq_fs_shift = -1,
.irq_fs_maskbit = -1, .irq_fs_maskbit = -1,
.irq_en_reg = AFE_IRQ_MCU_CON0, .irq_en_reg = AFE_IRQ_MCU_CON0,
.irq_en_shift = IRQ8_MCU_ON_SFT, .irq_en_shift = IRQ8_MCU_ON_SFT,
......
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