Commit f066af88 authored by Jude Shih's avatar Jude Shih Committed by Alex Deucher

drm/amdgpu: add DMUB outbox event IRQ source define/complete/debug flag

[Why & How]
We use outbox interrupt that allows us to do the AUX via DMUB
Therefore, we need to add some irq source related definition
in the header files;
Signed-off-by: default avatarJude Shih <shenshih@amd.com>
Reviewed-by: default avatarHarry Wentland <harry.wentland@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 3495d3c3
...@@ -922,6 +922,7 @@ struct amdgpu_device { ...@@ -922,6 +922,7 @@ struct amdgpu_device {
struct amdgpu_irq_src pageflip_irq; struct amdgpu_irq_src pageflip_irq;
struct amdgpu_irq_src hpd_irq; struct amdgpu_irq_src hpd_irq;
struct amdgpu_irq_src dmub_trace_irq; struct amdgpu_irq_src dmub_trace_irq;
struct amdgpu_irq_src dmub_outbox_irq;
/* rings */ /* rings */
u64 fence_context; u64 fence_context;
......
...@@ -1132,5 +1132,7 @@ ...@@ -1132,5 +1132,7 @@
#define DCN_1_0__SRCID__DMCUB_OUTBOX_HIGH_PRIORITY_READY_INT 0x68 #define DCN_1_0__SRCID__DMCUB_OUTBOX_HIGH_PRIORITY_READY_INT 0x68
#define DCN_1_0__CTXID__DMCUB_OUTBOX_HIGH_PRIORITY_READY_INT 6 #define DCN_1_0__CTXID__DMCUB_OUTBOX_HIGH_PRIORITY_READY_INT 6
#define DCN_1_0__SRCID__DMCUB_OUTBOX_LOW_PRIORITY_READY_INT 0x68 // DMCUB_IHC_outbox1_ready_int IHC_DMCUB_outbox1_ready_int_ack DMCUB_OUTBOX_LOW_PRIORITY_READY_INTERRUPT DISP_INTERRUPT_STATUS_CONTINUE24 Level/Pulse
#define DCN_1_0__CTXID__DMCUB_OUTBOX_LOW_PRIORITY_READY_INT 8
#endif // __IRQSRCS_DCN_1_0_H__ #endif // __IRQSRCS_DCN_1_0_H__
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