- 02 Apr, 2024 5 commits
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Jouni Högander authored
Add get function for silence period and lfps half cycle. Values are taken from the tables in bspec. Bspec: 71632 v3: - use PORT_ALPM_CTL_SILENCE_PERIOD_MASK instead of value 255 - use PORT_ALPM_LFPS_CTL_LAST_LFPS_HALF_CYCLE_DURATION_MASK instead of value 31 v2: - fix some checks - add some more comments Signed-off-by:Jouni Högander <jouni.hogander@intel.com> Reviewed-by:
Animesh Manna <animesh.manna@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240328141928.1311284-4-jouni.hogander@intel.com
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Jouni Högander authored
Calculate aux less wake time and store it into alpm_params struct Bspec: 71477 v4: - re-use fast_wake_lines to store aux_less_wake_lines v3: - use ALPM_CTL_AUX_LESS_WAKE_TIME_MASK instead of value 63 v2: - use variables instead of values directly - fix max value - move converting port clock to Mhz into _lnl_compute_aux_less_wake_time Signed-off-by:
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Jouni Högander authored
Couple of ALPM AUX-Less related fields are missing from ALPM register definitions. Add these and remove some duplicate definitions. Bspec: 70294 V2: add Bspec reference Signed-off-by:
Arun R Murthy <arun.r.murthy@intel.com> Reviewed-by:
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Jani Nikula authored
The dmc_firmware_path parameter is clearly a display parameter. Move it there so it's available to both i915 and xe modules. This also cleans up the ugly member in struct xe_device. Reviewed-by:
Lucas De Marchi <lucas.demarchi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240321161856.3517856-1-jani.nikula@intel.comSigned-off-by:
Jani Nikula <jani.nikula@intel.com>
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Jani Nikula authored
Use localized __diag_push(), __diag_ignore_all() with rationale, and __diag_pop() for specific initializations instead of blanket disabling of -Woverride-init across several files. Note that we've tried this before with commit 88e96644 ("drm/i915: use localized __diag_ignore_all() instead of per file") and reverted in commit 290d1610 ("Revert "drm/i915: use localized __diag_ignore_all() instead of per file""). The issue turned out to be in __diag_ignore_all() and it was fixed by commit 689b097a ("compiler-gcc: Suppress -Wmissing-prototypes warning for all supported GCC"). So we should be able to pull this off now. Cc: Arnd Bergmann <arnd@arndb.de> Cc: Lucas De Marchi <lucas.demarchi@intel.com> Acked-by:
Arnd Bergmann <arnd@arndb.de> Reviewed-by:
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- 01 Apr, 2024 1 commit
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Ankit Nautiyal authored
For DISPLAY < 13, compressed bpp is chosen from a list of supported compressed bpps. Fix the condition to choose the appropriate compressed bpp from the list. Fixes: 1c56e9a3 ("drm/i915/dp: Get optimal link config to have best compressed bpp") Cc: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Cc: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> Cc: Jani Nikula <jani.nikula@linux.intel.com> Cc: <stable@vger.kernel.org> # v6.7+ Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/10162Signed-off-by:
Ankit Nautiyal <ankit.k.nautiyal@intel.com> Reviewed-by:
Suraj Kandpal <suraj.kandpal@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240305054443.2489895-1-ankit.k.nautiyal@intel.com
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- 28 Mar, 2024 6 commits
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Jouni Högander authored
This patch is implementing Wa_16021440873. Bspec: 74151 Signed-off-by:
Mika Kahola <mika.kahola@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240319123327.1661097-6-jouni.hogander@intel.com
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Jouni Högander authored
MCURSOR_MODE_64_2B is used in Wa_16021440873. Add define for it. Bspec: 69837 Signed-off-by:
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Jouni Högander authored
Currently we are not aligning selective update area to cover cursor fully when cursor is not updated by itself but still in the selective update area. Fix this by checking cursor separately after drm_atomic_add_affected_planes. Bspec: 68927 Fixes: 1bff93b8 ("drm/i915/psr: Extend SU area to cover cursor fully if needed") Signed-off-by:
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Jouni Högander authored
Currently PIPE_SRCSZ_ERLY_TPT is written in intel_display.c:intel_set_pipe_src_size. This doesn't work as intel_set_pipe_src_size is called only on modeset. Bspec: 68927 Fixes: 3291bbb9 ("drm/i915/psr: Configure PIPE_SRCSZ_ERLY_TPT for psr2 early transport") Signed-off-by:
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Jouni Högander authored
When early transport is enabled we need to write PIPE_SRCSZ_ERLY_TPT on every flip doing selective update. This patch calculates PIPE_SRCSZ_ERLY_TPT same way as is done for PSR2_MAN_TRK_CTL value and stores i in intel_crtc_state->pipe_srcsz_early_tpt to be written later during flip. Bspec: 68927 Signed-off-by:
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Arun R Murthy authored
UHBR13.5 is not supported in MTL and also the DP2.1 spec says UHBR13.5 is optional. Hence removing UHBR135 from the supported link rates. v2: Reframed the commit message and added link to the issue. Signed-off-by:
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- 27 Mar, 2024 1 commit
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Ravi Kumar Vodapalli authored
New PCI IDs are added in Bspec for DG2 platform, add them in driver Bspec: 44477 Signed-off-by:
Ravi Kumar Vodapalli <ravi.kumar.vodapalli@intel.com> Reviewed-by:
Matt Roper <matthew.d.roper@intel.com> Signed-off-by:
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- 26 Mar, 2024 7 commits
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Lucas De Marchi authored
drivers/gpu/drm/i915/gt/intel_workarounds.c.rej was incorrectly added to the tree after solving a conflict. Remove it. Fixes: 326e30e4 ("drm/i915: Drop dead code for pvc") Reported-by:
Stephen Rothwell <sfr@canb.auug.org.au> Closes: https://lore.kernel.org/r/20240325083435.4f970eec@canb.auug.org.au Cc: Jani Nikula <jani.nikula@linux.intel.com> Reviewed-by:
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Gareth Yu authored
Historically the expectation was to set brightness to max on enable, if it was zero. However, the policy should be to preserve brightness across disable/enable, for example the userspace might want to dim the brightness before disable (e.g. on suspend) and gradually bring it back up after enable (e.g. on resume). If the brightness gets bumped to max at enable, this causes flicker as the userspace expects the brightness to have been preserved across disable/enable. For example: (suspend) [53949.248875] i915 0000:00:02.0: [drm:intel_edp_backlight_off] [53949.452046] i915 0000:00:02.0: [drm:intel_backlight_set_pwm_level] set backlight PWM = 0 (wakeup) [53986.067356] i915 0000:00:02.0: [drm:intel_edp_backlight_on] [53986.067367] i915 0000:00:02.0: [drm:intel_backlight_enable] pipe A [53986.067476] i915 0000:00:02.0: [drm:intel_backlight_set_pwm_level] set backlight PWM = 96000 [53986.119766] backlight intel_backlight: PM: calling backlight_resume+0x0/0x7a @ 4916, parent: card0-eDP-1 [53986.119781] backlight intel_backlight: PM: backlight_resume+0x0/0x7a returned 0 after 0 usecs [53986.220068] [drm:intel_backlight_device_update_status] updating intel_backlight, brightness=26321/96000 [53986.220086] i915 0000:00:02.0: [drm:intel_panel_actually_set_backlight] set backlight level = 27961 Reduce the check to respecting the minimum brightness, and avoid bumping min brightness to max on enable. Note: It's possible there's still userspace out there that relies on the old behaviour. It would be unfortunate, but there's really only one way to find out. Cc: Tejas Upadhyay <tejaskumarx.surendrakumar.upadhyay@intel.com> Cc: Matt Roper <matthew.d.roper@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by:
Gareth Yu <gareth.yu@intel.com> Reviewed-by:
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Ville Syrjälä authored
When we have no VBT we currently assume ports A-F are all pontially valid for every platform. That is nonsense. Grab the bitmask of valid ports from the runtime info instead. Although the defaults we actually fill here look semi-sensible only for hsw-skl era hardware. Dunno if we should try to do something more appropriate here for other platforms, or just try to nuke the whole thing? Signed-off-by:
Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240319092443.15769-2-ville.syrjala@linux.intel.comReviewed-by:
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Ville Syrjälä authored
If we have no VBT, or the VBT didn't declare the encoder in question, we won't have the 'devdata' for the encoder. Instead of oopsing just bail early. We won't be able to tell whether the port is DP++ or not, but so be it. Cc: stable@vger.kernel.org Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/10464Signed-off-by:
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Ville Syrjälä authored
Calling i915_gem_object_get_dma_address() from the vblank evade critical section triggers might_sleep(). While we know that we've already pinned the framebuffer and thus i915_gem_object_get_dma_address() will in fact not sleep in this case, it seems reasonable to keep the unconditional might_sleep() for maximum coverage. So let's instead pre-populate the dma address during fb pinning, which all happens before we enter the vblank evade critical section. We can use u32 for the dma address as this class of hardware doesn't support >32bit addresses. Cc: stable@vger.kernel.org Fixes: 0225a909 ("drm/i915: Make cursor plane registers unlocked") Reported-by:
Borislav Petkov <bp@alien8.de> Closes: https://lore.kernel.org/intel-gfx/20240227100342.GAZd2zfmYcPS_SndtO@fat_crate.local/Signed-off-by:
Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
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Jani Nikula authored
Prefer the intel_de_wait*() functions over the uncore interface. Signed-off-by:
Gustavo Sousa <gustavo.sousa@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240320160123.2904609-2-jani.nikula@intel.com
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Jani Nikula authored
Do some renames on the register wait functions for clarity and brevity: intel_de_wait_for_register -> intel_de_wait intel_de_wait_for_register_fw -> intel_de_wait_fw __intel_de_wait_for_register -> intel_de_wait_custom In particular, it seemed odd to have a double-underscored function be called in a number of places. Signed-off-by:
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- 22 Mar, 2024 11 commits
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Lucas De Marchi authored
With both XEHPSDV and PVC removed (as platforms, most of their code remain used by others), there's no need to handle !RCS_MASK() as other platforms don't ever have fused-off render. Remove those code paths and the special WA flag when initializing GuC. Reviewed-by:
Tvrtko Ursulin <tursulin@ursulin.net> Link: https://patchwork.freedesktop.org/patch/msgid/20240320060543.4034215-7-lucas.demarchi@intel.comSigned-off-by:
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Lucas De Marchi authored
PCI IDs for PVC were never added and platform always marked with force_probe. Drop what's not used and rename some places as needed. The registers not used anymore are also removed. Reviewed-by:
Rodrigo Vivi <rodrigo.vivi@intel.com> Acked-by:
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Lucas De Marchi authored
With no platform using graphics/media IP_VER(12, 50), replace the checks throughout the code with IP_VER(12, 55) so the code makes sense by itself with no additional explanation of previous baggage. Reviewed-by:
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Lucas De Marchi authored
All the platforms that inherit the media/graphics version from XE_HPM_FEATURES / XE_HP_FEATURES just override it to another version. Just set the version directly in the respective struct and remove the versions from the _FEATURES macros. Since that was the only use for XE_HPM_FEATURES, remove it completely. Reviewed-by:
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Lucas De Marchi authored
Now that DG2 is the only user of this forcewake table, remove the macro and use FORCEWAKE_RENDER explicitly for range 0xd800 - 0xd87f. Suggested-by:
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Lucas De Marchi authored
PCI IDs for XEHPSDV were never added and platform always marked with force_probe. Drop what's not used and rename some places to either be xehp or dg2, depending on the platform/IP checks. The registers not used anymore are also removed. Reviewed-by:
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Ville Syrjälä authored
Add the missing BDB version number information for some of the backlight fields in VBT. Signed-off-by:
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Ville Syrjälä authored
The VBT backlight entries include various fields for i2c controlled backlights. These have been obsoleted at some unknown point in time, but let's define them anyway so that we have a full picture of what has been in there. Signed-off-by:
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Ville Syrjälä authored
According to some VBIOS sources the LFP power block used to have a single bit for DPST support. In version 159 that bit got moved into the driver features block, and then in version 228 back into the LFP power block (but this time as a per-panel thing). We have definitions for the last two, but not the original bit. Define it as well. Signed-off-by:
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Ville Syrjälä authored
While the spec does claim that most of the driver feature flags start from BDB version 165, reality and some VBIOS code disagrees. The VBIOS code says it starts from version 159, and my ILK with version 162 definitely has these things already in its VBT. Update the version number comments to say 159+ for all the bits that seem relevant for pre-hsw hardware. Signed-off-by:
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Ville Syrjälä authored
We've misspelled the VBT DFPS (dynamic frames per second) field as DPFS. Fix it. Signed-off-by:
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- 21 Mar, 2024 9 commits
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José Roberto de Souza authored
It is misleading, if the intention was to also print something in case it succeed it should have a different string. Cc: Alan Previn <alan.previn.teres.alexis@intel.com> Signed-off-by:
José Roberto de Souza <jose.souza@intel.com> Fixes: 698e19da ("drm/i915: Skip pxp init if gt is wedged") Reviewed-by:
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Jani Nikula authored
The encoder is a much more useful thing to pass around than the i915 and port combo. Also drive-by clean up some cases where both i915 and encoder are passed; only the latter is needed. Reviewed-by:
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Jani Nikula authored
The intel_is_c10phy() is now unused. Remove. Reviewed-by:
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Jani Nikula authored
Wherever possible, replace the port/phy based functions with the encoder based functions: intel_is_c10phy() -> intel_encoder_is_c10phy() intel_phy_is_combo() -> intel_encoder_is_combo() intel_phy_is_tc() -> intel_encoder_is_tc() intel_port_to_phy() -> intel_encoder_to_phy() intel_port_to_tc() -> intel_encoder_to_tc() Reviewed-by:
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Jani Nikula authored
Add a number of encoder based functions to check if the port/phy of the encoder is of a certain type, or to convert to phy or tc_port. Initially these are just wrappers around the existing functions, but they can be improved to use VBT data or use some cached info in the future. Reviewed-by:
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Jani Nikula authored
Pass encoder to intel_snps_phy_update_psr_power_state(). The encoder will be more helpful than just port in the subsequent changes. Reviewed-by:
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Jani Nikula authored
Pass encoder to intel_wait_ddi_buf_active(). The encoder will be more helpful than just port in the subsequent changes. Reviewed-by:
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Jani Nikula authored
Pass encoder to the _port_to_ddc_pin() functions, and rename to _encoder_to_ddc_pin(). The encoder will be more helpful than just port in the subsequent changes. Reviewed-by:
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Jani Nikula authored
If the sink supports 128b/132b and single-stream sideband messaging, enable MST mode. With this, the topology manager will still write DP_MSTM_CTRL, which should be ignored by the sink. In the future, the topology manager should probably only set the sideband messaging related parts of the register. Cc: Arun R Murthy <arun.r.murthy@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by:
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