- 17 Apr, 2008 40 commits
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Glauber de Oliveira Costa authored
This patch replaces apic_read() for apic_read_around() and apic_write for apic_write_around() in smpboot_64.c We do it to have a common usage between x86_64 and i386. In the former, it will always simply expand to apic_write Signed-off-by:
Glauber Costa <gcosta@redhat.com> Signed-off-by:
Ingo Molnar <mingo@elte.hu>
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Glauber de Oliveira Costa authored
Add loglevel facilities to printks in __inquire_remote_apic. the levels are the ones to match x86_64 ones. Signed-off-by:
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Glauber de Oliveira Costa authored
change some variables' types in __inquire_remote_apic to match x86_64 Signed-off-by:
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Pavel Machek authored
Fix coding style in pci-dma_64.c and add stubs for documentation. I hope someone fills the rest, I understand maybe off and soft... Signed-off-by:
Pavel Machek <pavel@suse.cz> Signed-off-by:
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Alexey Starikovskiy authored
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Alexey Starikovskiy authored
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Alexey Starikovskiy <astarikovskiy@suse.de> Signed-off-by:
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Alexey Starikovskiy authored
[ mingo@elte.hu: fix boot regression. ] Signed-off-by:
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Alexey Starikovskiy authored
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Alexey Starikovskiy authored
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Alexey Starikovskiy authored
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Alexey Starikovskiy authored
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Alexey Starikovskiy authored
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Alexey Starikovskiy authored
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Alexey Starikovskiy authored
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Alexey Starikovskiy authored
Signed-off: Alexey Starikovskiy <astarikovskiy@suse.de> Signed-off-by: -
Yinghai Lu authored
When acpi=off or there is no SRAT defined, apicid_to_node is got from K8 Northbridge PCI configuration space in k8_scan_nodes() in arch/x86_64/mm/k8toplogy.c. The problem is that it assumes bsp apic id is 0 at that point. For four socket system with Quad core cpus installed, all cpus apic id is offset by 4, and bsp apic id is 4. For eight socket system with dual core cpus installed, all cpus apic id is offset by 2, and bsp apic id is 2. We need get boot_cpu_id --- bsp apic id, before k8_scan_nodes by called. So create early_acpi_boot_init and early_get_smp_config for get boot_cpu_id. Signed-off-by:
Yinghai Lu <yhlu.kernel@gmail.com> Signed-off-by:
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Alexey Starikovskiy authored
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Mikael Pettersson authored
<asm-x86/nops.h> describes certain multibyte instructions as "generic" nops when in fact they aren't nops at all in 64-bit mode (missing REX.W causing truncation of a register). Update the comment to state that K8 or P6 style nops should be used in 64-bit mode. This matches what the alternatives code does. Signed-off-by:
Mikael Pettersson <mikpe@it.uu.se> Signed-off-by:
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Johannes Weiner authored
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Johannes Weiner <hannes@saeurebad.de> Signed-off-by:
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Jan Beulich authored
Otherwise, enabling (or better, subsequent disabling) of single stepping would cause a kernel oops on CPUs not having this MSR. The patch could have been added a conditional to the MSR write in user_disable_single_step(), but centralizing the updates seems safer and (looking forward) better manageable. Signed-off-by:
Jan Beulich <jbeulich@novell.com> Cc: Markus Metzger <markus.t.metzger@intel.com> Signed-off-by:
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Gautham R Shenoy authored
In the x86 native_smp_send_reschedule_function(), don't send the IPI if the cpu has gone offline already. Warn nevertheless!! Signed-off-by:
Gautham R Shenoy <ego@in.ibm.com> Signed-off-by:
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stephane eranian authored
adds AMD Northbridge config MSR definition Signed-off-by:
Stephane Eranian <eranian@gmail.com> Signed-off-by:
Robert Richter <robert.richter@amd.com> Signed-off-by:
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stephane eranian authored
adds cpu_has_arch_perfmon to test presence of architectural perfmon on Intel x86 processor Signed-off-by:
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Joe Perches authored
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Joe Perches <joe@perches.com> arch/x86/kernel/reboot.c | 1 - include/asm-x86/elf.h | 5 ++--- include/asm-x86/posix_types.h | 8 +------- include/asm-x86/processor.h | 3 +-- include/asm-x86/unistd.h | 8 +------- 5 files changed, 5 insertions(+), 20 deletions(-) Signed-off-by:
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Paolo Ciarrocchi authored
Fix: ERROR: do not initialise externals to 0 or NULL Signed-off-by:
Paolo Ciarrocchi <paolo.ciarrocchi@gmail.com> Signed-off-by:
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Yinghai Lu authored
otherwise Vmemmap and High Kernel Mapping string is not showing up. Signed-off-by:
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Yinghai Lu authored
store initial_apicid from early identify. it is could be different from phys_proc_id later. also print it out in /proc/cpuinfo. Signed-off-by:
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Ingo Molnar authored
all reboot details are handled in reboot.c and quirks are handled via reboot_fixups_32.c. Signed-off-by: -
Mathieu Desnoyers authored
Standardize DEBUG_RODATA, removing special cases for hotplug and kprobes. Signed-off-by:
Mathieu Desnoyers <mathieu.desnoyers@polymtl.ca> Cc: Andi Kleen <andi@firstfloor.org> Cc: pageexec@freemail.hu Cc: akpm@linux-foundation.org CC: Andi Kleen <andi@firstfloor.org> CC: pageexec@freemail.hu CC: H. Peter Anvin <hpa@zytor.com> Signed-off-by:
Thomas Gleixner <tglx@linutronix.de>
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Mathieu Desnoyers authored
Fix a memcpy that should be a text_poke (in apply_alternatives). Use kernel_wp_save/kernel_wp_restore in text_poke to support DEBUG_RODATA correctly and so the CPU HOTPLUG special case can be removed. Add text_poke_early, for alternatives and paravirt boot-time and module load time patching. Changelog: - Fix text_set and text_poke alignment check (mixed up bitwise and and or) - Remove text_set - Export add_nops, so it can be used by others. - Document text_poke_early. - Remove clflush, since it breaks some VIA architectures and is not strictly necessary. - Add kerneldoc to text_poke and text_poke_early. - Create a second vmap instead of using the WP bit to support Xen and VMI. - Move local_irq disable within text_poke and text_poke_early to be able to be sleepable in these functions. Signed-off-by:
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Harvey Harrison authored
__FUNCTION__ is gcc-specific, use __func__ Signed-off-by:
Harvey Harrison <harvey.harrison@gmail.com> Signed-off-by:
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Yinghai Lu authored
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Yinghai Lu authored
for system with apicid lifting, boot cpu apicid will be 4 got: CPU: L1 I Cache: 64K (64 bytes/line), D cache 64K (64 bytes/line) CPU: L2 Cache: 512K (64 bytes/line) CPU 0/4 -> Node 0 CPU: Physical Processor ID: 1 CPU: Processor Core ID: 0 so try to offset apicid back before get phys_proc_id with bits shift. then we can get correct socket ID also remove remove cpu_data(0) reference. because cpu_data(0) only be ready after smp_prepare_cpus with the assignment from boot_cpu_data to current_cpu_data aka cpu_data(0). and check_bugs()==>identify_cpu(&boot_cpu_data) is quite before than smp_prepare_cpus. So just use boot_cpu_id instead. Signed-off-by:
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Ingo Molnar authored
Before: total: 0 errors, 1 warnings, 678 lines checked After: total: 0 errors, 0 warnings, 678 lines checked No code changed: arch/x86/kernel/signal_32.o: text data bss dec hex filename 5333 0 4 5337 14d9 signal_32.o.before 5336 0 4 5340 14dc signal_32.o.after md5: c279e98012a2808e90cfa2a7787e42a4 signal_32.o.before.asm c279e98012a2808e90cfa2a7787e42a4 signal_32.o.after.asm Signed-off-by: -
Ingo Molnar authored
Before: total: 0 errors, 3 warnings, 685 lines checked After: total: 0 errors, 1 warnings, 678 lines checked No code changed: arch/x86/kernel/signal_32.o: text data bss dec hex filename 5333 0 4 5337 14d9 signal_32.o.before 5333 0 4 5337 14d9 signal_32.o.after md5: c279e98012a2808e90cfa2a7787e42a4 signal_32.o.before.asm c279e98012a2808e90cfa2a7787e42a4 signal_32.o.after.asm Signed-off-by: -
Ingo Molnar authored
Before: total: 21 errors, 6 warnings, 665 lines checked After: total: 0 errors, 3 warnings, 685 lines checked No code changed: arch/x86/kernel/signal_32.o: text data bss dec hex filename 5333 0 4 5337 14d9 signal_32.o.before 5333 0 4 5337 14d9 signal_32.o.after md5: c279e98012a2808e90cfa2a7787e42a4 signal_32.o.before.asm c279e98012a2808e90cfa2a7787e42a4 signal_32.o.after.asm Signed-off-by: -
Ingo Molnar authored
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Joe Perches authored
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Joe Perches authored
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Ingo Molnar authored
minor coding style cleanups. Before: total: 0 errors, 3 warnings, 479 lines checked After: total: 0 errors, 1 warnings, 483 lines checked No code changed: arch/x86/kernel/i387.o: text data bss dec hex filename 2379 4 8 2391 957 i387.o.before 2379 4 8 2391 957 i387.o.after md5: e1434553a3b4ff1f52ad97a68b1fad8a i387.o.before.asm e1434553a3b4ff1f52ad97a68b1fad8a i387.o.after.asm Signed-off-by:
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