- 20 Apr, 2009 18 commits
-
-
Paul Mundt authored
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
Paul Mundt authored
These fixups seem to have bitrotted a bit since their introduction in the 2.4 days. As we never had much use for them in the first place, and nothing is using them any more, kill them off the rest of the way. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
Paul Mundt authored
This wasn't really being used for anything useful, so just stub it in pci-lib. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
Paul Mundt authored
Some old boards are still using this in their I/O routines, kill it off. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
Paul Mundt authored
This isn't a real BAR, so prevent any attempts to move it, as we don't wish to encourage a bus luck by overzealous PCI initialization code. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
Paul Mundt authored
This is a verbatim copy of the r2d one, use that instead. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
Paul Mundt authored
Nothing is using this any more, so kill it off. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
Paul Mundt authored
This moves the remaining common bits in to pci-lib. Thereby reducing pci.c/pci-new.c to simple bus fixups and controller registration. As more platforms are moved over, the old code will disappear completely and the pci-new bits will be rolled in to pci-lib, eventually replacing pci.c completely. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
Paul Mundt authored
Now that the io and mem offsets are tracked accordingly, the pci-new version of the bus<->resource mappers can be used generically. This moves them in to pci-lib. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
Paul Mundt authored
This implements a per-hose offset for I/O and mem resources. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
Paul Mundt authored
This moves off of the board_pci_channels[] approach for bus registration and over to a cleaner register_pci_controller(), all derived from the MIPS code. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
Paul Mundt authored
Not all PCI channels have non-translatable memory windows, this is a special property of the on-chip PCIC with its 0xfd00... mapping, handle this explicitly. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
Paul Mundt authored
This consolidates the pci_iomap() definitions and reworks how the I/O port base is handled. PCI channels can register their own I/O map base, or if none is provided, the system-wide generic I/O base is used instead. Functionally nothing changes, while this allows us to kill off lots of I/O address special casing and lookups. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
Paul Mundt authored
This is left over cruft that hasn't been used by anything in a long time, kill off bits that weren't purged previously. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
Paul Mundt authored
This introduces a saner pcibios_align_resource() that can be used regardless of whether pci-auto or pci-new are being used, and consolidates it in pci-lib.c. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
Paul Mundt authored
Derived from the MIPS version, now uses pgprot_noncached(). Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
Paul Mundt authored
This splits off a 'pci-new.c' which is aimed at gradually replacing the pci-auto backend and the arch/sh/drivers/pci/pci.c core respectively. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
Paul Mundt authored
The new PCI code wants its own bus<->resource mappings instead of the generic equivalents, so drop the asm-generic include in preparation. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
- 17 Apr, 2009 12 commits
-
-
Paul Mundt authored
This starts moving out the common initialization bits from the various fixup paths in to the shared init path. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
Paul Mundt authored
Now that the platform code is a bit leaner, we can start consolidating the various IRQ routing implementations. There are effectively only 2 variants, and the others can use those directly. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
Paul Mundt authored
Commit 68b42d1b ("sh: sh7785lcr: Map whole PCI address space.") changed around the semantics of how various chip-selects are made accessible to PCI. Now that there is a single large mapping covering from CS0-CS6, there is no longer any need to do multi-window mapping. Subsequently, all of the differing implementations can be consolidated in to pci-sh7780. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
Paul Mundt authored
This consolidates all of the PCI I/O and memory window definitions across the pci-sh7780 users in pci-sh7780 itself. No functional changes, in that every platform had exactly the same implementation. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
Paul Mundt authored
Presently the I/O port base isn't being set anywhere, which allows things like generic_inl() to blow up. Fix this up to point at the PCI IO window. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
Paul Mundt authored
The SH7780 PCIC contains a read-only cache line size register that we can derive pci_cache_line_size from. So, make sure that the software idea of the cache line size actually matches the host controller's idea. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
Paul Mundt authored
Don't use pci_write_reg() for these, as it defaults to 32-bit. Rather than using the helper, use __raw_writeb() directly. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
Paul Mundt authored
This reworks how the host controller is probed, and makes it a bit more verbose in the event a new type of controller is detected. Additionally, we also log the revision information. This now uses the proper access sizes for the vendor/device registers, rather than relying on a larger access that encapsulated both of them. Not all devices support 32-bit read cycles for these registers. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
Paul Mundt authored
The SH7780 PCI host controller implements a configuration header that requires a fair bit of hand-holding to initialize properly. By default it appears as a pre-2.0 host controller given the zeroed out class code, so fix this up properly. Some boards that happened to be using the R7780RP version of the PCIC fixups had set this correctly, but this belongs in the standard initialization, and is by no means board specific. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
Paul Mundt authored
P1SEGADDR is obsolete and will be killed off completely in the future, so transition off of it and reference P1SEG explicitly. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
Paul Mundt authored
These fixups belong in the board INTC setup code, not in the middle of pci-sh7780.c. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
Paul Mundt authored
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
- 16 Apr, 2009 10 commits
-
-
Paul Mundt authored
Nothing ended up using this anymore, so just kill it off. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
Paul Mundt authored
SE7780 has the same PCIC fixup as SDK7780, and SH7785LCR the same as R7780RP. Switch to using those, and drop the duplicate code. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
Paul Mundt authored
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
Paul Mundt authored
With board_pci_channels now being exported in a single place, update the boards that duplicated the export. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
Magnus Damm authored
Instead of sometimes exporting board_pci_channels[] in the board specific code just export it in one place. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
Magnus Damm authored
Adds a __get_pci_io_base() function which is used to match a port range against struct pci_channel. This allows us to detect if a port range is assigned to pci or happens to be legacy port io. While at it, remove unused cpu-specific cruft. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
Magnus Damm authored
This patch changes the code to use __is_pci_memory() instead of is_pci_memaddr(). __is_pci_memory() loops through all the pci channels on the system to match memory windows. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
Magnus Damm authored
Store the io window base address in struct pci_channel and use that one instead of SH77xx_PCI_IO_BASE. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
Magnus Damm authored
Store the base address of the pci host controller registers in struct pci_channel and use the address in pci_read_reg() and pci_write_reg(). Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-
Magnus Damm authored
Store a struct pci_channel pointer in bus->sysdata. This makes whatever struct pci_channel assigned to a bus available for sh4_pci_read() and sh4_pci_write(). We also modify PCIBIOS_MIN_IO and PCIBIOS_MIN_MEM to use bus->sysdata - this to gives us support for multiple pci channels. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-