- 11 Jan, 2005 40 commits
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Jeff Dike authored
This moves the register shuffling code into arch/um/os-Linux/sys-$(SUBARCH), making it purely userspace code. It also adds an x86_64 implementation of registers.c. Signed-off-by:
Jeff Dike <jdike@addtoit.com> Signed-off-by:
Andrew Morton <akpm@osdl.org> Signed-off-by:
Linus Torvalds <torvalds@osdl.org>
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Jeff Dike authored
This adds architecture-specific Kconfig support, plus Kconfig_i386 and Kconfig_x86_64. Currently the only option defined there is CONFIG_64_BIT. Signed-off-by:
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Jeff Dike authored
This adds the new files from the x86_64 port which just drop in and don't require any work anywhere else. Signed-off-by:
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Jeff Dike authored
This is the three-level page table support from the x86_64 patch. It can be enabled on x86, although it's not particularly needed at this point. However, it can be used to implement very large physical memory (with almost all of it in highmem) on UML. Signed-off-by:
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Jeff Dike authored
This factors out a bunch of non-generic system calls into i386-specific code. It also adds the x86_64-specific system calls. A couple of generic system calls handlers are declared in sysdep-i386 because x86 has no declarations for them, but x86_64 has incompatible ones. Also splits out syscalls on behalf on UML/S390 from Bodo Stroesser Signed-off-by:
Bodo Stroesser <bstroesser@fujitsu-siemens.com> Signed-off-by:
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Jeff Dike authored
Finish using va_list correctly, by calling va_end. Signed-off-by:
Paolo 'Blaisorblade' Giarrusso <blaisorblade_spam@yahoo.it> Signed-off-by:
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Jeff Dike authored
This adds pud_t support to UML. Signed-off-by:
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Zwane Mwaikambo authored
x86_64 uses a userspace mce utility to decode MCEs, this patch will ensure that the user is notified of MCE events being logged too. Signed-off-by:
Zwane Mwaikambo <zwane@arm.linux.org.uk> Signed-off-by:
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Andi Kleen authored
Disable conforming bit on USER32_CS segment No difference, but it's more consistent. Pointed out by Petr Vandrovec and some VMWare people Signed-off-by:
Andi Kleen <ak@suse.de> Signed-off-by:
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Andi Kleen authored
Found by Bodo Stroesser. Description from Bodo: >> On i386, if a signal handler is started, the kernel saves the fpu-state of the interrupted routine in the sigcontext on the stack. Calling unlazy_fpu() and setting current->used_math=0, the kernel supplies the signal-handler with a cleared virtual fpu. On sigreturn(), the old fpu-state of the interrupted routine is restored. If a process never used the fpu, it virtually has a cleared fpu. If such a process is interrupted by a signal handler, no fpu-context is saved and sigcontext->fpstate is set to NULL. Assume, that the signal handler uses the fpu. Then, AFAICS, on sigreturn current->used_math will be 1. Since sigcontext->fpstate still is NULL, restore_sigcontext() doesn't call restore_i387(). Thus, no clear_fpu() is done, current->used_math is not reset. Now, the interrupted processes fpu no longer is cleared! << Fix by AK. Just clear the FPU again when this happens. patch for i386 and x86-64. Signed-off-by:
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Andi Kleen authored
Fix a lot of broken white space in arch/x86_64/kernel/setup.c Only touches white space, no functional changes. Signed-off-by:
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Andi Kleen authored
Pointed out by Matthew Wilcox. Signed-off-by:
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Andi Kleen authored
From: Matt Tolentino Some cleanup work in early page table init preparing for memory hotplug. Hacked up by AK Signed-off-by:
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Andi Kleen authored
Merged from i386 Signed-off-by:
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Andi Kleen authored
This will help only on gcc 4+. On older gccs there is a workaround too, but it is so ugly and there are no actual observed failures that I didn't apply it. Signed-off-by:
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Andi Kleen authored
The original check was apparently to work around some old BIOS bugs and we just assume x86-64 machines don't have this class of problems. Originally found by <YhLu@tyan.com> Signed-off-by:
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Andi Kleen authored
This removes all but one direct reference to mem_map for x86-64. This is needed on systems where we break the mem_map up and directly indexing into mem_map to get the page structure doesn't work anymore. Signed-off-by:
Matt Tolentino <matthew.e.tolentino@intel.com> Signed-off-by:
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Andi Kleen authored
Add new key syscalls. Signed-off-by:
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Andi Kleen authored
This fixes the erroneous No mptables found printk on x86_64 mpparse. We will only print the message now if no mptables are found after all scans complete. Signed-off-by:
Justin M. Forbes <jmforbes@linuxtx.org> Signed-off-by:
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Andi Kleen authored
change_page_attr logic fixes from Andrea This avoids reference counting leaks and adds BUGs for more wrong cases. Signed-off-by:
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Andi Kleen authored
On K8 L1 TLB is inclusive, so don't include it in the TLB count. Signed-off-by:
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Andi Kleen authored
We need to save the access flags to properly restore the direct mapping on unmap. For that we use some upper bits in vm_flags Also add a comment for that to the header file. Signed-off-by:
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Andi Kleen authored
Move memset_io out of line to avoid warnings. Signed-off-by:
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Andi Kleen authored
This is needed for the powernow k8 driver to manage AMD dual core systems. (see explanation in previous CMP patch for more details) Signed-off-by:
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Andi Kleen authored
Count both multi cores and SMP siblings in /proc/cpuinfo siblings. This avoids breaking user space licensing managers who license by CPU on dual core systems. Port of the equivalent code on x86-64. Signed-off-by:
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Andi Kleen authored
AMD dual core support for i386 Run HT initialization on AMD dual core CPUs on i386. They fake being HT CPUs. This patch makes the HT detection run on AMD CPUs too. I moved the HT detection code into a common file from intel.c for that. It would be actually better to run HT detection always on all CPUs but this would need a second callback afterwards to AMD code, which I avoided for now. It adds a cpuinfo->x86_num_cores field. This sets up the phys_proc_id[] array. This overloads this array with HT, but when smp_num_siblings is 1 It is currently only used for /proc/cpuinfo printing. The reason we want to behave this like SMT is that there are some license managers in user space that license according to number of physical CPUs, and when they handle HT they should handle CMP with this hack too. Another reason we need this is that the powernow k8 driver needs this information to properly manage dual core CPUs. When there are ever dual core HT CPUs this will need small changes in smpboot.c. I didn't do this for now to keep the patch simple. Then we set smp_num_siblings to 1 on these systems again to prevent the scheduler from setting up HT scheduling (which is not a very good match for dual core). This is a port of the CMP support code from x86-64 (minus the NUMA bits) Signed-off-by:
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Andi Kleen authored
Port missing cpuid bits from x86-64 to i386 Signed-off-by:
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Andi Kleen authored
Fix some gcc 4 warnings in arch/x86_64 There are tons more outside though. Signed-off-by:
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Andi Kleen authored
Fix sparse warnings warning: cast removes address space of expression for uses of put_user() on x86_64 caused by doing __m(addr) in __put_user_asm() with addr a __user pointer. Signed-off-by:Roland Dreier <roland@topspin.com> Signed-off-by:
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Andi Kleen authored
Remove old-checksum.c Remove nowhere referenced file. (egrep "filename\." didn't find anything) Signed-off-by:
Domen Puncer <domen@coderock.org> Signed-off-by:
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Andi Kleen authored
Update x86-64 defconfig Signed-off-by:
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Andi Kleen authored
Updates for x86-64 boot-options.txt Signed-off-by:
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Andi Kleen authored
Hack to disable clustered mode on AMD systems Make sure AMD big flat apic mode is not confused with clustered APIC mode. Ugly hack, but no better way found. Signed-off-by:
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Andi Kleen authored
Work around another aperture BIOS bug on Opteron Based on debugging&code from Vincent ETIENNE <ve@vetienne.net> >> I have some problem with AGP initialization with my board : IWILL DK8N (Bi opteron chipset NFORCE3 ). I use kernel 2.6.10-rc3-mm1, but i have try with IOMMU reports a 128MB aperture for CPU0 ( that's the value i used in my bios) at F0000000 but only 32MB at 4000000 for CPU1 << This patch checks for this condition and fixes the other CPUs up. Signed-off-by:
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Prakash Cheemplavam authored
current state: Systems with Nforce2 could freeze on high disk i/o activity in APIC mode when CPU Disconnect is enabled. If bios doesn't fix this, current kernel fix changes the registers according to follwing table: * Chip Old value New value * C17 0x1F0FFF01 0x1F01FF01 * C18D 0x9F0FFF01 0x9F01FF01 But this is only done, if cpu disconnect has been enabled in bios. why change this: If CPU disconnect is not enabled in bios, and bios is broken (some manufacturers like Abit don't care about their customers and even the latest bios doesn't fix this; I have an Abit mainboard), the kernel doesn't apply the fix, so if cpu disconnect is enabled at a later stage (in userspace), the system will be unstable and most likely freeze. new behaviour: The fix is now applied regardless of cpu disconnect being enabled at boot time, or not. As you only have to change byte 3 to 0x01, reading out chipset version isn't needed, so the patch simplifies the fix. Now turning cpu disconnect on, at later stage won't break the system, and if it was already enabled, it gets fixed, as the old version did. Signed-off-by:Prakash Punnoor <prakashp@arcor.de> Acked-by:
Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> Signed-off-by:
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Prasanna S. Panchamukhi authored
The address used by the kprobes handler was not correct if the application was using LDT entries for code segment. This patch fixes the above problem by calculating the address using base address of the current code segment. Also this patch removes the inline prefix of kprobe_handler() . Signed-off-by:
Prasanna S Panchamukhi <prasanna@in.ibm.com> Signed-off-by:
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Herbert Pötzl authored
hopefully 'better' fix for broken Intel Mercury/Neptune in wait_8254_wraparound() ... Rationale: changing HZ to higher values (like 5k,10k or 20k) will hang machines using wait_8254_wraparound() indefinitely, because a suboptimal workaround for buggy Intel Mercury/Neptune chipsets is in place. this was tested on several machines, unfortunately none with a broken Intel Mercury/Neptune chipset, and it works fine with various HZ values ... Signed-off-by:
Herbert Pötzl <herbert@13thfloor.at> Signed-off-by:
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Anton Blanchard authored
On UP builds we include lots of spare pacas. Lets get rid of them and save some space. Also catch the small SMP case. Signed-off-by:
Anton Blanchard <anton@samba.org> Signed-off-by:
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Anton Blanchard authored
From: Domen Puncer <domen@coderock.org> semicolon in rtasd.c Signed-off-by:
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Anton Blanchard authored
From: Nathan Lynch <nathanl@austin.ibm.com> Ran into this on a 4GB partition - all but about ~300MB was thrown away. It works for me, but I've not tested on firmware without the bug. Fall back to non-numa setup upon discovering unexpected memory layout as presented by firmware, instead of throwing away regions. Signed-off-by:
Nathan Lynch <nathanl@austin.ibm.com> Acked-by:
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