- 11 Aug, 2014 2 commits
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Sonny Rao authored
This patch changes the fifo reset code to follow the reset procedure outlined in the documentation of Synopsys Mobile storage host databook. Signed-off-by: Sonny Rao <sonnyrao@chromium.org> Signed-off-by: Yuvaraj Kumar C D <yuvaraj.cd@samsung.com> Acked-by: Seungwon Jeon <tgih.jun@samsung.com> [sonnyrao: fix compile for !CONFIG_MMC_DW_IDMAC case] Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Laurent Pinchart authored
This simplifies probe error and remove code paths. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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- 26 Jul, 2014 9 commits
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Laurent Pinchart authored
Even though some implementations support 4-bytes data register access, the tmio driver never configures the hardware in such a way and always performs 2-bytes accesses. Hardcode the DMA transfer size to 2 bytes. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Laurent Pinchart authored
The data register is 4 bytes wide, hardcode the DMA transfer size to 4 bytes in both directions. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Laurent Pinchart authored
Commit e5a233cb ("mmc: sh_mmcif: Factorize DMA channel request and configuration code") incorrectly set the destination address for both slave channels instead of setting the source address for the receive channel. Fix that. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Laurent Pinchart authored
The sh-mmcif driver implements DT support but the bindings are not documented. Document them. Cc: devicetree@vger.kernel.org Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Chuanxiao.Dong authored
It is not required (in fact it even is not recommended) that a PCI driver's suspend() callback save the standard configuration registers of the device, prepare it for waking up the system, or put it into a low-power state. All of these operations can very well be taken care of by the PCI subsystem, without the driver's participation. Thus remove these PCI functions. For the device which has wake up capability, use device_init_wakeup to init the wake up capability so that PCI core will help to enable the wakeup for it. Signed-off-by: Chuanxiao Dong <chuanxiao.dong@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Lukas Czerner authored
Currently when the device secure discard implementation is blacklisted (MMC_QUIRK_SEC_ERASE_TRIM_BROKEN quirk is set) instead of secure discard we're going to do normal discard, which is wrong. When the secure discard is known to be broken we should just disallow it entirely and not advertise this functionality to the user. Fix it. Also move mmc_fixup_device() in from of mmc_blk_alloc() so we can get quirks set before we attempt to set queue information. Signed-off-by: Lukas Czerner <lczerner@redhat.com> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Georgi Djakov authored
Increase the build testing coverage. Signed-off-by: Georgi Djakov <gdjakov@mm-sol.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Georgi Djakov authored
The header <linux/regulator/consumer.h> is unused. Remove it. Signed-off-by: Georgi Djakov <gdjakov@mm-sol.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Georgi Djakov authored
The DT binding example in the documentation is missing the -supply suffix for the vmmc and vqmmc regulators. Fix it. Signed-off-by: Georgi Djakov <gdjakov@mm-sol.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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- 10 Jul, 2014 7 commits
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Maurice Petallo authored
This is to enable DDR50 bus speed mode with 1.8V signaling capability for BayTrail ACPI and PCI mode eMMC Controller. Signed-off-by: Maurice Petallo <mauricex.r.petallo@intel.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Maurice Petallo authored
"SDHCI_QUIRK2_PRESET_VALUE_BROKEN" quirk is added to prohibit preset value enabling for Baytrail eMMC controller. Signed-off-by: Maurice Petallo <mauricex.r.petallo@intel.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Geert Uytterhoeven authored
If NO_DMA=y: drivers/built-in.o: In function `usdhi6_dma_setup': usdhi6rol0.c:(.text+0x5c35fc): undefined reference to `dma_map_sg' drivers/built-in.o: In function `usdhi6_dma_stop_unmap': usdhi6rol0.c:(.text+0x5c3738): undefined reference to `dma_unmap_sg' Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Geert Uytterhoeven authored
If NO_DMA=y: drivers/built-in.o: In function `sh_mmcif_start_dma_tx': sh_mmcif.c:(.text+0x5a3286): undefined reference to `dma_map_sg' drivers/built-in.o: In function `sh_mmcif_start_dma_rx': sh_mmcif.c:(.text+0x5a33fc): undefined reference to `dma_map_sg' drivers/built-in.o: In function `sh_mmcif_end_cmd': sh_mmcif.c:(.text+0x5a3668): undefined reference to `dma_unmap_sg' Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Geert Uytterhoeven authored
If NO_DMA=y: drivers/built-in.o: In function `omap_hsmmc_pre_dma_transfer': omap_hsmmc.c:(.text+0x5a0928): undefined reference to `dma_map_sg' drivers/built-in.o: In function `omap_hsmmc_dma_cleanup': omap_hsmmc.c:(.text+0x5a0e8e): undefined reference to `dma_unmap_sg' drivers/built-in.o: In function `omap_hsmmc_dma_callback': omap_hsmmc.c:(.text+0x5a1f58): undefined reference to `dma_unmap_sg' drivers/built-in.o: In function `omap_hsmmc_post_req': omap_hsmmc.c:(.text+0x5a2082): undefined reference to `dma_unmap_sg' Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Peter Griffin authored
This patch adds the device tree binding documentation for the ST SDHCI driver. It documents the differences between the core properties described by mmc.txt and the properties used by the sdhci-st driver. Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Acked-by: Lee Jones <lee.jones@linaro.org> Acked-by: Maxime Coquelin <maxime.coquelin@st.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Peter Griffin authored
This platform driver adds initial support for the SDHCI host controller found on STMicroelectronics SoCs. It has been tested on STiH41x b2020 platforms currently. Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Acked-by: Lee Jones <lee.jones@linaro.org> Acked-by: Maxime Coquelin <maxime.coquelin@st.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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- 09 Jul, 2014 22 commits
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Geert Uytterhoeven authored
The driver already supports the r8a7791 SoC, and "renesas,sdhi-r8a7791" is already in use. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Cc: Ian Molton <ian.molton@codethink.co.uk> Cc: Chris Ball <chris@printf.net> Cc: linux-mmc@vger.kernel.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Vasily Khoruzhick authored
Utilise new s3c24xx-dma dmaengine driver for DMA ops. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Thierry Reding authored
This doesn't seem to be used any longer and removing the include fixes 64-bit ARM builds. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Roman Peniaev authored
In case of reboot my olinuxino imx23 board does not see mmc card any more. mmc_rescan is being called by delayed work in loop, but mxs_mmc_get_cd always returns 0, so we will never pass the card detection check and will not do further card inition. This patch is just an attempt to partially revert the patch a91fe279 of Sascha Hauer, where it is claimed that upper layer will handle broken card detection using the polling logic and MMC_CAP_NEEDS_POLL capability, but seems it is not true, because upper logic still expects 1 from 'get_cd'. So, here we always return 1 (card present) in case of MMC_CAP_NEEDS_POLL capability set. Signed-off-by: Roman Pen <r.peniaev@gmail.com> CC: Chris Ball <chris@printf.net> CC: Sascha Hauer <s.hauer@pengutronix.de> CC: Fabio Estevam <fabio.estevam@freescale.com> CC: Shawn Guo <shawn.guo@linaro.org> CC: Ulf Hansson <ulf.hansson@linaro.org> CC: linux-mmc@vger.kernel.org CC: linux-kernel@vger.kernel.org Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Vasily Khoruzhick authored
Use clk_prepare_enable/clk_disable_unprepare to make the driver work properly with common clock framework. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Romain Izard authored
As stated by the eMMC 5.0 specification, a chip should not be rejected only because of the revision stated in the EXT_CSD_REV field of the EXT_CSD register. Remove the control on this value, the control of the CSD_STRUCTURE field should be sufficient to reject future incompatible changes. Signed-off-by: Romain Izard <romain.izard.pro@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Markus Mayer authored
After the switch to the MMC core regulator infrastucture, we already have a local "mmc" pointer in various functions. There is no longer a need to access the data structure via host->mmc. Signed-off-by: Markus Mayer <markus.mayer@linaro.org> Reviewed-by: Matt Porter <mporter@linaro.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Russell King authored
The MMC core in mmc_set_signal_voltage() already provides for the delay required to switch to 1.8V, so there is no need for drivers to perform this wait themselves. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Derek Browne authored
This patch is to enable SDIO host controller for Intel Quark X1000. Signed-off-by: Derek Browne <Derek.Browne@intel.com> Signed-off-by: Alvin (Weike) Chen <alvin.chen@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Ulf Hansson authored
While merging the sdhci patchset from Russell King, somehow a blank line was left behind. Let's correct the formatting. Cc: Chris Ball <chris@printf.net> Cc: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Tim Kryger authored
A standard compliant SDHCI can itself supply VDD at 1.8, 3.0, or 3.3v. Several vendors ignore this and instead rely upon external regulators to supply VDD. While the external regulators typically can supply one of the standard SDHCI voltage levels, there is no real reason for this to be a hard requirement. This patch alters the SDHCI driver such that external VDD regulators that provide voltages other than the three mentioned above may be used so long as they can supply a voltage that meets the needs of the card. In the case that an external VDD regulator is provided, it is reasonable to ignore the voltage capabilities of the host controller and allow the external regulator to set the OCR mask. Additionally, there is no need to convert a VDD voltage request into one of the standard SDHCI voltage levels or program it in the host controller's power control register. Signed-off-by: Tim Kryger <tim.kryger@gmail.com> Tested-by: Sachin Kamat <spk.linux@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Peter Griffin authored
Currently the documentation doesn't match the code in mmc_of_parse. This patch rectifies this. Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Axel Lin authored
It's a NOOP since 2.6.35 and it will be removed one day. This is not trivial because current code uses hard coded 32 instead of IRQF_DISABLED in the request_irq call. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Axel Lin authored
For MMC_BUS_WIDTH_8 case, current code missed setting BM_EIGHTBIT_MODE bit. Also has a small refactor to make the code looks better in readability. So the bit settings witch below logic: SDMMC_BUSMODE register: Set EIGHTBIT_MODE bit for 8 bit mode, Set FOURBIT_MODE bit for 4 bit mode. Clear both EIGHTBIT_MODE and FOURBIT_MODE bits for 1 bit mode. SDMMC_EXTCTRL register: Set EXT_EIGHTBIT bit for 8 bit mode, Clear EXT_EIGHTBIT bit for 1/4 bit mode. Add define for EXT_EIGHTBIT to avoid using magic number. BM_ONEBIT_MASK is no longer used, thus remove it. This patch is untested due to lack of platform with 8-bit hardware. However since the code is there, it's good to make the code match the document. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Johan Rudholm authored
The initialization of some SD-cards fails because the card never leaves the busy state. Aid trouble shooting by indicating this in the kernel log. Signed-off-by: Johan Rudholm <johanru@axis.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Sachin Kamat authored
version.h inclusion is not needed as suggested by versioncheck. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Cc: Jonas Jensen <jonas.jensen@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Andreas Fenkart authored
The am335x can't detect pending cirq in PM runtime suspend. This patch reconfigures dat1 as a GPIO before going to suspend. SDIO interrupts are detected with the GPIO, the GPIO will only wake the module from suspend, SDIO irq detection will still happen through the IP block. Idea of remuxing the pins by Tony Lindgren. Code contributions from Tony Lindgren and Balaji T K <balajitk@ti.com> Signed-off-by: Andreas Fenkart <afenkart@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com> Acked-by: Balaji T K <balajitk@ti.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Andreas Fenkart authored
These are predefined states of the driver model. When not present, as if not set in the device tree, they become no-ops. Explicitly selecting the default state is not needed since the device core layer sets pin mux to "default" state before probe. This is not the simplest implementation, on AM335x at least, we could switch to idle at any point in the suspend hook, only the default state needs to be set before writing to the irq registers or an IRQ might get lost. Acked-by: Balaji T K <balajitk@ti.com> Signed-off-by: Andreas Fenkart <afenkart@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Andreas Fenkart authored
On multicores, an sdio irq handler could be running in parallel to runtime suspend. In the worst case it could be waiting for the spinlock held by the runtime suspend. When runtime suspend is complete and the functional clock (fclk) turned off, the irq handler will continue and cause a SIGBUS on the first register access. Acked-by: Balaji T K <balajitk@ti.com> Signed-off-by: Andreas Fenkart <afenkart@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Balaji T K authored
To detect sdio irqs properly without spurious events, OMAP4 needs IWE in CON and CTPL, CLKEXTFREE in HCTL to be set Tested-by: Andreas Fenkart <afenkart@gmail.com> Signed-off-by: Balaji T K <balajitk@ti.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Andreas Fenkart authored
Add SDIO IRQ entries to debugfs entry. Note that PSTATE shows current state of data lines, incl. SDIO IRQ pending Signed-off-by: Andreas Fenkart <afenkart@gmail.com> Acked-by: Balaji T K <balajitk@ti.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Andreas Fenkart authored
There have been various patches floating around for enabling the SDIO IRQ for hsmmc, but none of them ever got merged. Probably the reason for not merging the SDIO interrupt patches has been the lack of wake-up path for SDIO on some omaps that has also needed remuxing the SDIO DAT1 line to a GPIO making the patches complex. This patch adds the minimal SDIO IRQ support to hsmmc for omaps that do have the wake-up path. For those omaps, the DAT1 line need to have the wake-up enable bit set, and the wake-up interrupt is the same as for the MMC controller. This patch has been tested on am3730 es1.2 with mwifiex connected to MMC3 with mwifiex waking to Ethernet traffic from off-idle mode. Note that for omaps that do not have the SDIO wake-up path, this patch will not work for idle modes and further patches for remuxing DAT1 to GPIO are needed. Based on earlier patches [1][2] by David Vrabel <david.vrabel@csr.com>, Steve Sakoman <steve@sakoman.com> For now, only support SDIO interrupt if we are booted with a separate wake-irq configued via device tree. This is because omaps need the wake-irq for idle states, and some omaps need special quirks. And we don't want to add new legacy mux platform init code callbacks any longer as we are moving to DT based booting anyways. To use it, you need to specify the wake-irq using the interrupts-extended property. [1] http://www.sakoman.com/cgi-bin/gitweb.cgi?p=linux.git;a=commitdiff_plain;h=010810d22f6f49ac03da4ba384969432e0320453 [2] http://comments.gmane.org/gmane.linux.kernel.mmc/20446Acked-by: Balaji T K <balajitk@ti.com> Signed-off-by: Andreas Fenkart <afenkart@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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