- 04 Feb, 2022 13 commits
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Vinod Koul authored
Document the SM8450 HDK board Signed-off-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220203090031.3128702-1-vkoul@kernel.org
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Douglas Anderson authored
It's weird that there's a blank line between the two port nodes but not between the attributes and the first port node. Add an extra blank line to make it look right. Signed-off-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220202132301.v3.11.Iecb7267402e697a5cfef4cd517116ea5b308ac9e@changeid
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Douglas Anderson authored
Pulls should be in the board files, not in the SoC dtsi file. Remove. Even though the sc7280 boards don't currently refer to dp_hot_plug_det, let's re-add the pulls there just to keep this as a no-op change. If boards don't need this / don't want it later then we can remove it from them. Signed-off-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220202132301.v3.10.Id346b23642f91e16d68d75f44bcdb5b9fbd155ea@changeid
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Douglas Anderson authored
Pullups and drive strength don't belong in the SoC dtsi file. Move to the board file. Signed-off-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220202132301.v3.8.Iffff0c12440a047212a164601e637b03b9d2fc78@changeid
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Douglas Anderson authored
Like dp_out, we should have defined edp_out in sc7280.dtsi so we don't need to do this in the board files. Like dp_hot_plug_det, we should define edp_hot_plug_det in sc7280.dtsi. We should set the default pinctrl for edp_hot_plug_det in sc7280.dtsi. NOTE: this is _unlike_ the dp_hot_plug_det. It is reasonable that in some boards the dedicated DP Hot Plug Detect will not be hooked up in favor of Type C mechanisms. This is unlike eDP where the Hot Plug Detect line (which functions as "panel ready" in eDP) is highly likely to be used by boards. Signed-off-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220202132301.v3.7.Ic84bb69c45be2fccf50e3bd17b845fe20eec624c@changeid
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Douglas Anderson authored
The two nodes were mis-sorted. Reorder. This is a no-op change. Signed-off-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220202132301.v3.6.I874c6f2a62b7922a33e10d390a8983219a76250b@changeid
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Douglas Anderson authored
Specifying "input-enable" on a MSM GPIO is a no-op for the most part. The only thing it really does is to explicitly force the output of a GPIO to be disabled right at the point of a pinctrl transition. We don't need to do this and we don't typically specify "input-enable" unless there's a good reason to. Remove it. Signed-off-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220202132301.v3.5.Ibaf8a803802beb089cc6266b37e6156cff3ddaec@changeid
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Douglas Anderson authored
This patch makes a few improvements to the way that sdc1 / sdc2 pinctrl is specified on sc7280: 1. There's no reason to "group" the sdc pins into one overarching node and there's a downside: we have to replicate the hierarchy in the board device tree files. Let's clean this up. 2. There's really not a lot of reason not to list the "pinctrl" for sdc1 (eMMC) in the SoC dtsi file. These aren't GPIO pins and everyone's going to specify the same pins. 3. Even though it's likely that boards will need to override pinctrl for sdc2 (SD card) to add the card detect GPIO, we can be symmetric and add it to the SoC dsti file. 4. Let's get rid of the word "on" from the normal config and add a "sleep" suffix to the sleep config. This looks cleaner to me. This is intended to be a no-op change but it could plausibly change behavior depending on how the pinctrl code parses things. One thing to note is that "SD card detect" is explicitly listed now as keeping its pull enabled in sleep since we still want to detect card insertions even if the controller is suspended (because no card is inserted). The pinctrl framework likely did this anyway, but it's nice to see it explicit. Signed-off-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220202132301.v3.4.I79baad7f52351aafb470f8b21a9fa79d7031ad6a@changeid
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Douglas Anderson authored
The sdc1 / sdc2 pinctrl lines were randomly stuffed in the middle of the qup pinctrl lines. Sort them properly. This is a no-op change. Just code movement. Signed-off-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220202132301.v3.3.I6ae594129a8ad3d18af9f5ebffd895b4f6353a0a@changeid
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Douglas Anderson authored
Some of the fixed regulators were missing the "-regulator" suffix. Add it to be consistent within the file and consistent with the fixed regulators in sc7180-trogdor. Signed-off-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220202132301.v3.2.I627e60c5488d54a45fd1482ca19f0f6e45192db2@changeid
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Douglas Anderson authored
All of the other fixed regulators have the "-regulator" suffix. Add it to pp3300_hub to match. Signed-off-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220202132301.v3.1.I7b284531f1c992932f7eef8abaf7cc5548064f33@changeid
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Bjorn Andersson authored
Enable the audio, compute, sensor and modem remoteproc and specify firmware path for these on the Qualcomm SM8450 QRD. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20220128025513.97188-14-bjorn.andersson@linaro.org
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Bjorn Andersson authored
The Qualcomm SM8450 carries the familiar set of audio, compute, sensor and modem remoteprocs. Add these and their dependencies. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20220128025513.97188-13-bjorn.andersson@linaro.org
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- 03 Feb, 2022 1 commit
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Alex Elder authored
At least three platforms require the "qcom,qmp" property to be specified, so the IPA driver can request register retention across power collapse. Update DTS files accordingly. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220201140723.467431-1-elder@linaro.org
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- 01 Feb, 2022 26 commits
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Alexander Martinz authored
Add initial support for the SHIFT SHIFT6mq (axolotl) based on the sdm845-mtp DT. Currently supported features: * Buttons (power, volume) * Bluetooth, DSPs and modem * Display and GPU * Touch * UART * USB peripheral mode * WLAN Co-developed-by: Caleb Connolly <caleb@connolly.tech> Signed-off-by: Caleb Connolly <caleb@connolly.tech> Signed-off-by: Alexander Martinz <amartinz@shiftphones.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220123173650.290349-7-caleb@connolly.tech
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Caleb Connolly authored
The OnePlus 6 and 6T feature a BQ27411 fuel gauge for reading the battery stats. Enable it and add a simple battery to document the battery specs of each device. Signed-off-by: Caleb Connolly <caleb@connolly.tech> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220120184546.499030-1-caleb@connolly.tech
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Baruch Siach authored
Reference clock period for rate of 24MHz is 41ns (0x29). Link: https://lore.kernel.org/r/1965fc315525b8ab26cf9f71f939c24d@codeaurora.org Link: https://lore.kernel.org/r/a1932eba-564c-fe32-f220-53aa75250105@seco.com Fixes: 20bb9e3d ("arm64: dts: qcom: ipq6018: add usb3 DT description") Reported-by: Kathiravan T <kathirav@codeaurora.org> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/4f4df55cf44cd0fd7d773aca171d4f48662fb1a5.1642704221.git.baruch@tkos.co.il
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Petr Vorel authored
to follow the naming convention used by other DTS files. Signed-off-by: Petr Vorel <petr.vorel@gmail.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220113233358.17972-5-petr.vorel@gmail.com
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Petr Vorel authored
This is needed due changes in commit 0519d1d0 ("clk: qcom: gcc-msm8994: Modernize the driver"), which removed struct clk_fixed_factor. Preparation for next commit for enabling SD/eMMC. Inspired by 2c2f64ae. This is required for both msm8994-huawei-angler (sdhc1 will be enabled in next commit) and msm8992-lg-bullhead (where actually fixes sdhc1 - tested on bullhead rev 1.01). Fixes: 0519d1d0 ("clk: qcom: gcc-msm8994: Modernize the driver") Signed-off-by: Petr Vorel <petr.vorel@gmail.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220113233358.17972-4-petr.vorel@gmail.com
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Manivannan Sadhasivam authored
Fix the MSI IRQ used for PCIe instances 1 and 2. Cc: stable@vger.kernel.org Fixes: e53bdfc0 ("arm64: dts: qcom: sm8250: Add PCIe support") Reported-by: Jordan Crouse <jordan@cosmicpenguin.net> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220112035556.5108-1-manivannan.sadhasivam@linaro.org
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Maulik Shah authored
This change updates/corrects below cpuidle parameters 1. entry-latency, exit-latency and residency for various idle states. 2. arm,psci-suspend-param which is same for CLUSTER_SLEEP_0/1 states. 3. Add CLUSTER_SLEEP_1 in CLUSTER_PD. Cc: devicetree@vger.kernel.org Fixes: 5188049c ("arm64: dts: qcom: Add base SM8450 DTSI") Signed-off-by: Maulik Shah <quic_mkshah@quicinc.com> Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> [bjorn: Split domain-idle-states, per Ulf's request] Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1641749107-31979-5-git-send-email-quic_mkshah@quicinc.com
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Maulik Shah authored
Correct the TCS config by updating the number of TCSes for each type. Cc: devicetree@vger.kernel.org Fixes: b7e8f433 ("arm64: dts: qcom: Add basic devicetree support for SM8350 SoC") Signed-off-by: Maulik Shah <quic_mkshah@quicinc.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1641749107-31979-4-git-send-email-quic_mkshah@quicinc.com
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Maulik Shah authored
This change adds various idle states and add devices to power domains. Cc: devicetree@vger.kernel.org Signed-off-by: Maulik Shah <quic_mkshah@quicinc.com> Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1641749107-31979-3-git-send-email-quic_mkshah@quicinc.com
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Maulik Shah authored
Correct the TCS config by updating the number of TCSes for each type. Cc: devicetree@vger.kernel.org Fixes: d8cf9372 ("arm64: dts: qcom: sm8150: Add apps shared nodes") Signed-off-by: Maulik Shah <quic_mkshah@quicinc.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1641749107-31979-2-git-send-email-quic_mkshah@quicinc.com
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Kathiravan T authored
On IPQ8074, 4MB of memory is needed for TZ. So mark that region as reserved. Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com> [bjorn: Squash with existing reserved-memory node] Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1641560078-860-1-git-send-email-quic_kathirav@quicinc.com
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Robert Marko authored
IPQ8074 uses SMEM like other modern QCA SoC-s, so since its already supported by the kernel add the required DT nodes. Signed-off-by: Robert Marko <robimarko@gmail.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220106212512.1970828-1-robimarko@gmail.com
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Thara Gopinath authored
Add LMh nodes for cpu cluster0 and cpu cluster1 for sm8150 SoC. Signed-off-by: Thara Gopinath <thara.gopinath@linaro.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220106173138.411097-3-thara.gopinath@linaro.org
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Petr Vorel authored
Fixes: bd943653 ("arm64: dts: qcom: Add device tree for Samsung J5 2015 (samsung-j5)") Signed-off-by: Petr Vorel <petr.vorel@gmail.com> Reviewed-by: Stephan Gerhold <stephan@gerhold.net> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211231213635.116324-1-petr.vorel@gmail.com
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Marijn Suijten authored
This reverts commit c23f1b77. The SM6125_VDDCX constant was replaced with 0 temporarily as the header patch defining this constant resided in a different branch, creating an unwanted dependency of the dts branch on the drivers branch. Now (by the time this patch will be applied) that both branches have been merged upstream, it is safe to revert to the constant again. Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211229220117.293542-1-marijn.suijten@somainline.org
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David Heidelberg authored
qcom,init-seq registers are in pairs Signed-off-by: David Heidelberg <david@ixit.cz> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211229193731.72690-1-david@ixit.cz
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Luca Weiss authored
WLED is used for controlling the display backlight on this phone, so configure the node and enable it. Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211229170358.2457006-5-luca.weiss@fairphone.com
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Luca Weiss authored
WLED is used for controlling the backlight on some boards, add the node for it. Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211229170358.2457006-4-luca.weiss@fairphone.com
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David Heidelberg authored
Follow common pattern for this device, first specific and then generic compatible. Signed-off-by: David Heidelberg <david@ixit.cz> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211227215238.113956-1-david@ixit.cz
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Baruch Siach authored
Add the generic 'max-link-speed' property to describe the IPQ6018 PCIe link generation limit. This allows the generic dwc code to configure the link speed correctly. Signed-off-by: Baruch Siach <baruch.siach@siklu.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/fcf41277cf8529437374a5c10b2b1fcad30cd7c2.1640587131.git.baruch@tkos.co.il
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Petr Vorel authored
Signed-off-by: Petr Vorel <petr.vorel@gmail.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211223083153.22435-3-petr.vorel@gmail.com
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Petr Vorel authored
Signed-off-by: Petr Vorel <petr.vorel@gmail.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211223083153.22435-2-petr.vorel@gmail.com
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Vladimir Zapolskiy authored
The change adds SM8250 cpufreq-epss controller interrupts for each CPU core cluster. Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> Cc: Thara Gopinath <thara.gopinath@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211223075640.2924569-1-vladimir.zapolskiy@linaro.org
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David Heidelberg authored
dt-schema expect to have fallback compatible, which is now in-place. Fixes warning generated by `make qcom/sdm845-oneplus-fajita.dtb`: arch/arm64/boot/dts/qcom/sdm845-oneplus-fajita.dt.yaml: power-controller@c300000: compatible: ['qcom,sdm845-aoss-qmp'] is too short From schema: Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml Signed-off-by: David Heidelberg <david@ixit.cz> Komu: David Heidelberg <david@ixit.cz> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211220211443.106754-1-david@ixit.cz
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David Heidelberg authored
QCOM BAM parses property `qcom,controlled-remotely` as a boolean, adjust dts to reflect that. Discovered while converting text documentation into yaml format. Signed-off-by: David Heidelberg <david@ixit.cz> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211220145526.49102-1-david@ixit.cz
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Rob Herring authored
The msm8998 cache nodes have some issues. First, L1 caches are described within cpu nodes, not as separate nodes. The 'next-level-cache' property is of course in the correct location, otherwise the cache hierarchy walking would not work. Remove all the L1 cache nodes. Second, 'arm,arch-cache' is not a documented compatible string. "cache" is a sufficient compatible string for the Arm architected caches. Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211217211136.3536443-1-robh@kernel.org
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