The BIT() macro provides a simple and easy to read way of
obtaining bit offsets into things like masks and hardware
registers. In this patch we're simply replacing all
instances of '1 << x' with 'bit(x)'.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

Add AB8540 sub driver to the ABx500 family, pins, pin groups and
gpio range.

As the pin controller (also the ABx500 controllers) is an
inherent part of the SoC and will prevent boot if not
available, select this from the Ux500 SoC Kconfig.
Acked-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Patrice Chotard <patrice.chotard@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

Add AB9540 sub driver to the ABx500 family, pins, pin groups and
gpio range.

As the pin controller (also the ABx500 controllers) is an
inherent part of the SoC and will prevent boot if not
available, select this from the Ux500 SoC Kconfig.
Acked-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Patrice Chotard <patrice.chotard@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

Add AB8505 sub driver to the ABx5x family.

As the pin controller (also the ABx500 controllers) is an
inherent part of the SoC and will prevent boot if not
available, select this from the Ux500 SoC Kconfig.
Acked-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Patrice Chotard <patrice.chotard@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

This adds a subdriver for the AB8500 pinctrl portions.
As the pin controller (also the ABx500 controllers) is an
inherent part of the SoC and will prevent boot if not
available, select this from the Ux500 SoC Kconfig.
Acked-by: Olof Johansson <olof@lixom.net>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

This adds the AB8500 core driver, which will be utilized by
the follow-on drivers for different ABx500 variants.
Sselect the driver from the DBX500_SOC, as this chip is
powering and clocking that SoC.

Cc: Samuel Ortiz <sameo@linux.intel.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

The AB8500 GPIO driver has been marked BROKEN for ages, and we
have something better in store: a shiny new pinctrl driver. So
let use delete this old driver as the first step.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

This updates the AB8500 register map with defines for a few
new chip variants and adds version detection helpers to handle
the different variants.
Acked-by: Samuel Ortiz <sameo@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

The pin controller is an inherent part of the SoC, without
it the system will not boot, thus it needs to be selected
from Kconfig.
Acked-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

The preference is to use '-' instead of '_' in compatible strings.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

'pinctrl_release' is used only in this file. Hence make it static.

Without this patch we get the following sparse error:
drivers/pinctrl/core.c:815:6: warning:
symbol 'pinctrl_release' was not declared. Should it be static?
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

This makes the device core auto-grab the pinctrl handle and set
the "default" (PINCTRL_STATE_DEFAULT) state for every device
that is present in the device model right before probe. This will
account for the lion's share of embedded silicon devcies.

A modification of the semantics for pinctrl_get() is also done:
previously if the pinctrl handle for a certain device was already
taken, the pinctrl core would return an error. Now, since the
core may have already default-grabbed the handle and set its
state to "default", if the handle was already taken, this will
be disregarded and the located, previously instanitated handle
will be returned to the caller.

This way all code in drivers explicitly requesting their pinctrl
handlers will still be functional, and drivers that want to
explicitly retrieve and switch their handles can still do that.
But if the desired functionality is just boilerplate of this
type in the probe() function:

struct pinctrl  *p;

p = devm_pinctrl_get_select_default(&dev);
if (IS_ERR(p)) {
   if (PTR_ERR(p) == -EPROBE_DEFER)
        return -EPROBE_DEFER;
        dev_warn(&dev, "no pinctrl handle\n");
}

The discussion began with the addition of such boilerplate
to the omap4 keypad driver:
http://marc.info/?l=linux-input&m=135091157719300&w=2

A previous approach using notifiers was discussed:
http://marc.info/?l=linux-kernel&m=135263661110528&w=2
This failed because it could not handle deferred probes.

This patch alone does not solve the entire dilemma faced:
whether code should be distributed into the drivers or
if it should be centralized to e.g. a PM domain. But it
solves the immediate issue of the addition of boilerplate
to a lot of drivers that just want to grab the default
state. As mentioned, they can later explicitly retrieve
the handle and set different states, and this could as
well be done by e.g. PM domains as it is only related
to a certain struct device * pointer.

ChangeLog v4->v5 (Stephen):
- Simplified the devicecore grab code.
- Deleted a piece of documentation recommending that pins
  be mapped to a device rather than hogged.
ChangeLog v3->v4 (Linus):
- Drop overzealous NULL checks.
- Move kref initialization to pinctrl_create().
- Seeking Tested-by from Stephen Warren so we do not disturb
  the Tegra platform.
- Seeking ACK on this from Greg (and others who like it) so I
  can merge it through the pinctrl subsystem.
ChangeLog v2->v3 (Linus):
- Abstain from using IS_ERR_OR_NULL() in the driver core,
  Russell recently sent a patch to remove it. Handle the
  NULL case explicitly even though it's a bogus case.
- Make sure we handle probe deferral correctly in the device
  core file. devm_kfree() the container on error so we don't
  waste memory for devices without pinctrl handles.
- Introduce reference counting into the pinctrl core using
  <linux/kref.h> so that we don't release pinctrl handles
  that have been obtained for two or more places.
ChangeLog v1->v2 (Linus):
- Only store a pointer in the device struct, and only allocate
  this if it's really used by the device.

Cc: Felipe Balbi <balbi@ti.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Mitch Bradley <wmb@firmworks.com>
Cc: Ulf Hansson <ulf.hansson@linaro.org>
Cc: Rafael J. Wysocki <rjw@sisk.pl>
Cc: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Rickard Andersson <rickard.andersson@stericsson.com>
Cc: Russell King <linux@arm.linux.org.uk>
Reviewed-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
[swarren: fixed and simplified error-handling in pinctrl_bind_pins(), to
correctly handle deferred probe. Removed admonition from docs not to use
pinctrl hogs for devices]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

Add PIN_CONFIG_SLEW_RATE parameter into pinconf-generic driver.
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

gpiochip_add_pin_range() needs pinctrl device name as parameter.
Currently the parameter is pinctrl description name. So fix it.
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

Add new function to get devname from pinctrl_dev. pinctrl_dev_get_name()
can only get pinctrl description name. If we want to use gpio driver to
find pinctrl device node, we need to fetch the pinctrl device name.
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

The Nomadik Pinctrl driver requires access to some PRCMU registers
in order to run with full functionality. When Device Tree is
disabled the required PRCMU base address is passed in via platform
data, so in order for Device Tree booting to be as functional, we
need a similar mechanism to fetch it from Device Tree.

The new semantics goes like this: Parse the Device Tree and look
for the PRCMU node using a provided Phandle. Obtain the ioremaped
address from that node. If one was supplied via platform data
over-write it with anything found in Device Tree. Fail if either
the prcm_base can't be found if we're running on anything other
than an STN8815 ASIC.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

The AB8500 Pinctrl driver uses PRCMU register addresses to
control Pinctrl related functions. For this to happen, the
Pinctrl driver needs the PRCMU base to work from. We can do
that using standard Open Firmware (of_*) function calls, but
first we need a mechanism to gain access to the PRCMU
device node. We're going to use a Phandle in this case.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
[Added reg-names="prcmu"; to the prcmu DT node]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

Since pinctrl-exynos can support exynos4 and exynos5 so changed
the option name to PINCTRL_EXYNOS for more clarity.

Cc: Thomas Abraham <Thomas.abraham@linaro.org>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

Some pin configurations IP allows to set the current output to the pin.
This patch adds such a parameter to the pinconf-generic mechanism.

This parameter takes as argument the drive strength in mA.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

This adds a driver for the Tegra114 pinmux, and required
parameterization data for Tegra114.

The driver uses the common Tegra pincontrol driver utility
functions to implement the majority of the driver.

This driver is not compatible with the earlier NVIDIA's SoCs,
hence add new compatibile as "nvidia,tegra114-pinmux".

Originally written by Pritesh.
ldewangan:
	- cleanup the patches,
	- remove non-require tables.
	- Use module_platform_driver() for driver registartion.
Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com>
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

NVIDIA's Tegra114 added two more configuration parameter in pinmux i.e.
rcv-sel and drive type.

rcv-sel: Select between High and Normal VIL/VIH receivers.
	RCVR_SEL=1: High VIL/VIH
	RCVR_SEL=0: Normal VIL/VIH

drv_type: Ouptput drive type:
	33-50 ohm driver: 0x1
	66-100ohm driver: 0x0

Add support of these parameters to be configure from DTS file.

Tegra20 and Tegra30 does not support this configuration and hence initialize their
pinmux structure with reg = -1.

Originally written by Pritesh Raithatha.
Changes by ldewangan:
	- remove drvtype_width as it is always 2.
	- Better describe the change.
Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com>
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

commit af1024e0f7cde9023ddd0f3116db03911d5914c0
"pinctrl: skip deferral of hogs"

Attempts to avoid probe deferral on hogged pins, but we
forgot the device tree case. This patch fixes this.

Cc: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reported-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

This implements pin multiplexing and pin configuration for
the Nomadik pin controller using the device tree.
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@stericsson.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Philippe Langlais <philippe.langlais@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

Instead of jumping to a label later in the probe just return
with an error code whenever probe() fails. Make sure to remove
the gpiochip on irqdomain error now that we're at it.
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

Some leftovers in the driver were using NOMADIK_* macros to
translate the irq numbers to offsets, while the first base IRQ
was already being passed from platform data, and the function
setting the disable mask could just as well use the irqdomain.
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

This adds a definition of a generic output configuration
for a certain pin when using the generic pin configuration
library. Whereas driving pins low/high is usually a GPIO
business, you may want to set up pins into a default state
using hogs, and never touch them again. This helps out
with that scenario.

Based on a patch from Patrice Chotard.
Signed-off-by: Patrice Chotard <patrice.chotard@stericsson.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

This fix makes pinctrl-nomadik able to handle
suspend/resume events and change hogged pins states
accordingly.
Signed-off-by: Julien Delacou <julien.delacou@stericsson.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

This fix allows handling sleep mode for hogged
pins in pinctrl. It provides functions to set pins
to sleep/default configurations according to their
current state.
Signed-off-by: Julien Delacou <julien.delacou@stericsson.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

Up until now, as hogs were always taken at the end of the
pin control device registration, it didn't cause any problem.
But when starting to hog pins from the device core it will
cause deferral of the pin controller device itself since the
default pin fetch is done *before* the device probes, so
let's fix this annoyance (which is also aesthetically ugly).

Also take some care to make sure that if any one map entry
results in a deferral rather than a failure, then that
deferral will take precedence.
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

Pull ARM fixes from Russell King.

* 'fixes' of git://git.linaro.org/people/rmk/linux-arm:
  ARM: 7616/1: cache-l2x0: aurora: Use writel_relaxed instead of writel
  ARM: 7615/1: cache-l2x0: aurora: Invalidate during clean operation with WT enable
  ARM: 7614/1: mm: fix wrong branch from Cortex-A9 to PJ4b
  ARM: 7612/1: imx: Do not select some errata that depends on !ARCH_MULTIPLATFORM
  ARM: 7611/1: VIC: fix bug in VIC irqdomain code
  ARM: 7610/1: versatile: bump IRQ numbers
  ARM: 7609/1: disable errata work-arounds which access secure registers
  ARM: 7608/1: l2x0: Only set .set_debug on PL310 r3p0 and earlier

Pull EDAC fixes from Borislav Petkov:
 "Two error path fixes causing a crash and a Kconfig fix for an issue
  which spilled all EDAC suboptions into the 'Device Drivers' menu."

* tag 'edac_fixes_for_3.8' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp:
  EDAC: Cleanup device deregistering path
  EDAC: Fix EDAC Kconfig menu
  EDAC: Fix kernel panic on module unloading

The check for a pmd being in the process of being split was dropped by
mistake by commit d10e63f2 ("mm: numa: Create basic numa page
hinting infrastructure"). Put it back.
Reported-by: Dave Jones <davej@redhat.com>
Debugged-by: Hillf Danton <dhillf@gmail.com>
Acked-by: Andrea Arcangeli <aarcange@redhat.com>
Acked-by: Mel Gorman <mgorman@suse.de>
Cc: Kirill Shutemov <kirill@shutemov.name>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>

Commit 3a50597d ("KEYS: Make the session and process keyrings
per-thread") removed the definition of the thread_group_cred structure,
but left a now unused pointer in struct cred.
Signed-off-by: Marc Dionne <marc.c.dionne@gmail.com>
Signed-off-by: David Howells <dhowells@redhat.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>

Pull ARM SoC fixes from Olof Johansson:
 "People are back from the holiday breaks, and it shows.  Here are a
  bunch of fixes for a number of platforms:
   - A couple of small fixes for Nomadik
   - A larger set of changes for kirkwood/mvebu
     - uart driver selection, dt clocks, gpio-poweroff fixups, a few
       __init annotation fixes and some error handling improvement in
       their xor dma driver.
   - i.MX had a couple of minor fixes (and a critical one for flexcan2
     clock setup)
   - MXS has a small board fix and a framebuffer bugfix
   - A set of fixes for Samsung Exynos, fixing default bootargs and some
     Exynos5440 clock issues
   - A set of OMAP changes including PM fixes and a few sparse warning
     fixups

  All in all a bit more positive code delta than we'd ideally want to
  see here, mostly from the OMAP PM changes, but nothing overly crazy."

* tag 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (44 commits)
  ARM: clps711x: Fix bad merge of clockevents setup
  ARM: highbank: save and restore L2 cache and GIC on suspend
  ARM: highbank: add a power request clear
  ARM: highbank: fix secondary boot and hotplug
  ARM: highbank: fix typos with hignbank in power request functions
  ARM: dts: fix highbank cpu mpidr values
  ARM: dts: add device_type prop to cpu nodes on Calxeda platforms
  ARM: mx5: Fix MX53 flexcan2 clock
  ARM: OMAP2+: am33xx-hwmod: Fix wrongly terminated am33xx_usbss_mpu_irqs array
  pinctrl: mvebu: make pdma clock on dove mandatory
  ARM: Dove: Add pinctrl clock to DT
  dma: mv_xor: fix error handling for clocks
  dma: mv_xor: fix error handling of mv_xor_channel_add()
  arm: mvebu: Add missing ; for cpu node.
  arm: mvebu: Armada XP MV78230 has only three Ethernet interfaces
  arm: mvebu: Armada XP MV78230 has two cores, not one
  clk: mvebu: Remove inappropriate __init tagging
  ARM: Kirkwood: Use fixed-regulator instead of board gpio call
  ARM: Kirkwood: Fix missing sdio clock
  ARM: Kirkwood: Switch TWSI1 of 88f6282 to DT clock providers
  ...

Pull drm update from Dave Airlie:
 "Exynos and Radeon mostly, with a dma-buf and ttm fix thrown in.

  It's a bit big but its mostly exynos license fix ups and I'd rather
  not hold those up since its legally stuff.

  Radeon has a couple of fixes from dma engine work, TTM is just a
  locking fix, and dma-buf fix has been hanging around and I finally got
  a chance to review it."

* 'drm-fixes' of git://people.freedesktop.org/~airlied/linux: (30 commits)
  drm/ttm: fix fence locking in ttm_buffer_object_transfer
  drm/prime: drop reference on imported dma-buf come from gem
  drm/radeon: add quirk for d3 delay during switcheroo poweron for apple macbooks
  drm/exynos: move finish page flip to a common place
  drm/exynos: fimd: modify condition in fimd resume
  drm/radeon: fix DMA CS parser for r6xx linear copy packet
  drm/radeon: split r6xx and r7xx copy_dma functions
  drm/exynos: Use devm_clk_get in exynos_drm_gsc.c
  drm/exynos: Remove redundant NULL check in exynos_drm_gsc.c
  drm/exynos: Remove explicit freeing using devm_* APIs in exynos_drm_gsc.c
  drm/exynos: Use devm_clk_get in exynos_drm_rotator.c
  drm/exynos: Remove redundant NULL check in exynos_drm_rotator.c
  drm/exynos: Remove unnecessary devm_* freeing APIs in exynos_drm_rotator.c
  drm/exynos: Use devm_clk_get in exynos_drm_fimc.c
  drm/exynos: Remove redundant NULL check
  drm/exynos: Remove explicit freeing using devm_* APIs in exynos_drm_fimc.c
  drm/exynos: Use devm_kzalloc in exynos_drm_ipp.c
  drm/exynos: fix gem buffer allocation type checking
  drm/exynos: remove needless parenthesis.
  drm/exynos: fix incorrect interrupt induced by m2m operation.
  ...

Merge tag 'omap-for-v3.8-rc2/fixes-signed-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes

From Tony Lindgren:
The biggest change is a fix to deal with different power state
on omap2 registers that causes issues trying to use common PM code.
Also fix few incorrect registers, and an issue for omap1 USB, and
few sparse fixes for issues that sneaked in with all the clean-up.

* tag 'omap-for-v3.8-rc2/fixes-signed-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: OMAP2+: am33xx-hwmod: Fix wrongly terminated am33xx_usbss_mpu_irqs array
  ARM: OMAP1: fix USB configuration use-after-release
  ARM: OMAP2/3: PRM: fix bogus OMAP2xxx powerstate return values
  ARM: OMAP3: clock data: Add missing enable/disable for EMU clock
  ARM: OMAP4: PRM: Correct wrong instance usage for reading reset sources
  ARM: OMAP4: PRM: fix RSTTIME and RSTST offsets
  ARM: OMAP4: PRM: Correct reset source map
  ARM: OMAP: SRAM: resolve sparse warnings
  ARM: OMAP AM33xx: hwmod data: resolve sparse warnings
  ARM: OMAP: 32k counter: resolve sparse warnings
Signed-off-by: Olof Johansson <olof@lixom.net>

Merge branch 'v3.8-samsung-fixes-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into fixes

From Kukjin Kim:
Most of them are EXYNOS5440 fixes which are for changing uart console,
cpu id (typo)  and silent complaining gpio error in kernel boot.

* 'v3.8-samsung-fixes-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
  ARM: EXYNOS: skip the clock initialization for exynos5440
  ARM: EXYNOS: enable PINCTRL for EXYNOS5440
  ARM: dts: use uart port1 for console on exynos4210-smdkv310
  ARM: dts: use uart port0 for console on exynos5440-ssdk5440
  ARM: SAMSUNG: fix the cpu id for EXYNOS5440
  ARM: EXYNOS: Revise HDMI resource size

From Shawn Guo:
I have to send one critical mxsfb fix through arm-soc, as FB maintainer
is unresponsive for quite a while.  People start complaining the missing
of such an important fix.

* tag 'mxs-fixes-3.8' of git://git.linaro.org/people/shawnguo/linux-2.6:
  video: mxsfb: fix crash when unblanking the display
  ARM: dts: imx23-olinuxino: Fix IOMUX settings

From Shawn Guo:

It includes one critical fix - wrong flexcan2 clock will hang system
when the port gets brought up.  The other two are non-critical fixes,
which are sent together here, since it's still early -rc stage.

* tag 'imx-fixes-3.8' of git://git.linaro.org/people/shawnguo/linux-2.6:
  ARM: mx5: Fix MX53 flexcan2 clock
  ARM: dts: imx31-bug: Fix manufacturer compatible string
  clk: imx: Remove 'clock-output-names' from the examples