- 27 Jun, 2019 1 commit
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Mauro Carvalho Chehab authored
That gets rid of this warning: ./kernel/time/hrtimer.c:1119: WARNING: Block quote ends without a blank line; unexpected unindent. and displays nicely both at the source code and at the produced documentation. Signed-off-by:
Mauro Carvalho Chehab <mchehab+samsung@kernel.org> Signed-off-by:
Thomas Gleixner <tglx@linutronix.de> Cc: Linux Doc Mailing List <linux-doc@vger.kernel.org> Cc: Mauro Carvalho Chehab <mchehab@infradead.org> Cc: Jonathan Corbet <corbet@lwn.net> Link: https://lkml.kernel.org/r/74ddad7dac331b4e5ce4a90e15c8a49e3a16d2ac.1561372382.git.mchehab+samsung@kernel.org
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- 26 Jun, 2019 2 commits
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https://git.linaro.org/people/daniel.lezcano/linuxThomas Gleixner authored
Pull clocksource/events updates from Daniel Lezcano: - Rewrite of the davinci timer resulting to an immutable branch to be shared with davinci platform specific tree (Bartosz Golaszewski) - Cleanup and improvements of the tegra timer (Dmitry Osipenko) - Add new nxp system counter timer (Bai Ping) - Increase priority for exynos_mct to take over the initialization of the IP the arch ARM timer depends on (Marek Szyprowski) - Change macro use _BITUL() by BIT() on arc timer (Masahiro Yamada) - Implement the delay timer on ixp4xx (Linus Walleij) - Add the SPDX license identifier on the meson timer (Neil Armstrong)
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Daniel Lezcano authored
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- 25 Jun, 2019 26 commits
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Bartosz Golaszewski authored
Extend the davinci-timer driver to also register a clock source. Signed-off-by:
Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by:
Daniel Lezcano <daniel.lezcano@linaro.org>
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Bartosz Golaszewski authored
Currently the clocksource and clockevent support for davinci platforms lives in mach-davinci. It hard-codes many things, uses global variables, implements functionalities unused by any platform and has code fragments scattered across many (often unrelated) files. Implement a new, modern and simplified timer driver and put it into drivers/clocksource. We still need to support legacy board files so export a config structure and a function that allows machine code to register the timer. The timer we're using is 64-bit but can be programmed in dual 32-bit mode (both chained and unchained). On all davinci SoCs except for da830 we're using both halves. Lower half for clockevents and upper half for clocksource. On da830 we're using the lower half for both with the help of a compare register. This patch contains the core code and support for clockevent. The clocksource code will be included in a subsequent patch. Signed-off-by:
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Dmitry Osipenko authored
Tegra's timer has 29 bits for the counter and for the "load" register which sets counter to a load-value. The counter's value is lower than the actual value by 1 because it starts to decrement after one tick, hence the maximum number of ticks that hardware can handle equals to 29 bits + 1. Signed-off-by:
Dmitry Osipenko <digetx@gmail.com> Acked-by:
Jon Hunter <jonathanh@nvidia.com> Acked-by:
Thierry Reding <treding@nvidia.com> Signed-off-by:
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Dmitry Osipenko authored
Tegra's timer uses n+1 scheme for the counter, i.e. timer will fire after one tick if 0 is loaded. The minimum and maximum numbers of oneshot ticks are defined by clockevents_config_and_register(min, max) invocation and the min value is set to 1 tick. Hence "cycles" value can't ever be 0, unless it's a bug in clocksource core. Signed-off-by:
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Dmitry Osipenko authored
We're adjusting the timer's base for each per-CPU timer to point to the actual start of the timer since device-tree defines a compound registers range that includes all of the timers. In this case the original base need to be restore before calling iounmap to unmap the proper address. Signed-off-by:
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Dmitry Osipenko authored
Convert all 1MHz literals to a verbose constant for better readability. Suggested-by:
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Dmitry Osipenko authored
There is no need to cast void because kernel allows to do that without a warning message from a compiler. Acked-by:
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Dmitry Osipenko authored
The of_clk structure has a period field that is set up initially by timer_of_clk_init(), that period value need to be adjusted for a case of TIMER1-9 that are running at a fixed rate that doesn't match the clock's rate. Note that the period value is currently used only by some of the clocksource drivers internally and hence this is just a minor cleanup change that doesn't fix anything. Signed-off-by:
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Dmitry Osipenko authored
It was left unnoticed by accident, which means that the code could be cleaned up a tad more. Acked-by:
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Dmitry Osipenko authored
The clocksource rate is initialized only for the first per-CPU clocksource and then that rate shall be replicated for the rest of clocksource's because they are initialized manually in the code. Fixes: 3be2a85a0b61 ("clocksource/drivers/tegra: Support per-CPU timers on all Tegra's") Acked-by: -
Andrew Murray authored
Different mechanisms are used to test and set elf_hwcaps between ARM and ARM64, this results in the use of ifdeferry in this file when setting/testing for the EVTSTRM hwcap. Let's improve readability by extracting this to an arch helper. Signed-off-by:
Andrew Murray <andrew.murray@arm.com> Acked-by:
Mark Rutland <mark.rutland@arm.com> Acked-by:
Will Deacon <will.deacon@arm.com> Signed-off-by:
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Bai Ping authored
The system counter (sys_ctr) is a programmable system counter which provides a shared time base to the Cortex A15, A7, A53 etc cores. It is intended for use in applications where the counter is always powered on and supports multiple, unrelated clocks. The sys_ctr hardware supports: - 56-bit counter width (roll-over time greater than 40 years) - compare frame(64-bit compare value) contains programmable interrupt generation when compare value <= counter value. [dlezcano] Fixed over 80 chars length warning Signed-off-by:
Bai Ping <ping.bai@nxp.com> Signed-off-by:
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Dmitry Osipenko authored
Rename driver's source file to better reflect that it's not specific to older SoC generations. Suggested-by:
Peter De Schrijver <pdeschrijver@nvidia.com> Signed-off-by:
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Dmitry Osipenko authored
Arch-timer is more preferable for a range of Tegra SoC generations as it has higher precision and is not affect by any kind of problems. Pointed-out-by:
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Dmitry Osipenko authored
Remove build dependency on ARM for compile-testing to allow non-arch specific build-bots (like Intel's test robot) to compile the driver and report about problems. Signed-off-by:
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Dmitry Osipenko authored
Correct typo and use proper upper casing for acronyms in the comments, use common style for error messages, prepend error messages with "tegra-timer:", add error message for cpuhp_setup_state() failure and clean up whitespaces in the code to fix checkpatch warnings. Signed-off-by:
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Dmitry Osipenko authored
Release all requested IRQ's on the request error to properly clean up allocated resources. Signed-off-by:
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Dmitry Osipenko authored
The readl/writel functions are inserting memory barrier to ensure that outstanding memory writes are completed, this results in L2 cache syncing being done on Tegra20 and Tegra30 which isn't a very cheap operation. Replace all readl/writel occurrences in the code with the relaxed versions since there is no need for the memory-access syncing. Signed-off-by:
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Dmitry Osipenko authored
Reset timer's hardware state to ensure that initially it is in a predictable state. Signed-off-by:
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Dmitry Osipenko authored
Tegra132 is 64bit platform and it has the tegra20-timer hardware unit. Right now the corresponding timer code isn't compiled for ARM64, remove ifdef'iness from the code and compile tegra20-timer for both 32 and 64 bit platforms. Also note that like the older generations, Tegra210 has the microseconds counter, hence the timer_us clocksource is now made available for Tegra210 as well. Signed-off-by:
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Dmitry Osipenko authored
Assign TMR1-4 per-CPU core on 32bit Tegra's in a way it is done for Tegra210. In a result each core can handle its own timer events, less code is unique to ARM64 and Tegra's clock events driver now has higher rating on all Tegra's, replacing the ARM's TWD timer which isn't very accurate due to the clock rate jitter caused by CPU frequency scaling. Signed-off-by:
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Marek Szyprowski authored
Exynos SoCs based on CA7/CA15 have 2 timer interfaces: custom Exynos MCT (Multi Core Timer) and standard ARM Architected Timers. There are use cases, where both timer interfaces are used simultanously. One of such examples is using Exynos MCT for the main system timer and ARM Architected Timers for the KVM and virtualized guests (KVM requires arch timers). Exynos Multi-Core Timer driver (exynos_mct) must be however started before ARM Architected Timers (arch_timer), because they both share some common hardware blocks (global system counter) and turning on MCT is needed to get ARM Architected Timer working properly. To ensure selecting Exynos MCT as the main system timer, increase MCT timer rating. To ensure proper starting order of both timers during suspend/resume cycle, increase MCT hotplug priority over ARM Archictected Timers. Signed-off-by:
Marek Szyprowski <m.szyprowski@samsung.com> Reviewed-by:
Krzysztof Kozlowski <krzk@kernel.org> Reviewed-by:
Chanwoo Choi <cw00.choi@samsung.com> Signed-off-by:
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Masahiro Yamada authored
This is in-kernel C code, so there is no reason to use _BITUL(). Replace it with equivalent BIT(). I added #include <linux/bits.h> explicitly although it has been included by other headers eventually. Signed-off-by:
Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by:
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Linus Walleij authored
This adds delay timer functionality to the IXP4xx timer driver. Signed-off-by:
Linus Walleij <linus.walleij@linaro.org> Signed-off-by:
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Neil Armstrong authored
Comply with the licensing rules defined in the documentation. Signed-off-by:
Neil Armstrong <narmstrong@baylibre.com> Reviewed-by:
Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by:
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Jason A. Donenfeld authored
Somewhere in all the patchsets before, this cleanup got lost. Signed-off-by:
Jason A. Donenfeld <Jason@zx2c4.com> Signed-off-by:
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- 22 Jun, 2019 9 commits
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Nathan Huckleberry authored
With CONFIG_PROC_FS=n the following warning is emitted: kernel/time/timer_list.c:361:36: warning: unused variable 'timer_list_sops' [-Wunused-const-variable] static const struct seq_operations timer_list_sops = { Add #ifdef guard around procfs specific code. Signed-off-by:Nathan Huckleberry <nhuck@google.com> Signed-off-by:
Nick Desaulniers <ndesaulniers@google.com> Cc: john.stultz@linaro.org Cc: sboyd@kernel.org Cc: clang-built-linux@googlegroups.com Link: https://github.com/ClangBuiltLinux/linux/issues/534 Link: https://lkml.kernel.org/r/20190614181604.112297-1-nhuck@google.com
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Sebastian Andrzej Siewior authored
itimer_delete() uses spin_lock_irqsave() to obtain a `flags' variable which can then be passed to unlock_timer(). It uses already spin_lock locking for the structure instead of lock_timer() because it has a timer which can not be removed by others at this point. The cleanup is always performed with enabled interrupts. Use spin_lock_irq() / spin_unlock_irq() so the `flags' variable can be removed. Signed-off-by:
Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by:
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Sebastian Andrzej Siewior authored
itimer_delete() is invoked during do_exit(). At this point it is the last thread in the group dying and doing the clean up. Since it is the last thread in the group, there can not be any other task attempting to lock the itimer which means the NULL assignment (which avoids lookups in __lock_timer()) is not required. The assignment and comment was copied in commit 0e568881 ("[PATCH] fix posix-timers to have proper per-process scope") from sys_timer_delete() which was/is the syscall interface and requires the assignment. Remove the superfluous ->it_signal = NULL assignment. Signed-off-by:
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Jason A. Donenfeld authored
This further unifies the accessors for the fast and coarse functions, so that the same types of functions are available for each. There was also a bit of confusion with the documentation, which prior advertised a function that has never existed. Finally, the vanilla ktime_get_coarse() was omitted from the API originally, so this fills this oversight. Signed-off-by:
Arnd Bergmann <arnd@arndb.de> Link: https://lkml.kernel.org/r/20190621203249.3909-3-Jason@zx2c4.com
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Jason A. Donenfeld authored
This makes boot uniformly boottime and tai uniformly clocktai, to address the remaining oversights. Signed-off-by:
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Jason A. Donenfeld authored
While this doesn't actually amount to a real difference, since the macro evaluates to the same thing, every place else operates on ktime_t using these functions, so let's not break the pattern. Fixes: e3ff9c36 ("timekeeping: Repair ktime_get_coarse*() granularity") Signed-off-by:
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Thomas Gleixner authored
Pick up upstream fixes for pending changes.
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Miroslav Lichvar authored
PTI has a significant impact on precision of the MONOTONIC_RAW clock, which prevents a lot of computers from running the freq-step test. Increase the maximum acceptable precision for the test to not be skipped to 500 nanoseconds. After commit 78b98e3c ("timekeeping/ntp: Determine the multiplier directly from NTP tick length") the frequency and time errors should be much smaller. Reduce the maximum acceptable values for the test to pass to 0.02 ppm and 50 nanoseconds respectively. Signed-off-by:
Miroslav Lichvar <mlichvar@redhat.com> Signed-off-by:
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Miroslav Lichvar authored
Don't allow the TAI-UTC offset of the system clock to be set by adjtimex() to a value larger than 100000 seconds. This prevents an overflow in the conversion to int, prevents the CLOCK_TAI clock from getting too far ahead of the CLOCK_REALTIME clock, and it is still large enough to allow leap seconds to be inserted at the maximum rate currently supported by the kernel (once per day) for the next ~270 years, however unlikely it is that someone can survive a catastrophic event which slowed down the rotation of the Earth so much. Reported-by:
Weikang shi <swkhack@gmail.com> Signed-off-by:
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- 16 Jun, 2019 2 commits
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Linus Torvalds authored
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git://git.kernel.org/pub/scm/linux/kernel/git/tip/tipLinus Torvalds authored
Pull x86 fixes from Thomas Gleixner: "The accumulated fixes from this and last week: - Fix vmalloc TLB flush and map range calculations which lead to stale TLBs, spurious faults and other hard to diagnose issues. - Use fault_in_pages_writable() for prefaulting the user stack in the FPU code as it's less fragile than the current solution - Use the PF_KTHREAD flag when checking for a kernel thread instead of current->mm as the latter can give the wrong answer due to use_mm() - Compute the vmemmap size correctly for KASLR and 5-Level paging. Otherwise this can end up with a way too small vmemmap area. - Make KASAN and 5-level paging work again by making sure that all invalid bits are masked out when computing the P4D offset. This worked before but got broken recently when the LDT remap area was moved. - Prevent a NULL pointer dereference in the resource control code which can be triggered with certain mount options when the requested resource is not available. - Enforce ordering of microcode loading vs. perf initialization on secondary CPUs. Otherwise perf tries to access a non-existing MSR as the boot CPU marked it as available. - Don't stop the resource control group walk early otherwise the control bitmaps are not updated correctly and become inconsistent. - Unbreak kgdb by returning 0 on success from kgdb_arch_set_breakpoint() instead of an error code. - Add more Icelake CPU model defines so depending changes can be queued in other trees" * 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86/microcode, cpuhotplug: Add a microcode loader CPU hotplug callback x86/kasan: Fix boot with 5-level paging and KASAN x86/fpu: Don't use current->mm to check for a kthread x86/kgdb: Return 0 from kgdb_arch_set_breakpoint() x86/resctrl: Prevent NULL pointer dereference when local MBM is disabled x86/resctrl: Don't stop walking closids when a locksetup group is found x86/fpu: Update kernel's FPU state before using for the fsave header x86/mm/KASLR: Compute the size of the vmemmap section properly x86/fpu: Use fault_in_pages_writeable() for pre-faulting x86/CPU: Add more Icelake model numbers mm/vmalloc: Avoid rare case of flushing TLB with weird arguments mm/vmalloc: Fix calculation of direct map addr range
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