- 22 Apr, 2024 20 commits
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Jani Nikula authored
Prefer struct drm_edid based functions over struct edid. Acked-by:
Heiko Stuebner <heiko@sntech.de> Link: https://patchwork.freedesktop.org/patch/msgid/56ee6b7c3c018df55f5fe48a3e6d705dbad5ef74.1713273659.git.jani.nikula@intel.comSigned-off-by:
Jani Nikula <jani.nikula@intel.com>
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Jani Nikula authored
Prefer struct drm_edid based functions over struct edid. Acked-by:
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Jani Nikula authored
Prefer struct drm_edid based functions over struct edid. Acked-by:
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Jani Nikula authored
Prefer struct drm_edid based functions over struct edid. Reviewed-by:
Noralf Trønnes <noralf@tronnes.org> Link: https://patchwork.freedesktop.org/patch/msgid/c519a9b9d3c3c9a413de33b99b97a1120f774f2d.1713273659.git.jani.nikula@intel.comSigned-off-by:
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Jani Nikula authored
Prefer struct drm_edid based functions over struct edid. Acked-by:
Maxime Ripard <mripard@kernel.org> Link: https://patchwork.freedesktop.org/patch/msgid/eabece3ca7fae28395dcad0d2c221113cd924180.1713273659.git.jani.nikula@intel.comSigned-off-by:
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Jani Nikula authored
Prefer struct drm_edid based functions over struct edid. Acked-by:
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Jani Nikula authored
Prefer struct drm_edid based functions over struct edid. Reviewed-by:
Neil Armstrong <neil.armstrong@linaro.org> Link: https://patchwork.freedesktop.org/patch/msgid/a68ee923449a70cc7a59d0d3c96b0bb6764296bd.1713273659.git.jani.nikula@intel.comSigned-off-by:
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Jani Nikula authored
Prefer struct drm_edid based functions over struct edid. Reviewed-by:
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Jani Nikula authored
Prefer struct drm_edid based functions over struct edid. Reviewed-by:
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Arunpravin Paneer Selvam authored
Add a new test case for the drm buddy clear and dirty allocation. v2:(Matthew) - make size as u32 - rename PAGE_SIZE with SZ_4K - dont fragment the address space for all the order allocation iterations. we can do it once and just increment and allocate the size. - create new mm with non power-of-two size to ensure the multi-root force_merge during fini. v3: - add randomness in size calculation(Matthew) Signed-off-by:Arunpravin Paneer Selvam <Arunpravin.PaneerSelvam@amd.com> Reviewed-by:
Matthew Auld <matthew.auld@intel.com> Suggested-by:
Christian König <christian.koenig@amd.com>
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Arunpravin Paneer Selvam authored
Add clear page support in vram memory region. v1(Christian): - Dont handle clear page as TTM flag since when moving the BO back in from GTT again we don't need that. - Make a specialized version of amdgpu_fill_buffer() which only clears the VRAM areas which are not already cleared - Drop the TTM_PL_FLAG_WIPE_ON_RELEASE check in amdgpu_object.c v2: - Modify the function name amdgpu_ttm_* (Alex) - Drop the delayed parameter (Christian) - handle amdgpu_res_cleared(&cursor) just above the size calculation (Christian) - Use AMDGPU_GEM_CREATE_VRAM_WIPE_ON_RELEASE for clearing the buffers in the free path to properly wait for fences etc.. (Christian) v3(Christian): - Remove buffer clear code in VRAM manager instead change the AMDGPU_GEM_CREATE_VRAM_WIPE_ON_RELEASE handling to set the DRM_BUDDY_CLEARED flag. - Remove ! from amdgpu_res_cleared(&cursor) check. v4(Christian): - vres flag setting move to vram manager file - use dma_fence_get_stub in amdgpu_ttm_clear_buffer function - make fence a mandatory parameter and drop the if and the get/put dance Signed-off-by:Felix Kuehling <felix.kuehling@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240419063538.11957-2-Arunpravin.PaneerSelvam@amd.comSigned-off-by:
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Arunpravin Paneer Selvam authored
- Add tracking clear page feature. - Driver should enable the DRM_BUDDY_CLEARED flag if it successfully clears the blocks in the free path. On the otherhand, DRM buddy marks each block as cleared. - Track the available cleared pages size - If driver requests cleared memory we prefer cleared memory but fallback to uncleared if we can't find the cleared blocks. when driver requests uncleared memory we try to use uncleared but fallback to cleared memory if necessary. - When a block gets freed we clear it and mark the freed block as cleared, when there are buddies which are cleared as well we can merge them. Otherwise, we prefer to keep the blocks as separated. - Add a function to support defragmentation. v1: - Depends on the flag check DRM_BUDDY_CLEARED, enable the block as cleared. Else, reset the clear flag for each block in the list(Christian) - For merging the 2 cleared blocks compare as below, drm_buddy_is_clear(block) != drm_buddy_is_clear(buddy)(Christian) - Defragment the memory beginning from min_order till the required memory space is available. v2: (Matthew) - Add a wrapper drm_buddy_free_list_internal for the freeing of blocks operation within drm buddy. - Write a macro block_incompatible() to allocate the required blocks. - Update the xe driver for the drm_buddy_free_list change in arguments. - add a warning if the two blocks are incompatible on defragmentation - call full defragmentation in the fini() function - place a condition to test if min_order is equal to 0 - replace the list with safe_reverse() variant as we might remove the block from the list. v3: - fix Gitlab user reported lockup issue. - Keep DRM_BUDDY_HEADER_CLEAR define sorted(Matthew) - modify to pass the root order instead max_order in fini() function(Matthew) - change bool 1 to true(Matthew) - add check if min_block_size is power of 2(Matthew) - modify the min_block_size datatype to u64(Matthew) v4: - rename the function drm_buddy_defrag with __force_merge. - Include __force_merge directly in drm buddy file and remove the defrag use in amdgpu driver. - Remove list_empty() check(Matthew) - Remove unnecessary space, headers and placement of new variables(Matthew) - Add a unit test case(Matthew) v5: - remove force merge support to actual range allocation and not to bail out when contains && split(Matthew) - add range support to force merge function. v6: - modify the alloc_range() function clear page non merged blocks allocation(Matthew) - correct the list_insert function name(Matthew). Signed-off-by: -
Neil Armstrong authored
Disable the px_clk when setting the rate to recover a fully configured and correctly reset VCLK clock tree after the rate is set. Fixes: 77d9e1e6 ("drm/meson: add support for MIPI-DSI transceiver") Reviewed-by:
Nicolas Belin <nbelin@baylibre.com> Link: https://lore.kernel.org/r/20240403-amlogic-v6-4-upstream-dsi-ccf-vim3-v12-4-99ecdfdc87fc@linaro.orgSigned-off-by:
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Ville Syrjälä authored
Fix the typos in the plane SIZE_HINTS kernel docs. Reported-by:
Stephen Rothwell <sfr@canb.auug.org.au> Fixes: 9677547d ("drm: Introduce plane SIZE_HINTS property") Signed-off-by:
Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240418114218.9162-1-ville.syrjala@linux.intel.comReviewed-by:
Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
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Ville Syrjälä authored
DisplayID spec v1.3 revision history notes do claim that the toplogy block was added in v1.3 so requiring structure v1.2 would seem correct, but there is at least one EDID in edid.tv with a topology block and structure v1.0. And there are also EDIDs with DisplayID structure v1.3 which seems to be totally incorrect as DisplayID spec v1.3 lists structure v1.2 as the only legal value. Unfortunately I couldn't find copies of DisplayID spec v1.0-v1.2 anywhere (even on vesa.org), so I'll have to go on empirical evidence alone. We used to parse the topology block on all v1.x structures until the check for structure v2.0 was added. Let's go back to doing that as the evidence does suggest that there are DisplayIDs in the wild that would miss out on the topology stuff otherwise. Also toss out DISPLAY_ID_STRUCTURE_VER_12 entirely as it doesn't appear we can really use it for anything. I *think* we could technically skip all the structure version checks as the block tags shouldn't conflict between v2.0 and v1.x. But no harm in having a bit of extra sanity checks I guess. So far I'm not aware of any user reported regressions from overly strict check, but I do know that it broke igt/kms_tiled_display's fake DisplayID as that one gets generated with structure v1.0. Cc: Jani Nikula <jani.nikula@intel.com> Cc: Dmitry Osipenko <dmitry.osipenko@collabora.com> Fixes: c5a486af ("drm/edid: parse Tiled Display Topology Data Block for DisplayID 2.0") Signed-off-by:
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David Wronek authored
Add support for the 2560x1600@90Hz OLED panel by EDO bundled with a Raydium RM69380 controller, as found on the Lenovo Xiaoxin Pad Pro 2021. Reviewed-by:
David Wronek <david@mainlining.org> Reviewed-by:
Marijn Suijten <marijn.suijten@somainline.org> Acked-by:
Jessica Zhang <quic_jesszhan@quicinc.com> Link: https://lore.kernel.org/r/20240417-raydium-rm69380-driver-v4-2-e9c2337d0049@mainlining.orgSigned-off-by:
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David Wronek authored
Raydium RM69380 is a display driver IC used to drive OLED DSI panels. Add a dt-binding for it. Signed-off-by:
Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20240417-raydium-rm69380-driver-v4-1-e9c2337d0049@mainlining.orgSigned-off-by:
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Jacobe Zang authored
This add Khadas TS050 V2 Panel and make it compatible with old one. Controller of V2 panel is "Himax HX8399-C" and the old panel is "NT35596". In driver file, the only different between them is the timing squence. Signed-off-by:
Jacobe Zang <jacobe.zang@wesion.com> Reviewed-by:
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Jacobe Zang authored
This add the bindings for the Khadas TS050 V2 1080x1920 5" LCD DSI panel designed to work with the Khadas VIM3 and VIM3L Single Board Computers. Signed-off-by:
Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20240419014852.715125-2-jacobe.zang@wesion.comSigned-off-by:
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Dan Carpenter authored
These variables should be u32 instead of u64 because they're only storing u32 values. Also static checkers complain when we do: suspended_slots &= ~upd_ctx.timedout_mask; In this code "suspended_slots" is a u64 and "upd_ctx.timedout_mask". The mask clears out the top 32 bits which would likely be a bug if anything were stored there. Signed-off-by:
Dan Carpenter <dan.carpenter@linaro.org> Reviewed-by:
Steven Price <steven.price@arm.com> Reviewed-by:
Boris Brezillon <boris.brezillon@collabora.com> Signed-off-by:
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- 19 Apr, 2024 10 commits
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Krzysztof Kozlowski authored
Core in platform_driver_register() already sets the .owner, so driver does not need to. Whatever is set here will be anyway overwritten by main driver calling platform_driver_register(). Signed-off-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by:
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Andy Yan authored
drm_dp_helper.h is not used by lvds driver Signed-off-by:
Andy Yan <andy.yan@rock-chips.com> Signed-off-by:
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Johan Jonker authored
The Rockchip inno HDMI controller can take one I2S input and transmit it over the HDMI output. Add #sound-dai-cells (= 0) to the binding for it. Signed-off-by:
Johan Jonker <jbx6244@gmail.com> Acked-by:
Conor Dooley <conor.dooley@microchip.com> Signed-off-by:
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Johan Jonker authored
The Rockchip rk3066 HDMI controller can take one I2S input and transmit it over the HDMI output. Add #sound-dai-cells (= 0) to the binding for it. Signed-off-by:
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Johan Jonker authored
The Rockchip DWC HDMI TX Encoder can take one I2S input and transmit it over the HDMI output. Add #sound-dai-cells (= 0) to the binding for it. Signed-off-by:
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Detlev Casanova authored
For the cbcr format, gt2 and gt4 are computed again after src_h has been divided by vsub. As src_h as already been divided by 2 before, introduce cbcr_src_h and cbcr_src_w to keep a copy of those values to be used for cbcr gt2 and gt4 computation. This fixes yuv planes being unaligned vertically when down scaling to 1080 pixels from 2160. Signed-off-by:
Detlev Casanova <detlev.casanova@collabora.com> Fixes: 604be855 ("drm/rockchip: Add VOP2 driver") Acked-by:
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Sumit Semwal authored
LG SW43408 is 1080x2160@60Hz, 4-lane MIPI-DSI panel, used in some Google Pixel-3 phones. Signed-off-by:
Sumit Semwal <sumit.semwal@linaro.org> [vinod: Add DSC support] Signed-off-by:
Vinod Koul <vkoul@kernel.org> [caleb: cleanup and support turning off the panel] Signed-off-by:
Caleb Connolly <caleb@connolly.tech> [DB: partially rewrote the driver and fixed DSC programming] Reviewed-by:
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Dmitry Baryshkov authored
Add the extended version of mipi_dsi_compression_mode(). It provides a way to specify the algorithm and PPS selector. Reviewed-by:
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Dmitry Baryshkov authored
The functions mipi_dsi_compression_mode() and mipi_dsi_picture_parameter_set() return 0-or-error rather than a buffer size. Follow example of other similar MIPI DSI functions and use int return type instead of size_t. Fixes: f4dea1aa ("drm/dsi: add helpers for DSI compression mode and PPS packets") Reviewed-by:
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Sumit Semwal authored
LG SW43408 is 1080x2160, 4-lane MIPI-DSI panel present on Google Pixel 3 phones. Signed-off-by:
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- 18 Apr, 2024 4 commits
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Baruch Siach authored
Use 'supported' instead of 'support'. 'support' makes no sense in this context. Signed-off-by:
Baruch Siach <baruch@tkos.co.il> Link: https://patchwork.freedesktop.org/patch/msgid/505484b83fedebce3c65b10b076b34df075074b6.1713329988.git.baruch@tkos.co.ilSigned-off-by:
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Ville Syrjälä authored
Replace the open coded drm_crtc_vblank_crtc() with the real thing. Cc: Rodrigo Siqueira <rodrigosiqueiramelo@gmail.com> Cc: Melissa Wen <melissa.srw@gmail.com> Cc: "Maíra Canal" <mairacanal@riseup.net> Cc: Haneen Mohammed <hamohammed.sa@gmail.com> Cc: Daniel Vetter <daniel@ffwll.ch> Signed-off-by:
Maíra Canal <mcanal@igalia.com>
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Ville Syrjälä authored
Replace the open coded drm_crtc_vblank_crtc() with the real thing. Cc: Karol Herbst <kherbst@redhat.com> Cc: Lyude Paul <lyude@redhat.com> Cc: Danilo Krummrich <dakr@redhat.com> Cc: nouveau@lists.freedesktop.org Signed-off-by:
Lyude Paul <lyude@redhat.com>
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Ville Syrjälä authored
Make life easier by providing a function that hands out the correct drm_vblank_crtc for a given a drm_crtc. Also abstract the lower level internals of the vblank code in a similar fashion. Signed-off-by:
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- 17 Apr, 2024 6 commits
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Marek Vasut authored
G121XCE-L01 is a Color Active Matrix Liquid Crystal Display composed of a TFT LCD panel, a driver circuit, and LED backlight system. The screen format is intended to support the 4:3, 1024(H) x 768(V) screen and either 262k/16.7M colors (RGB 6-bits or 8-bits) with LED backlight driver circuit. All input signals are LVDS interface compatible. Documentation [1] and [2] indicate that G121X1-L03 and G121XCE-L01 are effectively identical panels, use the former as RGB 6-bits variant and add the later as RGB 8-bits variant. [1] https://www.distec.de/fileadmin/pdf/produkte/TFT-Displays/Innolux/G121X1-L03_Datasheet.pdf [2] https://www.distec.de/fileadmin/pdf/produkte/TFT-Displays/Innolux/G121XCE-L01_Datasheet.pdfSigned-off-by:
Marek Vasut <marex@denx.de> Acked-by:
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Marek Vasut authored
Use display_timing instead of drm_display_mode to define a range of possible display timings supported by this panel. This makes the panel support more flexible and improves compatibility. No functional change is expected. The settings are picked from documentation [1] section 6.1 INPUT SIGNAL TIMING SPECIFICATIONS. [1] https://www.distec.de/fileadmin/pdf/produkte/TFT-Displays/Innolux/G121X1-L03_Datasheet.pdfSigned-off-by:
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Marek Vasut authored
The .bpc = 6 implies .bus_format = MEDIA_BUS_FMT_RGB666_1X7X3_SPWG , add the missing bus_format. Add missing connector type and bus_flags as well. Documentation [1] 1.4 GENERAL SPECIFICATI0NS indicates this panel is capable of both RGB 18bit/24bit panel, the current configuration uses 18bit mode, .bus_format = MEDIA_BUS_FMT_RGB666_1X7X3_SPWG , .bpc = 6. Support for the 24bit mode would require another entry in panel-simple with .bus_format = MEDIA_BUS_FMT_RGB666_1X7X4_SPWG and .bpc = 8, which is out of scope of this fix. [1] https://www.distec.de/fileadmin/pdf/produkte/TFT-Displays/Innolux/G121X1-L03_Datasheet.pdf Fixes: f8fa17ba ("drm/panel: simple: Add support for Innolux G121X1-L03") Signed-off-by:
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Marek Vasut authored
Document support for Innolux CheMei 12" G121XCE-L01 XGA LVDS display. G121XCE-L01 is a Color Active Matrix Liquid Crystal Display composed of a TFT LCD panel, a driver circuit, and LED backlight system. The screen format is intended to support the 4:3, 1024(H) x 768(V) screen and either 262k/16.7M colors (RGB 6-bits or 8-bits) with LED backlight driver circuit. All input signals are LVDS interface compatible. Documentation [1] and [2] indicate that G121X1-L03 and G121XCE-L01 are effectively identical panels, use the former as RGB 6-bits variant and document the later as RGB 8-bits variant. [1] https://www.distec.de/fileadmin/pdf/produkte/TFT-Displays/Innolux/G121X1-L03_Datasheet.pdf [2] https://www.distec.de/fileadmin/pdf/produkte/TFT-Displays/Innolux/G121XCE-L01_Datasheet.pdfSigned-off-by:
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Jani Nikula authored
Repurpose drm_edid_are_equal() to be more helpful for its single user, and rename drm_edid_eq(). Functionally deduce the length from the blob size, not the blob data, making it more robust against any errors. Reviewed-by:
Thomas Zimmermann <tzimmermann@suse.de> Link: https://patchwork.freedesktop.org/patch/msgid/1011a285d30babce3aabd8218abb7ece7dcf58a2.1713259151.git.jani.nikula@intel.comSigned-off-by:
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Jani Nikula authored
drm_edid_are_equal() is only used within drm_edid.c. Make it static. Do not encourage more uses of struct edid. Reviewed-by:
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