- 11 Jan, 2005 40 commits
-
-
Andi Kleen authored
The original check was apparently to work around some old BIOS bugs and we just assume x86-64 machines don't have this class of problems. Originally found by <YhLu@tyan.com> Signed-off-by:
Andi Kleen <ak@suse.de> Signed-off-by:
Andrew Morton <akpm@osdl.org> Signed-off-by:
Linus Torvalds <torvalds@osdl.org>
-
Andi Kleen authored
This removes all but one direct reference to mem_map for x86-64. This is needed on systems where we break the mem_map up and directly indexing into mem_map to get the page structure doesn't work anymore. Signed-off-by:
Matt Tolentino <matthew.e.tolentino@intel.com> Signed-off-by:
-
Andi Kleen authored
Add new key syscalls. Signed-off-by:
-
Andi Kleen authored
This fixes the erroneous No mptables found printk on x86_64 mpparse. We will only print the message now if no mptables are found after all scans complete. Signed-off-by:
Justin M. Forbes <jmforbes@linuxtx.org> Signed-off-by:
-
Andi Kleen authored
change_page_attr logic fixes from Andrea This avoids reference counting leaks and adds BUGs for more wrong cases. Signed-off-by:
-
Andi Kleen authored
On K8 L1 TLB is inclusive, so don't include it in the TLB count. Signed-off-by:
-
Andi Kleen authored
We need to save the access flags to properly restore the direct mapping on unmap. For that we use some upper bits in vm_flags Also add a comment for that to the header file. Signed-off-by:
-
Andi Kleen authored
Move memset_io out of line to avoid warnings. Signed-off-by:
-
Andi Kleen authored
This is needed for the powernow k8 driver to manage AMD dual core systems. (see explanation in previous CMP patch for more details) Signed-off-by:
-
Andi Kleen authored
Count both multi cores and SMP siblings in /proc/cpuinfo siblings. This avoids breaking user space licensing managers who license by CPU on dual core systems. Port of the equivalent code on x86-64. Signed-off-by:
-
Andi Kleen authored
AMD dual core support for i386 Run HT initialization on AMD dual core CPUs on i386. They fake being HT CPUs. This patch makes the HT detection run on AMD CPUs too. I moved the HT detection code into a common file from intel.c for that. It would be actually better to run HT detection always on all CPUs but this would need a second callback afterwards to AMD code, which I avoided for now. It adds a cpuinfo->x86_num_cores field. This sets up the phys_proc_id[] array. This overloads this array with HT, but when smp_num_siblings is 1 It is currently only used for /proc/cpuinfo printing. The reason we want to behave this like SMT is that there are some license managers in user space that license according to number of physical CPUs, and when they handle HT they should handle CMP with this hack too. Another reason we need this is that the powernow k8 driver needs this information to properly manage dual core CPUs. When there are ever dual core HT CPUs this will need small changes in smpboot.c. I didn't do this for now to keep the patch simple. Then we set smp_num_siblings to 1 on these systems again to prevent the scheduler from setting up HT scheduling (which is not a very good match for dual core). This is a port of the CMP support code from x86-64 (minus the NUMA bits) Signed-off-by:
-
Andi Kleen authored
Port missing cpuid bits from x86-64 to i386 Signed-off-by:
-
Andi Kleen authored
Fix some gcc 4 warnings in arch/x86_64 There are tons more outside though. Signed-off-by:
-
Andi Kleen authored
Fix sparse warnings warning: cast removes address space of expression for uses of put_user() on x86_64 caused by doing __m(addr) in __put_user_asm() with addr a __user pointer. Signed-off-by:Roland Dreier <roland@topspin.com> Signed-off-by:
-
Andi Kleen authored
Remove old-checksum.c Remove nowhere referenced file. (egrep "filename\." didn't find anything) Signed-off-by:
Domen Puncer <domen@coderock.org> Signed-off-by:
-
Andi Kleen authored
Update x86-64 defconfig Signed-off-by:
-
Andi Kleen authored
Updates for x86-64 boot-options.txt Signed-off-by:
-
Andi Kleen authored
Hack to disable clustered mode on AMD systems Make sure AMD big flat apic mode is not confused with clustered APIC mode. Ugly hack, but no better way found. Signed-off-by:
-
Andi Kleen authored
Work around another aperture BIOS bug on Opteron Based on debugging&code from Vincent ETIENNE <ve@vetienne.net> >> I have some problem with AGP initialization with my board : IWILL DK8N (Bi opteron chipset NFORCE3 ). I use kernel 2.6.10-rc3-mm1, but i have try with IOMMU reports a 128MB aperture for CPU0 ( that's the value i used in my bios) at F0000000 but only 32MB at 4000000 for CPU1 << This patch checks for this condition and fixes the other CPUs up. Signed-off-by:
-
Prakash Cheemplavam authored
current state: Systems with Nforce2 could freeze on high disk i/o activity in APIC mode when CPU Disconnect is enabled. If bios doesn't fix this, current kernel fix changes the registers according to follwing table: * Chip Old value New value * C17 0x1F0FFF01 0x1F01FF01 * C18D 0x9F0FFF01 0x9F01FF01 But this is only done, if cpu disconnect has been enabled in bios. why change this: If CPU disconnect is not enabled in bios, and bios is broken (some manufacturers like Abit don't care about their customers and even the latest bios doesn't fix this; I have an Abit mainboard), the kernel doesn't apply the fix, so if cpu disconnect is enabled at a later stage (in userspace), the system will be unstable and most likely freeze. new behaviour: The fix is now applied regardless of cpu disconnect being enabled at boot time, or not. As you only have to change byte 3 to 0x01, reading out chipset version isn't needed, so the patch simplifies the fix. Now turning cpu disconnect on, at later stage won't break the system, and if it was already enabled, it gets fixed, as the old version did. Signed-off-by:Prakash Punnoor <prakashp@arcor.de> Acked-by:
Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> Signed-off-by:
-
Prasanna S. Panchamukhi authored
The address used by the kprobes handler was not correct if the application was using LDT entries for code segment. This patch fixes the above problem by calculating the address using base address of the current code segment. Also this patch removes the inline prefix of kprobe_handler() . Signed-off-by:
Prasanna S Panchamukhi <prasanna@in.ibm.com> Signed-off-by:
-
Herbert Pötzl authored
hopefully 'better' fix for broken Intel Mercury/Neptune in wait_8254_wraparound() ... Rationale: changing HZ to higher values (like 5k,10k or 20k) will hang machines using wait_8254_wraparound() indefinitely, because a suboptimal workaround for buggy Intel Mercury/Neptune chipsets is in place. this was tested on several machines, unfortunately none with a broken Intel Mercury/Neptune chipset, and it works fine with various HZ values ... Signed-off-by:
Herbert Pötzl <herbert@13thfloor.at> Signed-off-by:
-
Anton Blanchard authored
On UP builds we include lots of spare pacas. Lets get rid of them and save some space. Also catch the small SMP case. Signed-off-by:
Anton Blanchard <anton@samba.org> Signed-off-by:
-
Anton Blanchard authored
From: Domen Puncer <domen@coderock.org> semicolon in rtasd.c Signed-off-by:
-
Anton Blanchard authored
From: Nathan Lynch <nathanl@austin.ibm.com> Ran into this on a 4GB partition - all but about ~300MB was thrown away. It works for me, but I've not tested on firmware without the bug. Fall back to non-numa setup upon discovering unexpected memory layout as presented by firmware, instead of throwing away regions. Signed-off-by:
Nathan Lynch <nathanl@austin.ibm.com> Acked-by:
-
Anton Blanchard authored
It turns out we were passing in the wrong thing to the rtas_set_indicator call. Luckily we got away with it because it looks like firmware does not check arguments and just inserts or removes the current cpu from the global server group. Fix it. Signed-off-by:
-
Anton Blanchard authored
- Move some function prototypes into header files. - Remove late_setup_cpu, put the set indicator and vpa init into xics probe instead - rtas-proc was doing weird stuff with the 9005 indicator. Get rid of it. - Dont open code the set_indicator call in the hotplug code Signed-off-by:
-
Anton Blanchard authored
Remove flush_instruction_cache, we cant touch HID bits on LPAR machines. Signed-off-by:
-
Anton Blanchard authored
- remove pci_fix_bus_sysdata. We required it for the old pci dma subsystem, but now it is useless. - remove PCI_GET_PHB_PTR and use pci_bus_to_host instead - remove pci_find_hose_for_OF_device - remove some unused fields in struct pci_controller - remove pci_device_loc stale prototype - remove an old mask of pci bus number that was left around from the pre PCI domains days Signed-off-by:
-
Anton Blanchard authored
I've noticed a problem where xtime and gettimeofday could get out of sync if interrupts are disabled for too long (eg long kernel code paths or dropping into the debugger for a while). We correctly replay lost jiffies but in that loop time_sync_xtime syncs the intermediate values of xtime up with the current value of gettimeofday. So xtime jumps by a bunch and from then on it is ahead of gettimeofday and we never resync the two. I guess this is to avoid xtime going backwards. The patch below creates a __do_gettimeofday where you can pass in a tb value and sync the intermediate values of xtime properly. Note that the time_sync_xtime check only stops the seconds from going backwards, the ns component still could couldnt it? Considering this is hard to get right, should we switch to the time interpolator stuff? The only problem there is it might be trouble for systemcfg (which exports stuff to do userspace gettimeofday). Signed-off-by:
-
Anton Blanchard authored
I've had to explain to a number of people that a 0x700 exception is often a BUG(). Make this crystal clear by printing the BUG information in the xmon exception printout. Signed-off-by:
-
Anton Blanchard authored
It turns out gcc decides to allocate a stack frame in the current xmon setjmp function. This means the stack linkage we save away is destroyed when returning from it and its just a matter of time before another function stomps on it. This should fix the problem Linas reported this week. Signed-off-by:
-
Anton Blanchard authored
Here are some changes to the oops printout, stuff that would have been useful when I was chasing various bugs. - print out instructions around the fail (3/4 before 1/4 after). - print out CTR and CR registers, make some space by cutting down XER (its only 32bit) - always print the DAR and DSISR, its sometimes useful - print_modules() like x86 Signed-off-by:
-
Anton Blanchard authored
We were missing an include of the new nodemask.h and NUMA enabled builds broke. Signed-off-by:
-
Anton Blanchard authored
I was running some tests and noticed BUG() handling wasnt working as expected. The kprobes code has some code to check for breakpoint removal races and only checks for one opcode. It turns out there are many forms of the breakpoint instruction, comparing against one is not good enough. For the momemt remove the code in question so BUG()s work again and we can discuss a better solution (I thought kprobes was emulating instructions or running them out of line). Signed-off-by:
-
Zwane Mwaikambo authored
This should allow for easier adding of hotplug cpu support for other PPC64 subarchs. The patch is untested but does compile with and without hotplug cpu on pSeries and G5 configs. What can get slightly confusing is the fact that both ppc_md and smp_ops have cpu_die members. Signed-off-by:
Zwane Mwaikambo <zwane@arm.linux.org.uk> Signed-off-by:
-
Thomas Gleixner authored
Include missing header to avoid implicit function declaration warnings Signed-off-by:
Thomas Gleixner <tglx@linutronix.de> Signed-off-by:
-
Thomas Gleixner authored
The MMCR0_PMXE is already defined in reg.h, so no need to redefine it here. Signed-off-by:
-
Thomas Gleixner authored
The idle-thread-preemption-fix.patch in mm1/2 leads to a stalled box on PPC machines which do not provide a powersave function and therefor poll the idle loop with interrupts disabled. The patch reenables interrupts. Signed-off-by:
-
Hugh Dickins authored
The 4level mods have caused 2level swapoff to miss entries and hang. There's probably a one-line fix for that, but the error is really caused by previous awkwardness - each mask applied on two levels, an "address" that's an offset plus an "offset" that's an address. Simplify the four levels to behave in the same address/next/end way and the bug vanishes. Signed-off-by:
Hugh Dickins <hugh@veritas.com> Signed-off-by:
-
