- 18 Jan, 2023 11 commits
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Robert Foss authored
Add GPIO line names as described by the sm8350-hdk schematic. Signed-off-by:
Robert Foss <robert.foss@linaro.org> Signed-off-by:
Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230117112537.1016250-1-rfoss@kernel.org
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Bjorn Andersson authored
While booting the CRD, a series of CMA allocation errors can be seen in the kernel log: cma: cma_alloc: reserved: alloc failed, req-size: 128 pages, ret: -12 Growing the CMA region and querying /proc/meminfo indicates that a newly booted system (currently) uses 64MB CMA. Define a memory region sufficiently large for the current use cases, to avoid forcing users to add this themselves, through command line parameters etc. While fixing the CRD define the same region for the X13s. Tested-by: Andrew Halaney <ahalaney@redhat.com> # sc8280xp-lenovo-thinkpad-x13s Reviewed-by:
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by:
Bjorn Andersson <quic_bjorande@quicinc.com> Reviewed-by:
Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by:
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Judy Hsiao authored
1. Add DisplayPort sound node and lpass_cpu node. 2. Adjust the dai-link order to make the order to be consistent with sc7280-herobrine-audio-rt5682-3mic.dtsi. Signed-off-by:
Judy Hsiao <judyhsiao@chromium.org> Reviewed-by:
Douglas Anderson <dianders@chromium.org> Signed-off-by:
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Johan Hovold authored
Clean up the wcd938x codec node somewhat by adding newline separators, reordering properties and renaming it 'audio-codec'. Signed-off-by:
Johan Hovold <johan+linaro@kernel.org> Reviewed-by:
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Johan Hovold authored
The wcd938x codec is not a memory-mapped device and does not belong under the soc node. Move the node to the root node to avoid DT validation failures. While at it, clean up the node somewhat by reordering properties and renaming it 'audio-codec'. Signed-off-by:
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Johan Hovold authored
The wcd938x codec is not a memory-mapped device and does not belong under the soc node. Move the node to the root node to avoid DT validation failures. While at it, clean up the node somewhat by adding newline separators, reordering properties and renaming it 'audio-codec'. Reviewed-by:
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Johan Hovold authored
Move the vamacro node to restore the alphabetical sort order. While at it, add some newline separators to improve readability. Signed-off-by:
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Johan Hovold authored
The sound nodes in the SoC dtsi should be disabled by default. Note that the lpass-tlmm and macro blocks depend on having the board dts enable the adsp and specifying an appropriate firmware to enable the q6prm clock controller. Reviewed-by:
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Krzysztof Kozlowski authored
tx-macro does not have children and does not allow address/size cells: sc8280xp-crd.dtb: txmacro@3220000: Unevaluated properties are not allowed ('#address-cells', '#size-cells' were unexpected) Signed-off-by:Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by:
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Krzysztof Kozlowski authored
There is no "clock-controller" property: sa8295p-adp.dtb: service@2: clock-controller: 'clock-controller' does not match any of the regexes: 'pinctrl-[0-9]+' From schema: Documentation/devicetree/bindings/sound/qcom,q6prm.yaml Signed-off-by: -
Krzysztof Kozlowski authored
Neither qcom,sm8250-lpass-rx-macro bindings nor the driver use "clock-frequency" property. sm8250-mtp.dtb: rxmacro@3200000: Unevaluated properties are not allowed ('clock-frequency' was unexpected) Signed-off-by:
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- 17 Jan, 2023 15 commits
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Yunlong Jia authored
Add the string to load RF output power table for pazquel360 project. Signed-off-by:
Yunlong Jia <ecs.beijing2022@gmail.com> Reviewed-by:
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Bhupesh Sharma authored
Add dtsi nodes related to coresight debug units such as cti, etm, etr, funnel(s), replicator(s), etc. for Qualcomm sm6115 SoC. Reviewed-by:
Bhupesh Sharma <bhupesh.sharma@linaro.org> Signed-off-by:
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Robert Foss authored
The sm8350-hdk ships with the LT9611 UXC DSI/HDMI bridge chip. In order to toggle the board to enable the HDMI output, switch #7 & #8 on the rightmost multi-switch package have to be toggled to On. Signed-off-by:
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Robert Foss authored
Enable the display subsystem and the dsi0 output for the sm8350-hdk board. Signed-off-by:
Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by:
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Robert Foss authored
Add mdss, mdss_mdp, dsi0, dsi0_phy nodes. With these nodes the display subsystem is configured to support one DSI output. Signed-off-by:
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Abel Vesa authored
Enable UFS host controller and PHY node on SM8550 MTP board. Signed-off-by:
Abel Vesa <abel.vesa@linaro.org> Signed-off-by:
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Abel Vesa authored
Add UFS host controller and PHY nodes. Signed-off-by:
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Konrad Dybcio authored
Reserve the bit of memory that simplefb uses to ensure it can always probe. Signed-off-by:
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Konrad Dybcio authored
Rename the reserved-memory subnodes such that they don't use undescores. Signed-off-by:
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Kuogee Hsieh authored
Move data-lanes property from mdss_dp node to dp_out endpoint. Also add link-frequencies property into dp_out endpoint as well. The last frequency specified at link-frequencies will be the max link rate supported by DP. Signed-off-by:
Kuogee Hsieh <quic_khsieh@quicinc.com> Signed-off-by:
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Krzysztof Kozlowski authored
Bindings expect DAI children to be named "dai-link": sc7180-trogdor-coachz-r1.dtb: lpass@62d87000: Unevaluated properties are not allowed ('hdmi@5', 'mi2s@0', 'mi2s@1' were unexpected) Signed-off-by: -
Krzysztof Kozlowski authored
Display clock controller bindings do not allow power-domain-names: sm8350-hdk.dtb: clock-controller@af00000: 'power-domain-names' does not match any of the regexes: 'pinctrl-[0-9]+' From schema: Documentation/devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml Signed-off-by:
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Dmitry Baryshkov authored
Remove manually created symbol clocks and replace them with clocks provided by PHY. Reviewed-by:
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by:
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Dmitry Baryshkov authored
Enable PCIe0 and PCIe1 hosts found on SM8350 HDK board. Signed-off-by:
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Dmitry Baryshkov authored
Add PCIe0 and PCIe1 (and corresponding PHY) devices found on SM8350 platform. The PCIe0 is a 1-lane Gen3 host, PCIe1 is a 2-lane Gen3 host. Signed-off-by:
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- 12 Jan, 2023 4 commits
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Bjorn Andersson authored
While MDSS_GDSC is a subdomain of MMCX, Linux does not respect this relationship and sometimes invokes sync_state on the rpmhpd (MMCX) before the DisplayPort controller has had a chance to probe. The result when this happens is that the power is lost to the multimedia subsystem between the probe of msm_drv and the DisplayPort controller - which results in an irrecoverable state. While this is an implementation problem, this aligns the power domain setting of the one DP instance with that of all the others. Fixes: 57d6ef68 ("arm64: dts: qcom: sc8280xp: Define some of the display blocks") Signed-off-by:
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Johan Hovold authored
The vreg_l3b supply is used by the eDP, UFS and USB1 PHYs which are now described by the devicetree so that the regulator no longer needs to be marked always-on. Signed-off-by:
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Mukesh Ojha authored
Add TCSR register space and refer it from scm node, so that it can be used by SCM driver. Signed-off-by:
Mukesh Ojha <quic_mojha@quicinc.com> Signed-off-by:
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Bjorn Andersson authored
Running GCC_USB30_*_MASTER_CLK at 200MHz requires CX at nominal level, not doing so results in occasional lockups. This was previously hidden by the fact that the display stack incorrectly voted for CX (instead of MMCX). Fixes: 152d1faf ("arm64: dts: qcom: add SC8280XP platform") Signed-off-by:
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- 11 Jan, 2023 10 commits
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Dmitry Baryshkov authored
Drop the virtual ipa-virt device. The interconnects it provided are going to be represented as <&rpmhcc RPMH_IPA_CLK> clock. Signed-off-by:
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Dmitry Baryshkov authored
Drop the virtual ipa-virt device. The interconnects it provided are going to be represented as <&rpmhcc RPMH_IPA_CLK> clock. Signed-off-by:
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Luca Weiss authored
Add a node describing the ADC5_BAT_ID_100K_PU channel with the properties taken from downstream kernel. Signed-off-by:
Luca Weiss <luca.weiss@fairphone.com> Reviewed-by:
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Stephan Gerhold authored
i2c-qup allows using DMA to speed up larger transfers. In msm8916.dtsi the DMA channels are already assigned to the SPI controllers but missing for I2C. Add them there as well. This also fixes confusing errors in dmesg for each I2C controller: i2c_qup 78b6000.i2c: tx channel not available Signed-off-by:
Stephan Gerhold <stephan@gerhold.net> Reviewed-by:
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Stephan Gerhold authored
Adding the "dmas" to the I2C controllers prevents probing them if blsp_dma is disabled (infinite probe deferral). Avoid this by enabling blsp_dma by default - it's an integral part of the SoC that is almost always used (even if just for UART). Signed-off-by:
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Lin, Meng-Bo authored
FL8005A uses Qualcomm GPIO flash LEDs which is compatible with SGM3140 Flash LED driver. Add it to the device tree. Signed-off-by:
Lin, Meng-Bo <linmengbo0689@protonmail.com> Reviewed-by:
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Lin, Meng-Bo authored
FL8005A uses a Focaltech FT5402 touchscreen that is connected to blsp_i2c5. Add it to the device tree. Signed-off-by:
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Lin, Meng-Bo authored
GPLUS FL8005A is a tablet using the MSM8916 SoC released in 2015. Add a device tree for with initial support for: - GPIO keys - GPIO LEDs - pm8916-vibrator - SDHCI (internal and external storage) - USB Device Mode - UART - WCNSS (WiFi/BT) - Regulators Signed-off-by:
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Dmitry Baryshkov authored
Now as we added the APCS clock controller support, mark apcs device as clock provider by adding #clock-cells property. Signed-off-by:
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Johan Hovold authored
The SA8540P PMICs are named PMM8540. Rename the devicetree source labels to reflect this. Reviewed-by:
Brian Masney <bmasney@redhat.com> Reviewed-by:
Eric Chanudet <echanude@redhat.com> Signed-off-by:
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