1. 15 Jun, 2006 7 commits
    • Anton Blanchard's avatar
      [POWERPC] Optimise some TOC usage · 8555a002
      Anton Blanchard authored
      Micro-optimisation - add no-minimal-toc to some more arch/powerpc Makefiles.
      Signed-off-by: default avatarAnton Blanchard <anton@samba.org>
      Signed-off-by: default avatarPaul Mackerras <paulus@samba.org>
      8555a002
    • Anton Blanchard's avatar
      [POWERPC] 64bit FPSCR support · 3a2c48cf
      Anton Blanchard authored
      Forthcoming machines will extend the FPSCR to 64 bits.  We already
      had a 64-bit save area for the FPSCR, but we need to use a new form
      of the mtfsf instruction.  Fortunately this new form is decoded as
      an ordinary mtfsf by existing 64-bit processors.
      Signed-off-by: default avatarAnton Blanchard <anton@samba.org>
      Signed-off-by: default avatarPaul Mackerras <paulus@samba.org>
      3a2c48cf
    • mostrows@watson.ibm.com's avatar
      [POWERPC] Editable kernel command-line in zImage binary. · 30d8caf7
      mostrows@watson.ibm.com authored
      zImage will set /chosen/bootargs (if it is otherwise empty) with the
      contents of a buffer in the section "__builtin_cmdline".  This permits
      tools to edit zImage binaries to set the command-line eventually
      processed by vmlinux.
      
      --
      Signed-off-by: default avatarMichal Ostrowski <mostrows@watson.ibm.com>
      Signed-off-by: default avatarPaul Mackerras <paulus@samba.org>
      30d8caf7
    • Jake Moilanen's avatar
      [POWERPC] MSI abstraction · 204face4
      Jake Moilanen authored
      Instead of trying to make PPC64 MSI fit in a Intel-centric MSI layer, a
      simple short-term solution is to hook the pci_{en/dis}able_msi() calls
      and make a machdep call.
      
      The rest of the MSI functions are superfluous for what is needed at this
      time.  Many of which can have machdep calls added as needed.
      
      Ben and Michael Ellerman are looking into rewrite the MSI layer to be
      more generic.  However, in the meantime this works as a interim
      solution.
      Signed-off-by: default avatarJake Moilanen <moilanen@austin.ibm.com>
      Signed-off-by: default avatarPaul Mackerras <paulus@samba.org>
      204face4
    • Jake Moilanen's avatar
      [POWERPC] Add support for PCI-Express nodes in the device tree · bb53bb3d
      Jake Moilanen authored
      This adds support to recognize the PCIe device_type "pciex" and made
      the portdrv buildable.
      Signed-off-by: default avatarJake Moilanen <moilanen@austin.ibm.com>
      Signed-off-by: default avatarPaul Mackerras <paulus@samba.org>
      bb53bb3d
    • Paul Mackerras's avatar
      powerpc: Simplify push_end definition in pci_32.c · 0f582bc1
      Paul Mackerras authored
      The push_end macro in arch/powerpc/kernel/pci_32.c uses integer
      division and multiplication to achieve the effect of rounding a
      resource end address up and then advancing it to the end of a
      power-of-2 sized region.  This changes it to an equivalent computation
      that only needs an integer add and OR.  This is partly based on an
      earlier patch by Mel Gorman.
      Signed-off-by: default avatarPaul Mackerras <paulus@samba.org>
      0f582bc1
    • Paul Mackerras's avatar
      powerpc: Use 64k pages without needing cache-inhibited large pages · bf72aeba
      Paul Mackerras authored
      Some POWER5+ machines can do 64k hardware pages for normal memory but
      not for cache-inhibited pages.  This patch lets us use 64k hardware
      pages for most user processes on such machines (assuming the kernel
      has been configured with CONFIG_PPC_64K_PAGES=y).  User processes
      start out using 64k pages and get switched to 4k pages if they use any
      non-cacheable mappings.
      
      With this, we use 64k pages for the vmalloc region and 4k pages for
      the imalloc region.  If anything creates a non-cacheable mapping in
      the vmalloc region, the vmalloc region will get switched to 4k pages.
      I don't know of any driver other than the DRM that would do this,
      though, and these machines don't have AGP.
      
      When a region gets switched from 64k pages to 4k pages, we do not have
      to clear out all the 64k HPTEs from the hash table immediately.  We
      use the _PAGE_COMBO bit in the Linux PTE to indicate whether the page
      was hashed in as a 64k page or a set of 4k pages.  If hash_page is
      trying to insert a 4k page for a Linux PTE and it sees that it has
      already been inserted as a 64k page, it first invalidates the 64k HPTE
      before inserting the 4k HPTE.  The hash invalidation routines also use
      the _PAGE_COMBO bit, to determine whether to look for a 64k HPTE or a
      set of 4k HPTEs to remove.  With those two changes, we can tolerate a
      mix of 4k and 64k HPTEs in the hash table, and they will all get
      removed when the address space is torn down.
      Signed-off-by: default avatarPaul Mackerras <paulus@samba.org>
      bf72aeba
  2. 13 Jun, 2006 1 commit
  3. 12 Jun, 2006 3 commits
    • Paul Mackerras's avatar
      powerpc: Remove unused paca->pgdir field · 43064431
      Paul Mackerras authored
      The pgdir field in the paca was a leftover from the dynamic VSIDs
      patch, and is not used in the current kernel code.  This removes it.
      Signed-off-by: default avatarPaul Mackerras <paulus@samba.org>
      43064431
    • Paul Mackerras's avatar
      Merge branch 'merge' · 7a0c58d0
      Paul Mackerras authored
      7a0c58d0
    • Paul Mackerras's avatar
      [PATCH] Fix for the PPTP hangs that have been reported · 289a1e99
      Paul Mackerras authored
      People have been reporting that PPP connections over ptys, such as
      used with PPTP, will hang randomly when transferring large amounts of
      data, for instance in http://bugzilla.kernel.org/show_bug.cgi?id=6530.
      I have managed to reproduce the problem, and the patch below fixes the
      actual cause.
      
      The problem is not in fact in ppp_async.c but in n_tty.c.  What
      happens is that when pptp reads from the pty, we call read_chan() in
      drivers/char/n_tty.c on the master side of the pty.  That copies all
      the characters out of its buffer to userspace and then calls
      check_unthrottle(), which calls the pty unthrottle routine, which
      calls tty_wakeup on the slave side, which calls ppp_asynctty_wakeup,
      which calls tasklet_schedule.  So far so good.  Since we are in
      process context, the tasklet runs immediately and calls
      ppp_async_process(), which calls ppp_async_push, which calls the
      tty->driver->write function to send some more output.
      
      However, tty->driver->write() returns zero, because the master
      tty->receive_room is still zero.  We haven't returned from
      check_unthrottle() yet, and read_chan() only updates tty->receive_room
      _after_ calling check_unthrottle.  That means that the driver->write
      call in ppp_async_process() returns 0.  That would be fine if we were
      going to get a subsequent wakeup call, but we aren't (we just had it,
      and the buffer is now empty).
      
      The solution is for n_tty.c to update tty->receive_room _before_
      calling the driver unthrottle routine.  The patch below does this.
      With this patch I was able to transfer a 900MB file over a PPTP
      connection (taking about 25 minutes), whereas without the patch the
      connection would always stall in under a minute.
      Signed-off-by: default avatarPaul Mackerras <paulus@samba.org>
      Signed-off-by: default avatarLinus Torvalds <torvalds@osdl.org>
      289a1e99
  4. 11 Jun, 2006 9 commits
  5. 10 Jun, 2006 9 commits
  6. 09 Jun, 2006 11 commits
    • David S. Miller's avatar
      [TG3]: Handle Sun onboard tg3 chips more correctly. · f49639e6
      David S. Miller authored
      Get rid of all the SUN_570X logic and instead:
      
      1) Make sure MEMARB_ENABLE is set when we probe the SRAM
         for config information.  If that is off we will get
         timeouts.
      
      2) Always try to sync with the firmware, if there is no
         firmware running do not treat it as an error and instead
         just report it the first time we notice this condition.
      
      3) If there is no valid SRAM signature, assume the device
         is onboard by setting TG3_FLAG_EEPROM_WRITE_PROT.
      
      Update driver version and release date.
      
      With help from Michael Chan and Fabio Massimo Di Nitto.
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      f49639e6
    • David S. Miller's avatar
      [SPARC64]: Dump local cpu registers in sun4v_log_error() · 5224e6cc
      David S. Miller authored
      This makes the debugging information more usable.
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      5224e6cc
    • Michael Ellerman's avatar
      [PATCH] powerpc: Cleanup hvc_rtas.c a little · 6b81e800
      Michael Ellerman authored
      A few cleanups in hvc_rtas.c:
       1. Remove unused RTASCONS_PUT_ATTEMPTS
       2. Remove unused rtascons_put_delay.
       3. Use i as a loop counter like everyone else on earth.
       4. Remove pointless variables, eg. x = foo; if (x) return something_else;
       5. Whitespace cleanups and formatting.
      Signed-off-by: default avatarMichael Ellerman <michael@ellerman.id.au>
      Signed-off-by: default avatarPaul Mackerras <paulus@samba.org>
      6b81e800
    • Michael Ellerman's avatar
      [PATCH] powerpc: Make rtas console _much_ faster · b5374461
      Michael Ellerman authored
      Currently the hvc_rtas driver is painfully slow to use. Our "benchmark" is
      ls -R /etc, which spits out about 27866 characters. The theoretical maximum
      speed would be about 2.2 seconds, the current code takes ~50 seconds.
      
      The core of the problem is that sometimes when the tty layer asks us to push
      characters the firmware isn't able to handle some or all of them, and so
      returns an error. The current code sees this and just returns to the tty code
      with the buffer half sent.
      
      The khvcd thread will eventually wake up and try to push more characters, which
      will usually work because by then the firmware's had time to make room. But
      the khvcd thread only wakes up every 10 milliseconds, which isn't fast enough.
      
      So change the khvcd thread logic so that if there's an incomplete write we
      yield() and then immediately try writing again. Doing so makes POLL_QUICK and
      POLL_WRITE synonymous, so remove POLL_QUICK.
      
      With this patch our "benchmark" takes ~2.8 seconds.
      Signed-off-by: default avatarMichael Ellerman <michael@ellerman.id.au>
      Signed-off-by: default avatarPaul Mackerras <paulus@samba.org>
      b5374461
    • Paul Mackerras's avatar
      [PATCH] powerpc: Implement PR_[GS]ET_UNALIGN prctls for powerpc · e9370ae1
      Paul Mackerras authored
      This gives the ability to control whether alignment exceptions get
      fixed up or reported to the process as a SIGBUS, using the existing
      PR_SET_UNALIGN and PR_GET_UNALIGN prctls.  We do not implement the
      option of logging a message on alignment exceptions.
      Signed-off-by: default avatarPaul Mackerras <paulus@samba.org>
      e9370ae1
    • Paul Mackerras's avatar
      [PATCH] powerpc: Implement support for setting little-endian mode via prctl · fab5db97
      Paul Mackerras authored
      This adds the PowerPC part of the code to allow processes to change
      their endian mode via prctl.
      
      This also extends the alignment exception handler to be able to fix up
      alignment exceptions that occur in little-endian mode, both for
      "PowerPC" little-endian and true little-endian.
      
      We always enter signal handlers in big-endian mode -- the support for
      little-endian mode does not amount to the creation of a little-endian
      user/kernel ABI.  If the signal handler returns, the endian mode is
      restored to what it was when the signal was delivered.
      
      We have two new kernel CPU feature bits, one for PPC little-endian and
      one for true little-endian.  Most of the classic 32-bit processors
      support PPC little-endian, and this is reflected in the CPU feature
      table.  There are two corresponding feature bits reported to userland
      in the AT_HWCAP aux vector entry.
      
      This is based on an earlier patch by Anton Blanchard.
      Signed-off-by: default avatarPaul Mackerras <paulus@samba.org>
      fab5db97
    • Anton Blanchard's avatar
      [PATCH] Add a prctl to change the endianness of a process. · 651d765d
      Anton Blanchard authored
      This new prctl is intended for changing the execution mode of the
      processor, on processors that support both a little-endian mode and a
      big-endian mode.  It is intended for use by programs such as
      instruction set emulators (for example an x86 emulator on PowerPC),
      which may find it convenient to use the processor in an alternate
      endianness mode when executing translated instructions.
      
      Note that this does not imply the existence of a fully-fledged ABI for
      both endiannesses, or of compatibility code for converting system
      calls done in the non-native endianness mode.  The program is expected
      to arrange for all of its system call arguments to be presented in the
      native endianness.
      
      Switching between big and little-endian mode will require some care in
      constructing the instruction sequence for the switch.  Generally the
      instructions up to the instruction that invokes the prctl system call
      will have to be in the old endianness, and subsequent instructions
      will have to be in the new endianness.
      Signed-off-by: default avatarAnton Blanchard <anton@samba.org>
      Signed-off-by: default avatarPaul Mackerras <paulus@samba.org>
      651d765d
    • Benjamin Herrenschmidt's avatar
      [PATCH] powerpc: Add udbg-immortal kernel option · 3b5e905e
      Benjamin Herrenschmidt authored
      When debugging early kernel crashes that happen after console_init() and
      before a proper console driver takes over, we often have to go hack into
      udbg.c to prevent it from unregistering so we can "see" what is
      happening. This patch adds a kernel command line option "udbg-immortal"
      instead to avoid having to modify the kernel.
      Signed-off-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
      Signed-off-by: default avatarPaul Mackerras <paulus@samba.org>
      3b5e905e
    • Michael Neuling's avatar
      [PATCH] powerpc: oprofile support for POWER6 · e78dbc80
      Michael Neuling authored
      POWER6 moves some of the MMCRA bits and also requires some bits to be
      cleared each PMU interrupt.
      Signed-off-by: default avatarMichael Neuling <mikey@neuling.org>
      Acked-by: default avatarAnton Blanchard <anton@samba.org>
      Signed-off-by: default avatarPaul Mackerras <paulus@samba.org>
      e78dbc80
    • Christoph Hellwig's avatar
      [PATCH] powerpc: node-aware dma allocations · 8eb6c6e3
      Christoph Hellwig authored
      Make sure dma_alloc_coherent allocates memory from the local node.  This
      is important on Cell where we avoid going through the slow cpu
      interconnect.
      
      Note:  I could only test this patch on Cell, it should be verified on
      some pseries machine by those that have the hardware.
      Signed-off-by: default avatarChristoph Hellwig <hch@lst.de>
      Signed-off-by: default avatarPaul Mackerras <paulus@samba.org>
      8eb6c6e3
    • Christoph Hellwig's avatar
      [PATCH] powerpc: implement pcibus_to_node and pcibus_to_cpumask · 318facbe
      Christoph Hellwig authored
      On 64bit powerpc we can find out what node a pci bus hangs off, so
      implement the topology.h macros that export this information.
      
      For 32bit this seems a little more difficult, but I don't know of 32bit
      powerpc NUMA machines either, so let's leave it out for now.
      Signed-off-by: default avatarChristoph Hellwig <hch@lst.de>
      Signed-off-by: default avatarPaul Mackerras <paulus@samba.org>
      318facbe