1. 13 Mar, 2017 2 commits
  2. 10 Mar, 2017 36 commits
  3. 09 Mar, 2017 2 commits
    • Jie Deng's avatar
      net: dwc-xlgmac: Initial driver for DesignWare Enterprise Ethernet · 65e0ace2
      Jie Deng authored
      Synopsys provides a new DesignWare Core Enterprise Ethernet MAC
      IP (DWC-XLGMAC) for Ethernet designs. It is compliant with the
      IEEE 802.3-2012 specifications, including IEEE 802.3ba and
      consortium specifications.
      
      This patch provides the initial 25G/40G/50G/100G Ethernet driver
      for Synopsys XLGMAC IP Prototyping Kit.
      Signed-off-by: default avatarJie Deng <jiedeng@synopsys.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      65e0ace2
    • David S. Miller's avatar
      Merge branch 'xgene-v2' · 24d79ce0
      David S. Miller authored
      Iyappan Subramanian says:
      
      ====================
      drivers: net: xgene-v2: Add RGMII based 1G driver
      
      This patch set adds support for RGMII based 1GbE hardware which uses a linked
      list of DMA descriptor architecture (v2) for APM X-Gene SoCs.
      
      v4: Address review comments from v3
      	- fixed local variable declarations to reverse christmas tree order
      
      v3: Address review comments from v2
      	- fixed kbuild warnings (this 'if' clause does not guard)
      
      v2: Address review comments from v1
      	- moved create_desc_ring and delete_desc_ring to open() and close()
      	  respectively
      	- changed to use dma_zalloc APIs
      	- fixed tx_timeout()
      	- removed tx completion polling upper bound
      	- added error checking on rx packets
      	- added netif_stop_queue() and netif_wake_queue()
      
      v1:
      	- Initial version
      ====================
      Signed-off-by: default avatarIyappan Subramanian <isubramanian@apm.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      24d79ce0