- 01 Mar, 2012 21 commits
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Jean-Christophe PLAGNIOL-VILLARD authored
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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Jean-Christophe PLAGNIOL-VILLARD authored
Use the gpio for d7 as we do not support yet the pwm led via dt. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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Jean-Christophe PLAGNIOL-VILLARD authored
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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Nicolas Ferre authored
This patch adds the support for new PIO controller found on some at91sam SOCs. - more peripheral multiplexing - more features to configure on a PIO (pull-down, Schmitt trigger, debouncer) - support for several IRQ triggering features (type and polarity) Support for those new features are retrieved from the device tree compatibility string. Debugfs at91_gpio file is updated to monitor configuration. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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Nicolas Ferre authored
Add these SMC accessors to the at91sam9x5 as we will need them for NAND flash (for instance). Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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Nicolas Ferre authored
Some SoC have a 32 bit variant of Timer Counter Blocks. We do not need the chaining of two 16 bit counters anymore for them. The SoC nature is deduced from the device tree "compatible" string. For non-device-tree configurations, backward compatibility is maintained by using the default 16 bit counter configuration. This patch addresses both the atmel_tclib and its user: tcb_clksrc clocksource. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Grant Likely <grant.likely@secretlab.ca>
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Nicolas Ferre authored
Device tree support added to atmel_tclib: the generic Timer Counter library. This is used by the clocksource/clockevent driver tcb_clksrc. The current DT enabled platforms are also modified to use it: - .dtsi files are modified to add Timer Counter Block entries - alias are created to allow identification of each block - clkdev lookup tables are added for clocks identification. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Grant Likely <grant.likely@secretlab.ca>
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Nicolas Ferre authored
Requesting iomem region and ioremaping is now done using the resource size specified instead of a constant value. Each <SoC>_device.c file is modified accordingly to reflect actual user interface size. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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Nicolas Ferre authored
Traces related to IRQ management are useful for timers in case of non-working IRQ subsystem (switch to irq_domain for instance). Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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Jean-Christophe PLAGNIOL-VILLARD authored
Retreive registers address and IRQ from device tree entry. Called from at91_dt_init_irq() so that timers are up-n-running when timers initialization will occur. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> [nicolas.ferre@atmel.com: change error path and interrupts property handling] Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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Nicolas Ferre authored
Both AIC and GPIO controllers are now using the standard of_irq_init() function to initialize IRQs in case of DT use. The DT specific initialization functions are now separated from the non-DT case and are now using "linear" irq domains. The .map() irqdomain operation is responsible for positioning the IRQ handlers. In AIC case, the Linux IRQ number is directly programmed in the hardware to avoid an additional reverse mapping operation. The AIC position its irq domain as the "default" irq domain. For DT case, the priority is not yet filled in the SMR. It will be the subject of another patch. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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Nicolas Ferre authored
Adding of irqdomain in AIC code make the specification of the irq domain in board file useless. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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Nicolas Ferre authored
This value is determined at runtime using device tree or platform data information. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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Nicolas Ferre authored
Replace the gpio_to_irq() macro by a plain gpiolib .to_irq() handler. This call is using the irqdomain to translate hardware to Linux IRQ numbers. The irq_to_gpio() macro is completely removed. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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Nicolas Ferre authored
Protect build failure in case of non-DT configuration: the gpio_chip structure does not have a of_node field in case of !CONFIG_OF_GPIO. Keep this in a separate patch as it can be reverted if the field is added for both DT/non-DT cases. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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Nicolas Ferre authored
Add "legacy" type of irqdomain to preserve old-style numbering and allow smooth transition for both DT and non-DT cases. Original idea and code by Jean-Christophe Plagniol-Villard. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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Nicolas Ferre authored
What was true only on at91sam9263 about the sharing of a single AIC IRQ line for several GPIO banks is now used by several Atmel SoCs. Change a variable name to allow better understanding while introducing IRQ domains in following patches. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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Nicolas Ferre authored
irq_to_gpio() macro will be removed from AT91 GPIO interrupt controller. So we replace it with the use of gpio_to_irq() and a reworked test. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Cc: linux-usb@vger.kernel.org
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Nicolas Ferre authored
gpio_to_irq() implementation will be moved from a macro to a plain function: we cannot use it in a structure initialization anymore. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Reviewed-by: Ryan Mallon <rmallon@gmail.com>
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Nicolas Ferre authored
Add an irqdomain for the AIC interrupt controller. The device tree support is mapping the registers and is using the irq_domain_add_legacy() to manage hwirq translation. The documentation is describing the meaning of the two cells required for using this "interrupt-controller" in a device tree node. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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- 29 Feb, 2012 1 commit
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git://github.com/at91linux/linux-at91Arnd Bergmann authored
Merge branch 'at91-3.4-base2+cleanup' of git://github.com/at91linux/linux-at91 into at91/staging/base2+cleanup * 'at91-3.4-base2+cleanup' of git://github.com/at91linux/linux-at91: (20 commits) ARM: at91: properly sort dtb files in Makefile.boot ARM: at91: add at91sam9g25ek.dts in Makefile.boot ARM: at91/board-dt: drop default console Atmel: move console default platform_device to serial driver ARM: at91: merge SRAM Memory banks thanks to mirroring ARM: at91: finally drop at91_sys_read/write ARM: at91/rtc-at91sam9: pass the GPBR to use via resources ARM: at91:rtc/rtc-at91sam9: ioremap register bank ARM: at91/rtc-at91sam9: each SoC can select the RTT device to use ARM: at91/PMC: make register base soc independent ARM: at91/PMC: move assignment out of printf ARM: at91/pm_slowclock: add runtime detection of memory contoller ARM: at91: make sdram/ddr register base soc independent ARM: at91: move at91rm9200 sdramc defines to at91rm9200_sdramc.h ARM: at91/pm_slowclock: function slow_clock() accepts parameters ARM: at91/pm_slowclock: rename register to named define ARM: at91/ST: remove not needed casts ARM: at91: make ST (System Timer) soc independent ARM: at91: make matrix register base soc independent ARM: at91/at91x40: remove use of at91_sys_read/write Based on top of the at91/9x5, rmk/for-armsoc, at91/device-board, at91/pm_cleanup and at91/base. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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- 26 Feb, 2012 3 commits
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Grant Likely authored
TWL4030 depends on IRQ_DOMAIN support, so this patch selects it in Kconfig. It used to be that CONFIG_IRQ_DOMAIN must only be selected by the architecture, but recent cleanups have fixed it so that it is safe to select from anywhere. Signed-off-by: Benoit Cousson <b-cousson@ti.com> [grant.likely: Changed from a depends to a select] Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Cc: Samuel Ortiz <sameo@linux.intel.com>
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Grant Likely authored
Sparc has its own helpers for translating address ranges when the device tree is parsed at boot time, and it isn't able to use of_platform_populate(). However, there are some device drivers that want to use that function on other DT enabled platforms (ie. TWL4030). This patch adds an empty of_platform_populate() implementation that returns an error when CONFIG_OF_ADDRESS is not selected. Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Cc: Benoit Cousson <b-cousson@ti.com> Cc: Samuel Ortiz <sameo@linux.intel.com>
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Grant Likely authored
Several architectures define their own empty irq_dispose_mapping(). Since the irq_domain code is centralized now, there is little need to do so. This patch removes them and creates a new empty copy when !CONFIG_IRQ_DOMAIN is selected. The patch also means that IRQ_DOMAIN becomes selectable on all architectures. Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Cc: Rob Herring <rob.herring@calxeda.com> Cc: "David S. Miller" <davem@davemloft.net> Cc: Jonas Bonn <jonas@southpole.se> Cc: sparclinux@vger.kernel.org Cc: linux@lists.openrisc.net
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- 24 Feb, 2012 1 commit
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Grant Likely authored
This patch makes IRQ_DOMAIN usable on MIPS. It uses an ugly workaround to preserve current behaviour so that MIPS has time to add irq_domain registration to the irq controller drivers. The workaround will be removed in Linux v3.6 Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Rob Herring <rob.herring@calxeda.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-mips@linux-mips.org
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- 23 Feb, 2012 14 commits
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Grant Likely authored
This patch removes the x86-specific definition of irq_domain and replaces it with the common implementation. Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Acked-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Cc: Rob Herring <rob.herring@calxeda.com> Cc: Thomas Gleixner <tglx@linutronix.de>
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Jean-Christophe PLAGNIOL-VILLARD authored
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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Nicolas Ferre authored
Reported-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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Jean-Christophe PLAGNIOL-VILLARD authored
This default console mechanism is not used if the console is selected by command line (console= parameter). Dropping this will simplify the compilation of multiple SoC in the same kernel image. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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Jean-Christophe PLAGNIOL-VILLARD authored
This variable spread on every SoC that is using the atmel_serial.c driver can be included directly into the latter. This will allow to compile multiple soc in the same kernel. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Hans-Christian Egtvedt <egtvedt@samfundet.no> Cc: kernel@avr32linux.org
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Jean-Christophe PLAGNIOL-VILLARD authored
On at91sam9260 and at91sam9g20 the SRAM banks are mirrored. We can merge them together to be able to have bigger and continuous internal RAM. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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Jean-Christophe PLAGNIOL-VILLARD authored
Remove at91_sys_read/write() from io.h file. This function is not used anymore and was a stopper on the way to single zImage kernel for AT91. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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Jean-Christophe PLAGNIOL-VILLARD authored
The GPBR registers are used for storing RTC values. The GPBR registers to use are now provided using standard resource entry. The array is filled in SoC specific code. rtc-at91sam9 RTT as RTC driver is modified to retrieve this information. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> [nicolas.ferre@atmel.com: rework resources assignment] Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Reviewed-by: Ryan Mallon <rmallon@gmail.com>
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Jean-Christophe PLAGNIOL-VILLARD authored
Instead of computing virtual address with AT91_VA_BASE_SYS, use the appropriate ioremap() call on the driver "memory" resource. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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Jean-Christophe PLAGNIOL-VILLARD authored
For the RTT as RTC driver rtc-at91sam9, the platform_device structure is filled during SoC initialization. This will allow to convert this RTC driver as a standard platform driver. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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Jean-Christophe PLAGNIOL-VILLARD authored
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Reviewed-by: Ryan Mallon <rmallon@gmail.com>
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Nicolas Ferre authored
We move the assignment of values of register out of the seq_printf() calls: It is obviously more readable. Reported-by: Ryan Mallon <rmallon@gmail.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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Jean-Christophe PLAGNIOL-VILLARD authored
This will allow to have all SoC in one kernel image. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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Jean-Christophe PLAGNIOL-VILLARD authored
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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