- 06 Feb, 2013 2 commits
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Lee Jones authored
Not quite sure how this ever worked. In ab8500_gpio_to_irq() the GPIO for conversion is passed through as the second argument. If GPIO13, which is a valid GPIO for IRQ functionality, was received; it would be rejected by the following guard: GPIO_IRQ_CLUSTER(5, 12, 0); /* GPIO numbers start from 1 */ if (offset >= cluster->start && offset <= cluster->end) /* Valid GPIO for IRQ use */ Signed-off-by: Lee Jones <lee.jones@linaro.org> [Augmented to account for off-by-one problem] Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Lee Jones authored
Prior to this patch abx500_gpio_probe() would return the return-value of gpiochip_remove() during its error patch regardless of what the actual failure was. So as long as gpiochip_remove() succeeded, probe() would look like it succeeded too. This patch ensures the correct error value is returned and that mutex_destroy() is invoked if gpiochip_add_pin_range() were to fail. Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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- 05 Feb, 2013 17 commits
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John Crispin authored
The mapping logic inside ltq_pmx_gpio_request_enable() was broken. This only effected Falcon SoC. Signed-off-by: Thomas Langer <thomas.langer@lantiq.com> Signed-off-by: John Crispin <blogic@openwrt.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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John Crispin authored
The current code only has a stub for falcon_pinconf_dbg_show. This patch adds proper functionality. Signed-off-by: Thomas Langer <thomas.langer@lantiq.com> Signed-off-by: John Crispin <blogic@openwrt.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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John Crispin authored
The Falcon driver only defined the pinconf parameters but did not pass them properly to the underlying api. Signed-off-by: Thomas Langer <thomas.langer@lantiq.com> Signed-off-by: John Crispin <blogic@openwrt.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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John Crispin authored
On the Falcon SoC the bootleds are located on pins 9->14. Signed-off-by: Thomas Langer <thomas.langer@lantiq.com> Signed-off-by: John Crispin <blogic@openwrt.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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John Crispin authored
The template falcon.dtsi lists all 6 pad controllers that can be loaded. Only probe those that have status = "okay"; inside the dts file. Signed-off-by: John Crispin <blogic@openwrt.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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John Crispin authored
When setting the OpenDrain bit we should really honour the argument passed inside the devicetree. Signed-off-by: John Crispin <blogic@openwrt.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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John Crispin authored
While converting the boards inside OpenWrt to OF I noticed that the we are missing a pinconf parameter to set a pin to output. Signed-off-by: John Crispin <blogic@openwrt.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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John Crispin authored
While converting all the boards supported by OpenWrt to OF I noticed that this feature is missing. Adding it makes the devicetrees more readable. Signed-off-by: John Crispin <blogic@openwrt.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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John Crispin authored
The logic of the OD bit was inverted when calling the pinconf get method. Signed-off-by: John Crispin <blogic@openwrt.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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John Crispin authored
The XWAY pinctrl driver invalidly uses the port and not the pin number to work out the registers and bits to be set for the opendrain and pullup/down resistors. Signed-off-by: John Crispin <blogic@openwrt.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Lee Jones authored
Current failure path neglects to mutex_destroy() before returning an error due to an invalid parameter or an error received from gpiochip_add(). This patch aims to remedy that behaviour. Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Lee Jones authored
This patch provides some superficial changes to the driver to aid with readability and maintainability. We're mostly fixing things like white-space errors, spreading out code which as been clumped together impeding readability and comment layout, such as using the new "/**" comment start for function headers etc. No code semantics were harmed in the making of this patch. Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Lee Jones authored
Currently in the empty abx500_pin_config_get() function, we're returning -EINVAL, with a comment stating that the reason for the failure is that the function isn't implemented yet. Well there's a proper return code for that. If we use it, we can do away with the comment too, as it would be implied. Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Lee Jones authored
The BIT() macro provides a simple and easy to read way of obtaining bit offsets into things like masks and hardware registers. In this patch we're simply replacing all instances of '1 << x' with 'bit(x)'. Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Patrice Chotard authored
Add AB8540 sub driver to the ABx500 family, pins, pin groups and gpio range. As the pin controller (also the ABx500 controllers) is an inherent part of the SoC and will prevent boot if not available, select this from the Ux500 SoC Kconfig. Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Patrice Chotard <patrice.chotard@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Patrice Chotard authored
Add AB9540 sub driver to the ABx500 family, pins, pin groups and gpio range. As the pin controller (also the ABx500 controllers) is an inherent part of the SoC and will prevent boot if not available, select this from the Ux500 SoC Kconfig. Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Patrice Chotard <patrice.chotard@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Patrice Chotard authored
Add AB8505 sub driver to the ABx5x family. As the pin controller (also the ABx500 controllers) is an inherent part of the SoC and will prevent boot if not available, select this from the Ux500 SoC Kconfig. Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Patrice Chotard <patrice.chotard@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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- 30 Jan, 2013 7 commits
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Patrice Chotard authored
This adds a subdriver for the AB8500 pinctrl portions. As the pin controller (also the ABx500 controllers) is an inherent part of the SoC and will prevent boot if not available, select this from the Ux500 SoC Kconfig. Acked-by: Olof Johansson <olof@lixom.net> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Patrice Chotard authored
This adds the AB8500 core driver, which will be utilized by the follow-on drivers for different ABx500 variants. Sselect the driver from the DBX500_SOC, as this chip is powering and clocking that SoC. Cc: Samuel Ortiz <sameo@linux.intel.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Linus Walleij authored
The AB8500 GPIO driver has been marked BROKEN for ages, and we have something better in store: a shiny new pinctrl driver. So let use delete this old driver as the first step. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Linus Walleij authored
This updates the AB8500 register map with defines for a few new chip variants and adds version detection helpers to handle the different variants. Acked-by: Samuel Ortiz <sameo@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Linus Walleij authored
The pin controller is an inherent part of the SoC, without it the system will not boot, thus it needs to be selected from Kconfig. Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Lee Jones authored
The preference is to use '-' instead of '_' in compatible strings. Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Sachin Kamat authored
'pinctrl_release' is used only in this file. Hence make it static. Without this patch we get the following sparse error: drivers/pinctrl/core.c:815:6: warning: symbol 'pinctrl_release' was not declared. Should it be static? Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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- 23 Jan, 2013 1 commit
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Linus Walleij authored
This makes the device core auto-grab the pinctrl handle and set the "default" (PINCTRL_STATE_DEFAULT) state for every device that is present in the device model right before probe. This will account for the lion's share of embedded silicon devcies. A modification of the semantics for pinctrl_get() is also done: previously if the pinctrl handle for a certain device was already taken, the pinctrl core would return an error. Now, since the core may have already default-grabbed the handle and set its state to "default", if the handle was already taken, this will be disregarded and the located, previously instanitated handle will be returned to the caller. This way all code in drivers explicitly requesting their pinctrl handlers will still be functional, and drivers that want to explicitly retrieve and switch their handles can still do that. But if the desired functionality is just boilerplate of this type in the probe() function: struct pinctrl *p; p = devm_pinctrl_get_select_default(&dev); if (IS_ERR(p)) { if (PTR_ERR(p) == -EPROBE_DEFER) return -EPROBE_DEFER; dev_warn(&dev, "no pinctrl handle\n"); } The discussion began with the addition of such boilerplate to the omap4 keypad driver: http://marc.info/?l=linux-input&m=135091157719300&w=2 A previous approach using notifiers was discussed: http://marc.info/?l=linux-kernel&m=135263661110528&w=2 This failed because it could not handle deferred probes. This patch alone does not solve the entire dilemma faced: whether code should be distributed into the drivers or if it should be centralized to e.g. a PM domain. But it solves the immediate issue of the addition of boilerplate to a lot of drivers that just want to grab the default state. As mentioned, they can later explicitly retrieve the handle and set different states, and this could as well be done by e.g. PM domains as it is only related to a certain struct device * pointer. ChangeLog v4->v5 (Stephen): - Simplified the devicecore grab code. - Deleted a piece of documentation recommending that pins be mapped to a device rather than hogged. ChangeLog v3->v4 (Linus): - Drop overzealous NULL checks. - Move kref initialization to pinctrl_create(). - Seeking Tested-by from Stephen Warren so we do not disturb the Tegra platform. - Seeking ACK on this from Greg (and others who like it) so I can merge it through the pinctrl subsystem. ChangeLog v2->v3 (Linus): - Abstain from using IS_ERR_OR_NULL() in the driver core, Russell recently sent a patch to remove it. Handle the NULL case explicitly even though it's a bogus case. - Make sure we handle probe deferral correctly in the device core file. devm_kfree() the container on error so we don't waste memory for devices without pinctrl handles. - Introduce reference counting into the pinctrl core using <linux/kref.h> so that we don't release pinctrl handles that have been obtained for two or more places. ChangeLog v1->v2 (Linus): - Only store a pointer in the device struct, and only allocate this if it's really used by the device. Cc: Felipe Balbi <balbi@ti.com> Cc: Benoit Cousson <b-cousson@ti.com> Cc: Dmitry Torokhov <dmitry.torokhov@gmail.com> Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Cc: Mitch Bradley <wmb@firmworks.com> Cc: Ulf Hansson <ulf.hansson@linaro.org> Cc: Rafael J. Wysocki <rjw@sisk.pl> Cc: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Rickard Andersson <rickard.andersson@stericsson.com> Cc: Russell King <linux@arm.linux.org.uk> Reviewed-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> [swarren: fixed and simplified error-handling in pinctrl_bind_pins(), to correctly handle deferred probe. Removed admonition from docs not to use pinctrl hogs for devices] Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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- 21 Jan, 2013 3 commits
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Haojian Zhuang authored
Add PIN_CONFIG_SLEW_RATE parameter into pinconf-generic driver. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Haojian Zhuang authored
gpiochip_add_pin_range() needs pinctrl device name as parameter. Currently the parameter is pinctrl description name. So fix it. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Haojian Zhuang authored
Add new function to get devname from pinctrl_dev. pinctrl_dev_get_name() can only get pinctrl description name. If we want to use gpio driver to find pinctrl device node, we need to fetch the pinctrl device name. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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- 18 Jan, 2013 6 commits
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Lee Jones authored
The Nomadik Pinctrl driver requires access to some PRCMU registers in order to run with full functionality. When Device Tree is disabled the required PRCMU base address is passed in via platform data, so in order for Device Tree booting to be as functional, we need a similar mechanism to fetch it from Device Tree. The new semantics goes like this: Parse the Device Tree and look for the PRCMU node using a provided Phandle. Obtain the ioremaped address from that node. If one was supplied via platform data over-write it with anything found in Device Tree. Fail if either the prcm_base can't be found if we're running on anything other than an STN8815 ASIC. Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Lee Jones authored
The AB8500 Pinctrl driver uses PRCMU register addresses to control Pinctrl related functions. For this to happen, the Pinctrl driver needs the PRCMU base to work from. We can do that using standard Open Firmware (of_*) function calls, but first we need a mechanism to gain access to the PRCMU device node. We're going to use a Phandle in this case. Signed-off-by: Lee Jones <lee.jones@linaro.org> [Added reg-names="prcmu"; to the prcmu DT node] Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Kukjin Kim authored
Since pinctrl-exynos can support exynos4 and exynos5 so changed the option name to PINCTRL_EXYNOS for more clarity. Cc: Thomas Abraham <Thomas.abraham@linaro.org> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Maxime Ripard authored
Some pin configurations IP allows to set the current output to the pin. This patch adds such a parameter to the pinconf-generic mechanism. This parameter takes as argument the drive strength in mA. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Pritesh Raithatha authored
This adds a driver for the Tegra114 pinmux, and required parameterization data for Tegra114. The driver uses the common Tegra pincontrol driver utility functions to implement the majority of the driver. This driver is not compatible with the earlier NVIDIA's SoCs, hence add new compatibile as "nvidia,tegra114-pinmux". Originally written by Pritesh. ldewangan: - cleanup the patches, - remove non-require tables. - Use module_platform_driver() for driver registartion. Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com> Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Pritesh Raithatha authored
NVIDIA's Tegra114 added two more configuration parameter in pinmux i.e. rcv-sel and drive type. rcv-sel: Select between High and Normal VIL/VIH receivers. RCVR_SEL=1: High VIL/VIH RCVR_SEL=0: Normal VIL/VIH drv_type: Ouptput drive type: 33-50 ohm driver: 0x1 66-100ohm driver: 0x0 Add support of these parameters to be configure from DTS file. Tegra20 and Tegra30 does not support this configuration and hence initialize their pinmux structure with reg = -1. Originally written by Pritesh Raithatha. Changes by ldewangan: - remove drvtype_width as it is always 2. - Better describe the change. Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com> Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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- 11 Jan, 2013 4 commits
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Linus Walleij authored
commit af1024e0f7cde9023ddd0f3116db03911d5914c0 "pinctrl: skip deferral of hogs" Attempts to avoid probe deferral on hogged pins, but we forgot the device tree case. This patch fixes this. Cc: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Reported-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Gabriel Fernandez authored
This implements pin multiplexing and pin configuration for the Nomadik pin controller using the device tree. Signed-off-by: Gabriel Fernandez <gabriel.fernandez@stericsson.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Philippe Langlais <philippe.langlais@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Linus Walleij authored
Instead of jumping to a label later in the probe just return with an error code whenever probe() fails. Make sure to remove the gpiochip on irqdomain error now that we're at it. Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Linus Walleij authored
Some leftovers in the driver were using NOMADIK_* macros to translate the irq numbers to offsets, while the first base IRQ was already being passed from platform data, and the function setting the disable mask could just as well use the irqdomain. Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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