- 30 Sep, 2015 38 commits
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Arun Siluvery authored
WA in this function should be ordered based on register address. The following order is suggested (Ville), instpm mi_mode row chicken half slice chicken common slice chicken hdc chicken cache_mode_0 cache_mode_1 gt_mode Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Arun Siluvery <arun.siluvery@linux.intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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Arun Siluvery authored
Dropping it because it is for pre-production stepping, also removed bit definition in i915_reg.h as it is not used anywhere else. Signed-off-by: Arun Siluvery <arun.siluvery@linux.intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> [danvet: Keep #define as Ville suggested.] Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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Arun Siluvery authored
Dropping it because it is for pre-production stepping, also removed bit definition in i915_reg as it is not used anywhere else. Signed-off-by: Arun Siluvery <arun.siluvery@linux.intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> [danvet: Keep define as Ville suggested.] Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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Arun Siluvery authored
Dropping it because it is for pre-production stepping. Signed-off-by: Arun Siluvery <arun.siluvery@linux.intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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Arun Siluvery authored
Updated WA with the name. Signed-off-by: Arun Siluvery <arun.siluvery@linux.intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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Arun Siluvery authored
Merge Wa4x4STCOptimizationDisable and WaDisablePartialResolveInVc to save an entry in WA array. Signed-off-by: Arun Siluvery <arun.siluvery@linux.intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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Arun Siluvery authored
Signed-off-by: Arun Siluvery <arun.siluvery@linux.intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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Mika Kahola authored
This patch adds information of current and maximum CD clock frequency and pixel clock frequency information on 'i915_debugfs.c'. v2: - combined seperate patches for current CD clock, maximum CD clock and maximum pixel clock - space added between the frequency value and the unit Signed-off-by: Mika Kahola <mika.kahola@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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Ville Syrjälä authored
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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Ville Syrjälä authored
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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Ville Syrjälä authored
v2: Deal with _CURABASE too Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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Ville Syrjälä authored
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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Ville Syrjälä authored
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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Ville Syrjälä authored
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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Ville Syrjälä authored
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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Ville Syrjälä authored
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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Ville Syrjälä authored
Handle the HDMI aspect ratio property the same way in the SDVO code as we handle it in the HDMI code. v2: Remove stray whitespace change Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Mika Kahola <mika.kahola@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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Ville Syrjälä authored
Make adjusted_mode const whereever we don't have to modify it. This only covers cases when we have a local adjusted_mode variable, and doesn't make any difference for cases where we just dereference pipe_config->adjusted_mode. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Mika Kahola <mika.kahola@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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Ville Syrjälä authored
We shouldn't frob adjusted_mode after .compute_config(), so move the infoframe aspect ratio setup to .compute_config() from intel_hdmi_set_avi_infoframe(). Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Mika Kahola <mika.kahola@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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Ville Syrjälä authored
The adjustead_mode crtc_ timings are what we will program into the hardware, so it's those timings we should be looking practically everywhere. The normal and crtc_ timings should differ only when stere doubling is used. In that case the normal timings are the orignal non-doubled timigns, and crtc_ timings are the doubled timings used by the hardware. The only case where we continue to look at the normal timings is when we pass the adjusted_mode to drm_match_{cea,hdmi}_mode() to find the VIC. drm_edid keeps the modes aronund in the non-double form only, so it needs the non-double timings to match against. Done with sed 's/adjusted_mode->\([vhVH]\)/adjusted_mode->crtc_\1/g' 's/adjusted_mode->clock/adjusted_mode->crtc_clock/g' with a manual s/VDisplay/vdisplay/ within the comment in intel_dvo.c v2: Update due to intel_dsi.c changes Reviewed-by: Mika Kahola <mika.kahola@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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Ville Syrjälä authored
Rename the function argument to 'adjusted_mode' whenever the function only ever gets passed the adjusted_mode. v2: Update due to intel_dsi.c changes Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Mika Kahola <mika.kahola@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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Paulo Zanoni authored
Make the giant function a little less giant. Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> [danvet: Add pipe_ prefix as suggested by Chris.] Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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Paulo Zanoni authored
Make it clear that we're checking whether FBC is supported or not. The fact that the vfunc is not NULL is just a consequence. Another name option would have been fbc_initialized(). Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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Paulo Zanoni authored
The spec says we just can't use it. v2: - Add WA name (Ville). - Add a big comment explaining that we still didn't fix the problem where we inherit a framebuffer on the first page (Chris, Ville). Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Acked-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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Maarten Lankhorst authored
This fixes the warnings like "plane A assertion failure, should be disabled but not" that on the initial modeset during boot. This can happen if the primary plane is enabled by the firmware, but inheriting it fails because the DMAR is active or for other reasons. Most likely caused by commit 36750f28 Author: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Date: Mon Jun 1 12:49:54 2015 +0200 drm/i915: update plane state during init This is the 4.4 version of commit 721a09f7 Author: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Date: Tue Sep 15 14:28:54 2015 +0200 drm/i915: Add primary plane to mask if it's visible Reported-by: Andreas Reis <andreas.reis@gmail.com> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91429Reported-and-tested-by: Emil Renner Berthing <kernel@esmil.dk> Tested-by: Andreas Reis <andreas.reis@gmail.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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Ville Syrjälä authored
v2: Hide the 945 vs. rest of gen2/3 difference in the macro Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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Sonika Jindal authored
Bspec update tells that we have to enable oscaledcompmethod instead of ouniqetrangenmethod for enabling scale value during swing programming. v2: Adding back 'don't care' values to bxt_ddi_translations_dp and add error message if ouniquetrangemethod was set (Imre) Signed-off-by: Sonika Jindal <sonika.jindal@intel.com> Reviewed-by: Sivakumar Thulasimani <sivakumar.thulasimani@intel.com>(v1) Reviewed-by: Imre Deak <imre.deak@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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Sonika Jindal authored
Adding voltage swing table for edp to support low vswings. v2: Rebased. Signed-off-by: Sonika Jindal <sonika.jindal@intel.com> Reviewed-by: Sivakumar Thulasimani <sivakumar.thulasimani@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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Jesse Barnes authored
According to the PCI docs and Rafael, we don't need to be doing explicit enables and disables in our init and teardown routines, as they're taken care of by the PCI core. So drop the pm_runtime_disable() at teardown and pm_runtime_set_active() at init. This fixes one failure of the basic-pci-d3-state test on my BYT. v2: drop extra get_noresume() and put_noidle() (Rafael) Signed-off-by: Jesse Barnes <jbarnes at virtuousgeek.org> Cc: "Rafael J. Wysocki" <rjw@rjwysocki.net> Acked-by: "Rafael J. Wysocki" <rjw@rjwysocki.net> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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Alex Dai authored
Bit 16 of GuC status indicates resuming from RC6. The LAPIC_DONE status is a reliable readiness flag only when resuming from RC6. This fix a racing issue that allocation of doorbell fails whilst GuC init is not finished. Signed-off-by: Alex Dai <yu.dai@intel.com> Reviewed-by: Sagar Arun Kamble <sagar.a.kamble@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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Ville Syrjälä authored
Always name any variable pointing at the adjusted mode as 'adjustead_mode'. This will make it much easier to identify when we should use the crtc_ timings and when we shoudln't. Conversion was performed with coccinelle: @@ expression E; identifier I; @@ - struct drm_display_mode *I = &E.adjusted_mode; + struct drm_display_mode *adjusted_mode = &E.adjusted_mode; <... - I + adjusted_mode ...> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Mika Kahola <mika.kahola@intel.com> [danvet: Fixup conflicts.] Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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Ville Syrjälä authored
Replace intel_dvo->panel_fixed_mode with the appropriate intel_panel stuff. Now all connectors that have a fixed mode use intel_panel. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Mika Kahola <mika.kahola@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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Animesh Manna authored
Another interesting criteria to work dmc as expected is pw1 to be enabled by driver and dmc will shut it off in its execution sequence. If already disabled by driver dmc will get confuse and behave differently than expected found during pc10 entry issue for skl. So berfore we disable power-well 1, added check if dmc firmware is present and driver will not disable power well 1, but for any reason if firmware is not present of failed to load we can shut off the power well 1 which will save some power. As skl is currently fully dependent on dmc to go in lowest possible power state (dc6) but the same is not applicable for bxt. Display engine can enter into dc9 without dmc, hence unblocking disable call. v1: Initial version. v2: Rebased as per current patch series. Cc: Daniel Vetter <daniel.vetter@intel.com> Cc: Damien Lespiau <damien.lespiau@intel.com> Cc: Imre Deak <imre.deak@intel.com> Cc: Sunil Kamath <sunil.kamath@intel.com> Signed-off-by: Animesh Manna <animesh.manna@intel.com> Signed-off-by: Vathsala Nagaraju <vathsala.nagaraju@intel.com> Reviewed-by: A.Sunil Kamath <sunil.kamath@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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Animesh Manna authored
While display engine entering into low power state no need to disable cdclk pll as CSR firmware of dmc will take care. If pll is already enabled firmware execution sequence will be blocked. This is one of the criteria for dmc to work properly. v1: Initial version. v2: Based on review comment from Daniel added code commnent. Cc: Daniel Vetter <daniel.vetter@intel.com> Cc: Damien Lespiau <damien.lespiau@intel.com> Cc: Imre Deak <imre.deak@intel.com> Cc: Sunil Kamath <sunil.kamath@intel.com> Signed-off-by: Animesh Manna <animesh.manna@intel.com> Signed-off-bt: Vathsala Nagaraju <vathsala.nagaraju@intel.com> Signed-off-by: Rajneesh Bhardwaj <rajneesh.bhardwaj@intel.com> Reviewed-by: A.Sunil Kamath <sunil.kamath@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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Animesh Manna authored
This patch remove the function call to set the firmware loading status as uninitialized during suspend. Dmc firmware will restore the firmware in normal suspend. In previous patch added a check to directly read the hardware status and load the firmware if got reset during resume from suspend-hibernation. Cc: Daniel Vetter <daniel.vetter@intel.com> Signed-off-by: Animesh Manna <animesh.manna@intel.com> Signed-off-by: Vathsala Nagaraju <vathsala.nagaraju@intel.com> Reviewed-by: A.Sunil Kamath <sunil.kamath@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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Animesh Manna authored
Dmc will restore the csr program except DC9, cold boot, warm reset, PCI function level reset, and hibernate/suspend. intel_csr_load_program() function is used to load the firmware data from kernel memory to csr address space. All values of csr address space will be zero if it got reset and the first byte of csr program is always a non-zero if firmware is loaded successfuly. Based on hardware status will load the firmware. Without this condition check if we overwrite the firmware data the counters exposed for dc5/dc6 (help for debugging) will be nullified. Note: Above commit message seems to be confused and the real problem apparently going on is that for suspend-to-idle and system standby the firmware survives (it's like runtime pm), but it doesn't for suspend-to-mem and hibernate-to-disk. All the other talking about DC9 and pci reset are irrelevant for the path touched here (only driver load and system resume functions) and might not be true statements. v1: Initial version. v2: Based on review comments from Daniel, - Added a check to know hardware status and load the firmware if not loaded. Cc: Daniel Vetter <daniel.vetter@intel.com> Cc: Damien Lespiau <damien.lespiau@intel.com> Cc: Imre Deak <imre.deak@intel.com> Cc: Sunil Kamath <sunil.kamath@intel.com> Signed-off-by: Animesh Manna <animesh.manna@intel.com> Signed-off-by: Vathsala Nagaraju <vathsala.nagaraju@intel.com> Reviewed-by: A.Sunil Kamath <sunil.kamath@intel.com> [danvet: Explain clearly in the code comment when we need to reload and when not and make it a FIXME. Also deconfuse the commit message with a note. Also: Make. it. compile.] Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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Robert Beckett authored
Virtualized systems often use a virtual P2X4 south bridge. Detect this in intel_detect_pch and make a best guess as to which PCH we should be using. This was seen on vmware esxi hypervisor. When passing the graphics device through to a guest, it can not pass through the PCH. Instead it simulates a P2X4 southbridge. Signed-off-by: Robert Beckett <robert.beckett@intel.com> Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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Daniel Vetter authored
Backmerge to catch up with 4.3. slightly more involved conflict in the irq code, but nothing beyond adjacent changes. Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
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- 29 Sep, 2015 1 commit
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git://anongit.freedesktop.org/drm-intelDave Airlie authored
Another attempt at drm-misc for 4.4 ... - better atomic helpers for runtime pm drivers - atomic fbdev - dp aux i2c STATUS_UPDATE handling (for short i2c replies from the sink) - bunch of constify patches - inital kerneldoc for vga switcheroo - some vblank code cleanups from Ville and Thierry - various polish all over * tag 'topic/drm-misc-2015-09-25' of git://anongit.freedesktop.org/drm-intel: (57 commits) drm/irq: Add drm_crtc_vblank_count_and_time() drm/irq: Rename drm_crtc -> crtc drm: drm_atomic_crtc_get_property should be static drm/gma500: Remove DP_LINK_STATUS_SIZE redefinition vga_switcheroo: Set active attribute to false for audio clients drm/core: Preserve the fb id on close. drm/core: Preserve the framebuffer after removing it. drm: Use vblank timestamps to guesstimate how many vblanks were missed drm: store_vblank() is never called with NULL timestamp drm: Clean up drm_calc_vbltimestamp_from_scanoutpos() vbl_status drm: Limit the number of .get_vblank_counter() retries drm: Pass flags to drm_update_vblank_count() drm/i915: Fix vblank count variable types drm: Kill pixeldur_ns drm: Stop using linedur_ns and pixeldur_ns for vblank timestamps drm: Move timestamping constants into drm_vblank_crtc drm/fbdev: Update legacy plane->fb refcounting for atomic restore drm: fix kernel-doc warnings in drm_crtc.h vga_switcheroo: Sort headers alphabetically drm: Spell vga_switcheroo consistently ...
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- 28 Sep, 2015 1 commit
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Daniel Vetter authored
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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