#ifndef __ASM_SH_HD64461
#define __ASM_SH_HD64461
/*
 *	$Id: hd64461.h,v 1.4 2004/02/01 19:46:04 lethal Exp $
 *	Copyright (C) 2000 YAEGASHI Takeshi
 *	Hitachi HD64461 companion chip support
 */
#include <linux/config.h>

#define HD64461_STBCR	0x10000
#define HD64461_STBCR_CKIO_STBY			0x2000
#define HD64461_STBCR_SAFECKE_IST		0x1000
#define HD64461_STBCR_SLCKE_IST			0x0800
#define HD64461_STBCR_SAFECKE_OST		0x0400
#define HD64461_STBCR_SLCKE_OST			0x0200
#define HD64461_STBCR_SMIAST			0x0100
#define HD64461_STBCR_SLCDST			0x0080
#define HD64461_STBCR_SPC0ST			0x0040
#define HD64461_STBCR_SPC1ST			0x0020
#define HD64461_STBCR_SAFEST			0x0010
#define HD64461_STBCR_STM0ST			0x0008
#define HD64461_STBCR_STM1ST			0x0004
#define HD64461_STBCR_SIRST				0x0002
#define HD64461_STBCR_SURTSD			0x0001

#define HD64461_SYSCR	0x10002
#define HD64461_SCPUCR	0x10004

#define HD64461_LCDCBAR		0x11000
#define HD64461_LCDCLOR		0x11002
#define HD64461_LCDCCR		0x11004
#define HD64461_LCDCCR_MOFF	0x80

#define	HD64461_LDR1		0x11010
#define	HD64461_LDR1_DON	0x01
#define	HD64461_LDR1_DINV	0x80

#define	HD64461_LDR2		0x11012
#define	HD64461_LDHNCR		0x11014
#define	HD64461_LDHNSR		0x11016
#define HD64461_LDVNTR		0x11018
#define HD64461_LDVNDR		0x1101a
#define HD64461_LDVSPR		0x1101c
#define HD64461_LDR3		0x1101e

#define HD64461_CPTWAR		0x11030	
#define HD64461_CPTWDR		0x11032
#define HD64461_CPTRAR		0x11034	
#define HD64461_CPTRDR		0x11036

#define HD64461_GRDOR		0x11040
#define HD64461_GRSCR		0x11042
#define HD64461_GRCFGR		0x11044
#define HD64461_GRCFGR_ACCSTATUS		0x10
#define HD64461_GRCFGR_ACCRESET			0x08
#define HD64461_GRCFGR_ACCSTART_BITBLT	0x06
#define HD64461_GRCFGR_ACCSTART_LINE	0x04
#define HD64461_GRCFGR_COLORDEPTH16		0x01

#define HD64461_LNSARH		0x11046
#define HD64461_LNSARL		0x11048
#define HD64461_LNAXLR		0x1104a
#define HD64461_LNDGR		0x1104c
#define HD64461_LNAXR		0x1104e
#define HD64461_LNERTR		0x11050
#define HD64461_LNMDR		0x11052
#define HD64461_BBTSSARH	0x11054
#define HD64461_BBTSSARL	0x11056
#define HD64461_BBTDSARH	0x11058
#define HD64461_BBTDSARL	0x1105a
#define HD64461_BBTDWR		0x1105c
#define HD64461_BBTDHR		0x1105e
#define HD64461_BBTPARH		0x11060
#define HD64461_BBTPARL		0x11062
#define HD64461_BBTMARH		0x11064
#define HD64461_BBTMARL		0x11066
#define HD64461_BBTROPR		0x11068
#define HD64461_BBTMDR		0x1106a

#define HD64461_PCC0ISR         0x12000
#define HD64461_PCC0GCR         0x12002
#define HD64461_PCC0CSCR        0x12004
#define HD64461_PCC0CSCIER      0x12006
#define HD64461_PCC0SCR         0x12008
#define HD64461_PCC1ISR         0x12010
#define HD64461_PCC1GCR         0x12012
#define HD64461_PCC1CSCR        0x12014
#define HD64461_PCC1CSCIER      0x12016
#define HD64461_PCC1SCR         0x12018
#define HD64461_P0OCR           0x1202a
#define HD64461_P1OCR           0x1202c
#define HD64461_PGCR            0x1202e

#define HD64461_GPACR		0x14000
#define HD64461_GPBCR		0x14002
#define HD64461_GPCCR		0x14004
#define HD64461_GPDCR		0x14006
#define HD64461_GPADR		0x14010
#define HD64461_GPBDR		0x14012
#define HD64461_GPCDR		0x14014
#define HD64461_GPDDR		0x14016
#define HD64461_GPAICR		0x14020
#define HD64461_GPBICR		0x14022
#define HD64461_GPCICR		0x14024
#define HD64461_GPDICR		0x14026
#define HD64461_GPAISR		0x14040
#define HD64461_GPBISR		0x14042
#define HD64461_GPCISR		0x14044
#define HD64461_GPDISR		0x14046

#define HD64461_NIRR		0x15000
#define HD64461_NIMR		0x15002

#ifndef CONFIG_HD64461_IOBASE
#define CONFIG_HD64461_IOBASE	0xb0000000
#endif
#ifndef CONFIG_HD64461_IRQ
#define CONFIG_HD64461_IRQ	36
#endif

#define HD64461_IRQBASE		OFFCHIP_IRQ_BASE
#define HD64461_IRQ_NUM 	16

#endif