/* SPDX-License-Identifier: GPL-2.0-only */
/*
 * Purna Chandra Mandal,<purna.mandal@microchip.com>
 * Copyright (C) 2015 Microchip Technology Inc.  All rights reserved.
 */

#ifndef _DT_BINDINGS_CLK_MICROCHIP_PIC32_H_
#define _DT_BINDINGS_CLK_MICROCHIP_PIC32_H_

/* clock output indices */
#define POSCCLK		0
#define FRCCLK		1
#define BFRCCLK		2
#define LPRCCLK		3
#define SOSCCLK		4
#define FRCDIVCLK	5
#define PLLCLK		6
#define SCLK		7
#define PB1CLK		8
#define PB2CLK		9
#define PB3CLK		10
#define PB4CLK		11
#define PB5CLK		12
#define PB6CLK		13
#define PB7CLK		14
#define REF1CLK		15
#define REF2CLK		16
#define REF3CLK		17
#define REF4CLK		18
#define REF5CLK		19
#define UPLLCLK		20
#define MAXCLKS		21

#endif	/* _DT_BINDINGS_CLK_MICROCHIP_PIC32_H_ */
