Timer64
-------

The timer64 node describes C6X event timers.

Required properties:

- compatible: must be "ti,c64x+timer64"
- reg: base address and size of register region
- interrupts: interrupt id

Optional properties:

- ti,dscr-dev-enable: Device ID used to enable timer IP through DSCR interface.

- ti,core-mask: on multi-core SoCs, bitmask of cores allowed to use this timer.

Example:
	timer0: timer@25e0000 {
		compatible = "ti,c64x+timer64";
		ti,core-mask = < 0x01 >;
		reg = <0x25e0000 0x40>;
		interrupt-parent = <&megamod_pic>;
		interrupts = < 16 >;
	};
