TURBOSTAT(8)

NAME
turbostat - Report processor frequency and idle statistics

SYNOPSIS
turbostat [Options] command
turbostat [Options] [--interval seconds]

DESCRIPTION
turbostat reports processor topology, frequency, idle power-state statistics, temperature and power on X86 processors. There are two ways to invoke turbostat. The first method is to supply a command, which is forked and statistics are printed upon its completion. The second method is to omit the command, and turbostat displays statistics every 5 seconds. The 5-second interval can be changed using the --interval option. Some information is not available on older processors.

  Options
--Counter MSR# shows the delta of the specified 64-bit MSR counter.

--counter MSR# shows the delta of the specified 32-bit MSR counter.

--Dump displays the raw counter values.

--debug displays additional system configuration information. Invoking this parameter more than once may also enable internal turbostat debug information.

--interval seconds overrides the default 5-second measurement interval.

--help displays usage for the most common parameters.

--Joules displays energy in Joules, rather than dividing Joules by time to print power in Watts.

--MSR MSR# shows the specified 64-bit MSR value.

--msr MSR# shows the specified 32-bit MSR value.

--Package limits output to the system summary plus the 1st thread in each Package.

--processor limits output to the system summary plus the 1st thread in each processor of each package. Ie. it skips hyper-threaded siblings.

--Summary limits output to a 1-line System Summary for each interval.

--TCC temperature sets the Thermal Control Circuit temperature for systems which do not export that value. This is used for making sense of the Digital Thermal Sensor outputs, as they return degrees Celsius below the TCC activation temperature.

--version displays the version.

The command parameter forks command, and upon its exit, displays the statistics gathered since it was forked.

FIELD DESCRIPTIONS
Package processor package number.
Core processor core number.
CPU Linux CPU (logical processor) number.
Note that multiple CPUs per core indicate support for Intel(R) Hyper-Threading Technology.
AVG_MHz number of cycles executed divided by time elapsed.
%Busy percent of the interval that the CPU retired instructions, aka. % of time in "C0" state.
Bzy_MHz average clock rate while the CPU was busy (in "c0" state).
TSC_MHz average MHz that the TSC ran during the entire interval.
CPU%c1, CPU%c3, CPU%c6, CPU%c7 show the percentage residency in hardware core idle states.
CoreTmp Degrees Celsius reported by the per-core Digital Thermal Sensor.
PkgTtmp Degrees Celsius reported by the per-package Package Thermal Monitor.
Pkg%pc2, Pkg%pc3, Pkg%pc6, Pkg%pc7 percentage residency in hardware package idle states.
PkgWatt Watts consumed by the whole package.
CorWatt Watts consumed by the core part of the package.
GFXWatt Watts consumed by the Graphics part of the package -- available only on client processors.
RAMWatt Watts consumed by the DRAM DIMMS -- available only on server processors.
PKG_% percent of the interval that RAPL throttling was active on the Package.
RAM_% percent of the interval that RAPL throttling was active on DRAM.

EXAMPLE
Without any parameters, turbostat displays statistics ever 5 seconds. (override interval with "-i sec" option, or specify a command for turbostat to fork). The first row of statistics is a summary for the entire system. For residency % columns, the summary is a weighted average. For Temperature columns, the summary is the column maximum. For Watts columns, the summary is a system total. Subsequent rows show per-CPU statistics.
[root@ivy]# ./turbostat
    Core     CPU Avg_MHz   %Busy Bzy_MHz TSC_MHz     SMI  CPU%c1  CPU%c3  CPU%c6  CPU%c7 CoreTmp  PkgTmp Pkg%pc2 Pkg%pc3 Pkg%pc6 Pkg%pc7 PkgWatt CorWatt GFXWatt
       -       -       6    0.36    1596    3492       0    0.59    0.01   99.04    0.00      23      24   23.82    0.01   72.47    0.00    6.40    1.01    0.00
       0       0       9    0.58    1596    3492       0    0.28    0.01   99.13    0.00      23      24   23.82    0.01   72.47    0.00    6.40    1.01    0.00
       0       4       1    0.07    1596    3492       0    0.79
       1       1      10    0.65    1596    3492       0    0.59    0.00   98.76    0.00      23
       1       5       5    0.28    1596    3492       0    0.95
       2       2      10    0.66    1596    3492       0    0.41    0.01   98.92    0.00      23
       2       6       2    0.10    1597    3492       0    0.97
       3       3       3    0.20    1596    3492       0    0.44    0.00   99.37    0.00      23
       3       7       5    0.31    1596    3492       0    0.33

DEBUG EXAMPLE
The "--debug" option prints additional system information before measurements:
turbostat version 4.0 10-Feb, 2015 - Len Brown <lenb@kernel.org>
CPUID(0): GenuineIntel 13 CPUID levels; family:model:stepping 0x6:3a:9 (6:58:9)
CPUID(6): APERF, DTS, PTM, EPB
RAPL: 851 sec. Joule Counter Range, at 77 Watts
cpu0: MSR_NHM_PLATFORM_INFO: 0x81010f0012300
16 * 100 = 1600 MHz max efficiency
35 * 100 = 3500 MHz TSC frequency
cpu0: MSR_IA32_POWER_CTL: 0x0014005d (C1E auto-promotion: DISabled)
cpu0: MSR_NHM_SNB_PKG_CST_CFG_CTL: 0x1e008402 (UNdemote-C3, UNdemote-C1, demote-C3, demote-C1, locked: pkg-cstate-limit=2: pc6n)
cpu0: MSR_NHM_TURBO_RATIO_LIMIT: 0x25262727
37 * 100 = 3700 MHz max turbo 4 active cores
38 * 100 = 3800 MHz max turbo 3 active cores
39 * 100 = 3900 MHz max turbo 2 active cores
39 * 100 = 3900 MHz max turbo 1 active cores
cpu0: MSR_IA32_ENERGY_PERF_BIAS: 0x00000006 (balanced)
cpu0: MSR_RAPL_POWER_UNIT: 0x000a1003 (0.125000 Watts, 0.000015 Joules, 0.000977 sec.)
cpu0: MSR_PKG_POWER_INFO: 0x01e00268 (77 W TDP, RAPL 60 - 0 W, 0.000000 sec.)
cpu0: MSR_PKG_POWER_LIMIT: 0x30000148268 (UNlocked)
cpu0: PKG Limit #1: ENabled (77.000000 Watts, 1.000000 sec, clamp DISabled)
cpu0: PKG Limit #2: DISabled (96.000000 Watts, 0.000977* sec, clamp DISabled)
cpu0: MSR_PP0_POLICY: 0
cpu0: MSR_PP0_POWER_LIMIT: 0x00000000 (UNlocked)
cpu0: Cores Limit: DISabled (0.000000 Watts, 0.000977 sec, clamp DISabled)
cpu0: MSR_PP1_POLICY: 0
cpu0: MSR_PP1_POWER_LIMIT: 0x00000000 (UNlocked)
cpu0: GFX Limit: DISabled (0.000000 Watts, 0.000977 sec, clamp DISabled)
cpu0: MSR_IA32_TEMPERATURE_TARGET: 0x00691400 (105 C)
cpu0: MSR_IA32_PACKAGE_THERM_STATUS: 0x884e0000 (27 C)
cpu0: MSR_IA32_THERM_STATUS: 0x88580000 (17 C +/- 1)
cpu1: MSR_IA32_THERM_STATUS: 0x885a0000 (15 C +/- 1)
cpu2: MSR_IA32_THERM_STATUS: 0x88570000 (18 C +/- 1)
cpu3: MSR_IA32_THERM_STATUS: 0x884e0000 (27 C +/- 1)
 ...
The max efficiency frequency, a.k.a. Low Frequency Mode, is the frequency available at the minimum package voltage. The TSC frequency is the base frequency of the processor -- this should match the brand string in /proc/cpuinfo. This base frequency should be sustainable on all CPUs indefinitely, given nominal power and cooling. The remaining rows show what maximum turbo frequency is possible depending on the number of idle cores. Note that not all information is available on all processors.

FORK EXAMPLE
If turbostat is invoked with a command, it will fork that command and output the statistics gathered when the command exits. eg. Here a cycle soaker is run on 1 CPU (see %c0) for a few seconds until ^C while the other CPUs are mostly idle:
root@ivy: turbostat cat /dev/zero > /dev/null
^C
    Core     CPU Avg_MHz   %Busy Bzy_MHz TSC_MHz     SMI  CPU%c1  CPU%c3  CPU%c6  CPU%c7 CoreTmp  PkgTmp Pkg%pc2 Pkg%pc3 Pkg%pc6 Pkg%pc7 PkgWatt CorWatt GFXWatt
       -       -     496   12.75    3886    3492       0   13.16    0.04   74.04    0.00      36      36    0.00    0.00    0.00    0.00   23.15   17.65    0.00
       0       0      22    0.57    3830    3492       0    0.83    0.02   98.59    0.00      27      36    0.00    0.00    0.00    0.00   23.15   17.65    0.00
       0       4       9    0.24    3829    3492       0    1.15
       1       1       4    0.09    3783    3492       0   99.91    0.00    0.00    0.00      36
       1       5    3880   99.82    3888    3492       0    0.18
       2       2      17    0.44    3813    3492       0    0.77    0.04   98.75    0.00      28
       2       6      12    0.32    3823    3492       0    0.89
       3       3      16    0.43    3844    3492       0    0.63    0.11   98.84    0.00      30
       3       7       4    0.11    3827    3492       0    0.94
30.372243 sec
Above the cycle soaker drives cpu5 up its 3.8 GHz turbo limit while the other processors are generally in various states of idle. Note that cpu1 and cpu5 are HT siblings within core1. As cpu5 is very busy, it prevents its sibling, cpu1, from entering a c-state deeper than c1. Note that the Avg_MHz column reflects the total number of cycles executed divided by the measurement interval. If the %Busy column is 100%, then the processor was running at that speed the entire interval. The Avg_MHz multiplied by the %Busy results in the Bzy_MHz -- which is the average frequency while the processor was executing -- not including any non-busy idle time.

NOTES
turbostat must be run as root. Alternatively, non-root users can be enabled to run turbostat this way: # setcap cap_sys_rawio=ep ./turbostat # chmod +r /dev/cpu/*/msr turbostat reads hardware counters, but doesn't write them. So it will not interfere with the OS or other programs, including multiple invocations of itself. turbostat may work poorly on Linux-2.6.20 through 2.6.29, as acpi-cpufreq periodically cleared the APERF and MPERF MSRs in those kernels. AVG_MHz = APERF_delta/measurement_interval. This is the actual number of elapsed cycles divided by the entire sample interval -- including idle time. Note that this calculation is resilient to systems lacking a non-stop TSC. TSC_MHz = TSC_delta/measurement_interval. On a system with an invariant TSC, this value will be constant and will closely match the base frequency value shown in the brand string in /proc/cpuinfo. On a system where the TSC stops in idle, TSC_MHz will drop below the processor's base frequency. %Busy = MPERF_delta/TSC_delta Bzy_MHz = TSC_delta/APERF_delta/MPERF_delta/measurement_interval Note that these calculations depend on TSC_delta, so they are not reliable during intervals when TSC_MHz is not running at the base frequency. Turbostat data collection is not atomic. Extremely short measurement intervals (much less than 1 second), or system activity that prevents turbostat from being able to run on all CPUS to quickly collect data, will result in inconsistent results. The APERF, MPERF MSRs are defined to count non-halted cycles. Although it is not guaranteed by the architecture, turbostat assumes that they count at TSC rate, which is true on all processors tested to date.

REFERENCES
"Intel® Turbo Boost Technology in Intel® Core™ Microarchitecture (Nehalem) Based Processors" http://download.intel.com/design/processor/applnots/320354.pdf "Intel® 64 and IA-32 Architectures Software Developer's Manual Volume 3B: System Programming Guide" http://www.intel.com/products/processor/manuals/

FILES
/dev/cpu/*/msr

SEE ALSO
msr(4), vmstat(8)

AUTHOR
Written by Len Brown <len.brown@intel.com>