The clocks should be numbered sequentially as they are represented as
enum values in the clock driver.

Typo introduced by commit 17d4cacc ("clk: exynos5250: register
display block gate clocks to common clock framework")
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>