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Chris Brandt authored
The RZ/A1 is different than the other Renesas SOCs because the MSTP registers are 8-bit instead of 32-bit and if you try writing values as 32-bit nothing happens...meaning this driver never worked for r7s72100. Fixes: b6face40 ("ARM: shmobile: r7s72100: add essential clock nodes to dtsi") Signed-off-by:
Chris Brandt <chris.brandt@renesas.com> Reviewed-by:
Geert Uytterhoeven <geert+renesas@glider.be> Tested-by:
Geert Uytterhoeven <geert+renesas@glider.be> Acked-by:
Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by:
Stephen Boyd <sboyd@codeaurora.org>
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