For the SX4, only one Host DMA (local DIMM) engine is on the hardware,
while there is an ATA engine for each SATA port.  This means that
Host DMA transactions must be queued.  When previously fixing this problem
(the driver had previously assumed an HDMA engine per port), I stored
the HDMA packet queue in a per-port data structure.

This was incorrect:  this patch changes it to correctly use a
per-host data structure, not a per-port structure.