• Magnus Damm's avatar
    irqchip: renesas-intc-irqpin: r8a7779 IRLM setup support · e03f9088
    Magnus Damm authored
    Add r8a7779 specific support for IRLM bit configuration
    in the INTC-IRQPIN driver. Without this code we need
    special workaround code in arch/arm/mach-shmobile.
    
    The IRLM bit for the INTC hardware exists on various
    older SH-based SoCs and is used to select between two
    modes for the external interrupt pins IRQ0 to IRQ3:
    
    IRLM = 0: (default from reset on r8a7779)
    In this mode the pins IRQ0 to IRQ3 are used together
    to give a value between 0 and 15 to the SoC. External
    logic is required for masking. This mode is not
    supported by the INTC-IRQPIN driver.
    
    IRLM = 1: (needs this patch or configuration elsewhere)
    In this mode IRQ0 to IRQ3 operate as 4 individual
    external interrupt pins. In this mode the SMSC ethernet
    chip can be used via IRQ1 on r8a7779 Marzen. This mode
    is the only supported mode by the INTC-IRQPIN driver.
    
    For this patch to work the r8a7779 DTS needs to pass
    the ICR0 register as the last register bank.
    Signed-off-by: default avatarMagnus Damm <damm+renesas@opensource.se>
    Cc: Magnus Damm <magnus.damm@gmail.com>
    Cc: horms@verge.net.au
    Cc: jason@lakedaemon.net
    Link: http://lkml.kernel.org/r/20141203121803.5936.35881.sendpatchset@w520Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
    e03f9088
irq-renesas-intc-irqpin.c 16.3 KB