On the SoCs this driver is intended to support the are three separate
pins to supply the MIPI-CSIS subsystem: 1.1V or 1.2V, 1.8V and power
supply for an internal PLL.
This patch adds support for two separate voltage supplies to cover
properly board configurations where PMIC requires to configure
independently each external supply of the MIPI-CSI device. The 1.8V
and PLL supply are assigned a single "vdd18" regulator supply name
as it seems more reasonable than creating separate regulator supplies
for them.

While at here stop using the 'fixed_phy_vdd' platform_data field.
It has been introduced for boards where the MIPI-CSIS supplies are
not controllable. However it is not needed as those boards can use
the dummy regulator.
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>