Contrary to the UHCI specification document, in real controllers the "HC
Halted" bit in the status register cannot be cleared by writing a 1.  It
will persist for as long as the controller is halted.  Hence the bit needs
to be masked away before checking whether or not the controller initiated
an interrupt.

Without this patch, other devices sharing the same IRQ line might not get
serviced while the host controller is suspended, because the always-on
status bit would cause the UHCI driver to report that it had handled the
interrupt.