• Kevin Cernekee's avatar
    MIPS: Fix machine check exception in kmap_coherent() · 0f334a3e
    Kevin Cernekee authored
    On an SMP system with cache aliases, the following sequence of events may
    happen:
    
    1) copy_user_highpage() runs on CPU0, invoking kmap_coherent() to create a
       temporary mapping in the fixmap region
    2) copy_page() starts on CPU0
    3) CPU1 sends CPU0 an IPI asking CPU0 to run local_r4k_flush_cache_page()
    4) CPU0 takes the interrupt, interrupting copy_page()
    5) local_r4k_flush_cache_page() on CPU0 calls kmap_coherent() again
    6) The second invocation of kmap_coherent() on CPU0 tries to use the
       same fixmap virtual address that was being used by copy_user_highpage()
    7) CPU0 throws a machine check exception for the TLB address conflict
    
    Fixed by creating an extra set of fixmap entries for use in interrupt
    handlers.  This prevents fixmap VA conflicts between copy_user_highpage()
    running in user context, and local_r4k_flush_cache_page() invoked from an
    SMP IPI.
    Signed-off-by: default avatarKevin Cernekee <cernekee@gmail.com>
    Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
    0f334a3e
init.c 12 KB