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Marek Vasut authored
The regmap stride is set to 1 for regmap describing 8bit registers already. However, for 16/32/64bit registers, the stride is 2/4/8 respectively. This is not correct, as the switch protocol supports unaligned register reads and writes and the KSZ87xx even uses such unaligned register accesses to read e.g. MIB counter. This patch fixes MIB counter access on KSZ87xx. Signed-off-by:
Marek Vasut <marex@denx.de> Cc: Andrew Lunn <andrew@lunn.ch> Cc: David S. Miller <davem@davemloft.net> Cc: Florian Fainelli <f.fainelli@gmail.com> Cc: George McCollister <george.mccollister@gmail.com> Cc: Tristram Ha <Tristram.Ha@microchip.com> Cc: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Cc: Woojung Huh <woojung.huh@microchip.com> Fixes: 46558d60 ("net: dsa: microchip: Initial SPI regmap support") Fixes: 255b59ad ("net: dsa: microchip: Factor out regmap config generation into common header") Reviewed-by:
George McCollister <george.mccollister@gmail.com> Tested-by:
George McCollister <george.mccollister@gmail.com> Signed-off-by:
David S. Miller <davem@davemloft.net>
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