• Christopher Covington's avatar
    arm64: Work around Falkor erratum 1009 · d9ff80f8
    Christopher Covington authored
    During a TLB invalidate sequence targeting the inner shareable domain,
    Falkor may prematurely complete the DSB before all loads and stores using
    the old translation are observed. Instruction fetches are not subject to
    the conditions of this erratum. If the original code sequence includes
    multiple TLB invalidate instructions followed by a single DSB, onle one of
    the TLB instructions needs to be repeated to work around this erratum.
    While the erratum only applies to cases in which the TLBI specifies the
    inner-shareable domain (*IS form of TLBI) and the DSB is ISH form or
    stronger (OSH, SYS), this changes applies the workaround overabundantly--
    to local TLBI, DSB NSH sequences as well--for simplicity.
    
    Based on work by Shanker Donthineni <shankerd@codeaurora.org>
    Signed-off-by: default avatarChristopher Covington <cov@codeaurora.org>
    Acked-by: default avatarMark Rutland <mark.rutland@arm.com>
    Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
    d9ff80f8
cpu_errata.c 4.81 KB