This change moves flags and state into the same cacheline.  The reason for
this change is because both are frequently read around the same time and
infrequently written.  By combining them into the same cacheline this
should help to reduce memory utilization.
Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com>
Tested-by: Evan Swanson <evan.swanson@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>