• Santosh Shilimkar's avatar
    ARM: OMAP5: Add basic cpuidle MPU CSWR support · 7abdb0e2
    Santosh Shilimkar authored
    Add OMAP5 CPUIDLE support.
    
    This patch adds MPUSS low power states in cpuidle.
    
            C1 - CPU0 WFI + CPU1 WFI + MPU ON
            C2 - CPU0 RET + CPU1 RET + MPU CSWR
    
    Modified from TI kernel tree commit 605967fd2205 ("ARM: DRA7: PM:
    cpuidle MPU CSWR support") except enable cpuidle for omap5 instead
    of dra7.
    
    According to Nishanth Menon <nm@ti.com>, cpuidle on dra7 is not
    supported properly in the hardware so we don't want to enable it.
    However, for omap5 this adds some nice power savings. Note that
    the TI 3.8 based tree has other cpuidle states that we may be able
    to enable later on.
    
    On omap5-uevm, the power consumption eventually settles down to about
    920mW with ehci-omap and ohci-omap3 unloaded compared to about 1.7W
    without these patches. Note that it seems to take few minutes after
    booting for the idle power to go down to 920mW from 1.3W, no idea so
    far what might be causing that.
    Signed-off-by: default avatarSantosh Shilimkar <santosh.shilimkar@ti.com>
    [ j-keerthy@ti.com rework on 3.14]
    Signed-off-by: default avatarKeerthy <j-keerthy@ti.com>
    [nm@ti.com: updates based on profiling]
    [tony@atomide.com: dropped CPUIDLE_FLAG_TIME_VALID no longer used,
    changed for omap5 only as requested by Nishanth, updated comments]
    Signed-off-by: default avatarNishanth Menon <nm@ti.com>
    Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
    7abdb0e2
cpuidle44xx.c 7.77 KB