drm/i915: Update cached cdclk state from broxton_init_cdclk()

Let's make sure our cached cdclk state is accurate right after
broxton_init_cdclk() whether or not we end up changing the cdclk
frequency.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1463172100-24715-18-git-send-email-ville.syrjala@linux.intel.comReviewed-by: Imre Deak <imre.deak@intel.com>

drivers/gpu/drm/i915/intel_display.c

@@ -5428,13 +5428,10 @@ bool broxton_cdclk_verify_state(struct drm_i915_private *dev_priv)
 
 void broxton_init_cdclk(struct drm_i915_private *dev_priv)
 {
-	/* check if cd clock is enabled */
-	if (broxton_cdclk_is_enabled(dev_priv)) {
-		DRM_DEBUG_KMS("CDCLK already enabled, won't reprogram it\n");
-		return;
-	}
+	intel_update_cdclk(dev_priv->dev);
 
-	DRM_DEBUG_KMS("CDCLK not enabled, enabling it\n");
+	if (dev_priv->cdclk_pll.vco != 0)
+		return;
 
 	/*
 	 * FIXME: