Commit 12dc4fe3 authored by Mitch Williams's avatar Mitch Williams Committed by Jeff Kirsher

i40e: make a define from a large constant

Make a define used in the header file by both VF and PF drivers.

Change-Id: Ie9e35adcc021cd6a8f7513934984eb4ed55774f5
Signed-off-by: default avatarMitch Williams <mitch.a.williams@intel.com>
Signed-off-by: default avatarJesse Brandeburg <jesse.brandeburg@intel.com>
Tested-by: default avatarKavindya Deegala <kavindya.s.deegala@intel.com>
Signed-off-by: default avatarJeff Kirsher <jeffrey.t.kirsher@intel.com>
parent 499ec80f
...@@ -5703,25 +5703,6 @@ static int i40e_setup_misc_vector(struct i40e_pf *pf) ...@@ -5703,25 +5703,6 @@ static int i40e_setup_misc_vector(struct i40e_pf *pf)
**/ **/
static int i40e_config_rss(struct i40e_pf *pf) static int i40e_config_rss(struct i40e_pf *pf)
{ {
const u64 default_hena =
((u64)1 << I40E_FILTER_PCTYPE_NONF_UNICAST_IPV4_UDP) |
((u64)1 << I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV4_UDP) |
((u64)1 << I40E_FILTER_PCTYPE_NONF_IPV4_UDP) |
((u64)1 << I40E_FILTER_PCTYPE_NONF_IPV4_SCTP) |
((u64)1 << I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN) |
((u64)1 << I40E_FILTER_PCTYPE_NONF_IPV4_TCP) |
((u64)1 << I40E_FILTER_PCTYPE_NONF_IPV4_OTHER) |
((u64)1 << I40E_FILTER_PCTYPE_FRAG_IPV4) |
((u64)1 << I40E_FILTER_PCTYPE_NONF_UNICAST_IPV6_UDP) |
((u64)1 << I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV6_UDP) |
((u64)1 << I40E_FILTER_PCTYPE_NONF_IPV6_UDP) |
((u64)1 << I40E_FILTER_PCTYPE_NONF_IPV6_TCP_SYN) |
((u64)1 << I40E_FILTER_PCTYPE_NONF_IPV6_TCP) |
((u64)1 << I40E_FILTER_PCTYPE_NONF_IPV6_SCTP) |
((u64)1 << I40E_FILTER_PCTYPE_NONF_IPV6_OTHER) |
((u64)1 << I40E_FILTER_PCTYPE_FRAG_IPV6) |
((u64)1 << I40E_FILTER_PCTYPE_L2_PAYLOAD);
/* Set of random keys generated using kernel random number generator */ /* Set of random keys generated using kernel random number generator */
static const u32 seed[I40E_PFQF_HKEY_MAX_INDEX + 1] = {0x41b01687, static const u32 seed[I40E_PFQF_HKEY_MAX_INDEX + 1] = {0x41b01687,
0x183cfd8c, 0xce880440, 0x580cbc3c, 0x35897377, 0x183cfd8c, 0xce880440, 0x580cbc3c, 0x35897377,
...@@ -5739,7 +5720,7 @@ static int i40e_config_rss(struct i40e_pf *pf) ...@@ -5739,7 +5720,7 @@ static int i40e_config_rss(struct i40e_pf *pf)
/* By default we enable TCP/UDP with IPv4/IPv6 ptypes */ /* By default we enable TCP/UDP with IPv4/IPv6 ptypes */
hena = (u64)rd32(hw, I40E_PFQF_HENA(0)) | hena = (u64)rd32(hw, I40E_PFQF_HENA(0)) |
((u64)rd32(hw, I40E_PFQF_HENA(1)) << 32); ((u64)rd32(hw, I40E_PFQF_HENA(1)) << 32);
hena |= default_hena; hena |= I40E_DEFAULT_RSS_HENA;
wr32(hw, I40E_PFQF_HENA(0), (u32)hena); wr32(hw, I40E_PFQF_HENA(0), (u32)hena);
wr32(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32)); wr32(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32));
......
...@@ -66,6 +66,26 @@ enum i40e_dyn_idx_t { ...@@ -66,6 +66,26 @@ enum i40e_dyn_idx_t {
#define I40E_TX_ITR I40E_IDX_ITR1 #define I40E_TX_ITR I40E_IDX_ITR1
#define I40E_PE_ITR I40E_IDX_ITR2 #define I40E_PE_ITR I40E_IDX_ITR2
/* Supported RSS offloads */
#define I40E_DEFAULT_RSS_HENA ( \
((u64)1 << I40E_FILTER_PCTYPE_NONF_UNICAST_IPV4_UDP) | \
((u64)1 << I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV4_UDP) | \
((u64)1 << I40E_FILTER_PCTYPE_NONF_IPV4_UDP) | \
((u64)1 << I40E_FILTER_PCTYPE_NONF_IPV4_SCTP) | \
((u64)1 << I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN) | \
((u64)1 << I40E_FILTER_PCTYPE_NONF_IPV4_TCP) | \
((u64)1 << I40E_FILTER_PCTYPE_NONF_IPV4_OTHER) | \
((u64)1 << I40E_FILTER_PCTYPE_FRAG_IPV4) | \
((u64)1 << I40E_FILTER_PCTYPE_NONF_UNICAST_IPV6_UDP) | \
((u64)1 << I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV6_UDP) | \
((u64)1 << I40E_FILTER_PCTYPE_NONF_IPV6_UDP) | \
((u64)1 << I40E_FILTER_PCTYPE_NONF_IPV6_TCP_SYN) | \
((u64)1 << I40E_FILTER_PCTYPE_NONF_IPV6_TCP) | \
((u64)1 << I40E_FILTER_PCTYPE_NONF_IPV6_SCTP) | \
((u64)1 << I40E_FILTER_PCTYPE_NONF_IPV6_OTHER) | \
((u64)1 << I40E_FILTER_PCTYPE_FRAG_IPV6) | \
((u64)1 << I40E_FILTER_PCTYPE_L2_PAYLOAD))
/* Supported Rx Buffer Sizes */ /* Supported Rx Buffer Sizes */
#define I40E_RXBUFFER_512 512 /* Used for packet split */ #define I40E_RXBUFFER_512 512 /* Used for packet split */
#define I40E_RXBUFFER_2048 2048 #define I40E_RXBUFFER_2048 2048
......
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