Commit 222fc0c8 authored by James Morse's avatar James Morse Committed by Catalin Marinas

arm64: compat: Workaround Neoverse-N1 #1542419 for compat user-space

Compat user-space is unable to perform ICIMVAU instructions from
user-space. Instead it uses a compat-syscall. Add the workaround for
Neoverse-N1 #1542419 to this code path.
Signed-off-by: default avatarJames Morse <james.morse@arm.com>
Signed-off-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
parent ee9d90be
...@@ -8,6 +8,7 @@ ...@@ -8,6 +8,7 @@
*/ */
#include <linux/compat.h> #include <linux/compat.h>
#include <linux/cpufeature.h>
#include <linux/personality.h> #include <linux/personality.h>
#include <linux/sched.h> #include <linux/sched.h>
#include <linux/sched/signal.h> #include <linux/sched/signal.h>
...@@ -17,6 +18,7 @@ ...@@ -17,6 +18,7 @@
#include <asm/cacheflush.h> #include <asm/cacheflush.h>
#include <asm/system_misc.h> #include <asm/system_misc.h>
#include <asm/tlbflush.h>
#include <asm/unistd.h> #include <asm/unistd.h>
static long static long
...@@ -30,6 +32,15 @@ __do_compat_cache_op(unsigned long start, unsigned long end) ...@@ -30,6 +32,15 @@ __do_compat_cache_op(unsigned long start, unsigned long end)
if (fatal_signal_pending(current)) if (fatal_signal_pending(current))
return 0; return 0;
if (cpus_have_const_cap(ARM64_WORKAROUND_1542419)) {
/*
* The workaround requires an inner-shareable tlbi.
* We pick the reserved-ASID to minimise the impact.
*/
__tlbi(aside1is, 0);
dsb(ish);
}
ret = __flush_cache_user_range(start, start + chunk); ret = __flush_cache_user_range(start, start + chunk);
if (ret) if (ret)
return ret; return ret;
......
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