Commit 259039fa authored by David S. Miller's avatar David S. Miller

Merge branch 'stmmac-fixes'

Ong Boon Leong says:

====================
net: stmmac: general fixes for Ethernet functionality

1/5: It ensures that the previous value of GMAC_VLAN_TAG register is
     read first before for updating the register.

2/5: Similar to 2/6 patch but it is a fix for XGMAC_VLAN_TAG register
     as requested by Jose Abreu.

3/5: It ensures the GMAC IP v4.xx and above behaves correctly to:-
       ip link set <devname> multicast off|on

4/5: Added similar IFF_MULTICAST flag for xgmac2, similar to 4/6.

5/5: It ensures PCI platform data is using plat->phy_interface.

Changes from v4:-
   patch 1/6 - this patch is dropped now and will take the input on
               handling return value from netif_set_real_num_rx|
               tx_queues() in future patch series.

v3:-
   patch 1/6 - add rtnl_lock() and rtnl_unlock() for stmmac_hw_setup()
               called inside stmmac_resume()
   patch 3/6 - Added new patch to fix XGMAC_VLAN_TAG register writting

v2:-
   patch 1/5 - added control for rtnl_lock() & rtnl_unlock() to ensure
               they are used forstmmac_resume()
   patch 4/5 - added IFF_MULTICAST flag check for xgmac to ensure
               multicast works correctly.

v1:-
 - Drop v1 patches (1/7, 3/7 & 4/7) that are not valid.
====================
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents 184367dc 909c1dde
...@@ -420,7 +420,7 @@ static void dwmac4_set_filter(struct mac_device_info *hw, ...@@ -420,7 +420,7 @@ static void dwmac4_set_filter(struct mac_device_info *hw,
value |= GMAC_PACKET_FILTER_PM; value |= GMAC_PACKET_FILTER_PM;
/* Set all the bits of the HASH tab */ /* Set all the bits of the HASH tab */
memset(mc_filter, 0xff, sizeof(mc_filter)); memset(mc_filter, 0xff, sizeof(mc_filter));
} else if (!netdev_mc_empty(dev)) { } else if (!netdev_mc_empty(dev) && (dev->flags & IFF_MULTICAST)) {
struct netdev_hw_addr *ha; struct netdev_hw_addr *ha;
/* Hash filter for multicast */ /* Hash filter for multicast */
...@@ -736,11 +736,14 @@ static void dwmac4_update_vlan_hash(struct mac_device_info *hw, u32 hash, ...@@ -736,11 +736,14 @@ static void dwmac4_update_vlan_hash(struct mac_device_info *hw, u32 hash,
__le16 perfect_match, bool is_double) __le16 perfect_match, bool is_double)
{ {
void __iomem *ioaddr = hw->pcsr; void __iomem *ioaddr = hw->pcsr;
u32 value;
writel(hash, ioaddr + GMAC_VLAN_HASH_TABLE); writel(hash, ioaddr + GMAC_VLAN_HASH_TABLE);
value = readl(ioaddr + GMAC_VLAN_TAG);
if (hash) { if (hash) {
u32 value = GMAC_VLAN_VTHM | GMAC_VLAN_ETV; value |= GMAC_VLAN_VTHM | GMAC_VLAN_ETV;
if (is_double) { if (is_double) {
value |= GMAC_VLAN_EDVLP; value |= GMAC_VLAN_EDVLP;
value |= GMAC_VLAN_ESVL; value |= GMAC_VLAN_ESVL;
...@@ -759,8 +762,6 @@ static void dwmac4_update_vlan_hash(struct mac_device_info *hw, u32 hash, ...@@ -759,8 +762,6 @@ static void dwmac4_update_vlan_hash(struct mac_device_info *hw, u32 hash,
writel(value | perfect_match, ioaddr + GMAC_VLAN_TAG); writel(value | perfect_match, ioaddr + GMAC_VLAN_TAG);
} else { } else {
u32 value = readl(ioaddr + GMAC_VLAN_TAG);
value &= ~(GMAC_VLAN_VTHM | GMAC_VLAN_ETV); value &= ~(GMAC_VLAN_VTHM | GMAC_VLAN_ETV);
value &= ~(GMAC_VLAN_EDVLP | GMAC_VLAN_ESVL); value &= ~(GMAC_VLAN_EDVLP | GMAC_VLAN_ESVL);
value &= ~GMAC_VLAN_DOVLTC; value &= ~GMAC_VLAN_DOVLTC;
......
...@@ -458,7 +458,7 @@ static void dwxgmac2_set_filter(struct mac_device_info *hw, ...@@ -458,7 +458,7 @@ static void dwxgmac2_set_filter(struct mac_device_info *hw,
for (i = 0; i < XGMAC_MAX_HASH_TABLE; i++) for (i = 0; i < XGMAC_MAX_HASH_TABLE; i++)
writel(~0x0, ioaddr + XGMAC_HASH_TABLE(i)); writel(~0x0, ioaddr + XGMAC_HASH_TABLE(i));
} else if (!netdev_mc_empty(dev)) { } else if (!netdev_mc_empty(dev) && (dev->flags & IFF_MULTICAST)) {
struct netdev_hw_addr *ha; struct netdev_hw_addr *ha;
value |= XGMAC_FILTER_HMC; value |= XGMAC_FILTER_HMC;
...@@ -569,7 +569,9 @@ static void dwxgmac2_update_vlan_hash(struct mac_device_info *hw, u32 hash, ...@@ -569,7 +569,9 @@ static void dwxgmac2_update_vlan_hash(struct mac_device_info *hw, u32 hash,
writel(value, ioaddr + XGMAC_PACKET_FILTER); writel(value, ioaddr + XGMAC_PACKET_FILTER);
value = XGMAC_VLAN_VTHM | XGMAC_VLAN_ETV; value = readl(ioaddr + XGMAC_VLAN_TAG);
value |= XGMAC_VLAN_VTHM | XGMAC_VLAN_ETV;
if (is_double) { if (is_double) {
value |= XGMAC_VLAN_EDVLP; value |= XGMAC_VLAN_EDVLP;
value |= XGMAC_VLAN_ESVL; value |= XGMAC_VLAN_ESVL;
...@@ -584,7 +586,9 @@ static void dwxgmac2_update_vlan_hash(struct mac_device_info *hw, u32 hash, ...@@ -584,7 +586,9 @@ static void dwxgmac2_update_vlan_hash(struct mac_device_info *hw, u32 hash,
writel(value, ioaddr + XGMAC_PACKET_FILTER); writel(value, ioaddr + XGMAC_PACKET_FILTER);
value = XGMAC_VLAN_ETV; value = readl(ioaddr + XGMAC_VLAN_TAG);
value |= XGMAC_VLAN_ETV;
if (is_double) { if (is_double) {
value |= XGMAC_VLAN_EDVLP; value |= XGMAC_VLAN_EDVLP;
value |= XGMAC_VLAN_ESVL; value |= XGMAC_VLAN_ESVL;
......
...@@ -95,7 +95,7 @@ static int stmmac_default_data(struct pci_dev *pdev, ...@@ -95,7 +95,7 @@ static int stmmac_default_data(struct pci_dev *pdev,
plat->bus_id = 1; plat->bus_id = 1;
plat->phy_addr = 0; plat->phy_addr = 0;
plat->interface = PHY_INTERFACE_MODE_GMII; plat->phy_interface = PHY_INTERFACE_MODE_GMII;
plat->dma_cfg->pbl = 32; plat->dma_cfg->pbl = 32;
plat->dma_cfg->pblx8 = true; plat->dma_cfg->pblx8 = true;
...@@ -217,7 +217,8 @@ static int ehl_sgmii_data(struct pci_dev *pdev, ...@@ -217,7 +217,8 @@ static int ehl_sgmii_data(struct pci_dev *pdev,
{ {
plat->bus_id = 1; plat->bus_id = 1;
plat->phy_addr = 0; plat->phy_addr = 0;
plat->interface = PHY_INTERFACE_MODE_SGMII; plat->phy_interface = PHY_INTERFACE_MODE_SGMII;
return ehl_common_data(pdev, plat); return ehl_common_data(pdev, plat);
} }
...@@ -230,7 +231,8 @@ static int ehl_rgmii_data(struct pci_dev *pdev, ...@@ -230,7 +231,8 @@ static int ehl_rgmii_data(struct pci_dev *pdev,
{ {
plat->bus_id = 1; plat->bus_id = 1;
plat->phy_addr = 0; plat->phy_addr = 0;
plat->interface = PHY_INTERFACE_MODE_RGMII; plat->phy_interface = PHY_INTERFACE_MODE_RGMII;
return ehl_common_data(pdev, plat); return ehl_common_data(pdev, plat);
} }
...@@ -258,7 +260,7 @@ static int tgl_sgmii_data(struct pci_dev *pdev, ...@@ -258,7 +260,7 @@ static int tgl_sgmii_data(struct pci_dev *pdev,
{ {
plat->bus_id = 1; plat->bus_id = 1;
plat->phy_addr = 0; plat->phy_addr = 0;
plat->interface = PHY_INTERFACE_MODE_SGMII; plat->phy_interface = PHY_INTERFACE_MODE_SGMII;
return tgl_common_data(pdev, plat); return tgl_common_data(pdev, plat);
} }
...@@ -358,7 +360,7 @@ static int quark_default_data(struct pci_dev *pdev, ...@@ -358,7 +360,7 @@ static int quark_default_data(struct pci_dev *pdev,
plat->bus_id = pci_dev_id(pdev); plat->bus_id = pci_dev_id(pdev);
plat->phy_addr = ret; plat->phy_addr = ret;
plat->interface = PHY_INTERFACE_MODE_RMII; plat->phy_interface = PHY_INTERFACE_MODE_RMII;
plat->dma_cfg->pbl = 16; plat->dma_cfg->pbl = 16;
plat->dma_cfg->pblx8 = true; plat->dma_cfg->pblx8 = true;
...@@ -415,7 +417,7 @@ static int snps_gmac5_default_data(struct pci_dev *pdev, ...@@ -415,7 +417,7 @@ static int snps_gmac5_default_data(struct pci_dev *pdev,
plat->bus_id = 1; plat->bus_id = 1;
plat->phy_addr = -1; plat->phy_addr = -1;
plat->interface = PHY_INTERFACE_MODE_GMII; plat->phy_interface = PHY_INTERFACE_MODE_GMII;
plat->dma_cfg->pbl = 32; plat->dma_cfg->pbl = 32;
plat->dma_cfg->pblx8 = true; plat->dma_cfg->pblx8 = true;
......
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