Commit 2e6c91e3 authored by Gabor Juhos's avatar Gabor Juhos Committed by John Crispin

MIPS: ath79: add SoC detection code for the QCA955X SoCs

Also add 'soc_is_qca955[68x]' helper functions
and a Kconfig symbol for the SoC family.

Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com>
Cc: Giori, Kathy <kgiori@qca.qualcomm.com>
Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com>
Signed-off-by: default avatarGabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4943/Signed-off-by: default avatarJohn Crispin <blogic@openwrt.org>
parent 90898779
...@@ -88,6 +88,10 @@ config SOC_AR934X ...@@ -88,6 +88,10 @@ config SOC_AR934X
select PCI_AR724X if PCI select PCI_AR724X if PCI
def_bool n def_bool n
config SOC_QCA955X
select USB_ARCH_HAS_EHCI
def_bool n
config PCI_AR724X config PCI_AR724X
def_bool n def_bool n
......
...@@ -164,13 +164,29 @@ static void __init ath79_detect_sys_type(void) ...@@ -164,13 +164,29 @@ static void __init ath79_detect_sys_type(void)
rev = id & AR934X_REV_ID_REVISION_MASK; rev = id & AR934X_REV_ID_REVISION_MASK;
break; break;
case REV_ID_MAJOR_QCA9556:
ath79_soc = ATH79_SOC_QCA9556;
chip = "9556";
rev = id & QCA955X_REV_ID_REVISION_MASK;
break;
case REV_ID_MAJOR_QCA9558:
ath79_soc = ATH79_SOC_QCA9558;
chip = "9558";
rev = id & QCA955X_REV_ID_REVISION_MASK;
break;
default: default:
panic("ath79: unknown SoC, id:0x%08x", id); panic("ath79: unknown SoC, id:0x%08x", id);
} }
ath79_soc_rev = rev; ath79_soc_rev = rev;
sprintf(ath79_sys_type, "Atheros AR%s rev %u", chip, rev); if (soc_is_qca955x())
sprintf(ath79_sys_type, "Qualcomm Atheros QCA%s rev %u",
chip, rev);
else
sprintf(ath79_sys_type, "Atheros AR%s rev %u", chip, rev);
pr_info("SoC: %s\n", ath79_sys_type); pr_info("SoC: %s\n", ath79_sys_type);
} }
......
...@@ -392,6 +392,8 @@ ...@@ -392,6 +392,8 @@
#define AR934X_REV_ID_REVISION_MASK 0xf #define AR934X_REV_ID_REVISION_MASK 0xf
#define QCA955X_REV_ID_REVISION_MASK 0xf
/* /*
* SPI block * SPI block
*/ */
......
...@@ -32,6 +32,8 @@ enum ath79_soc_type { ...@@ -32,6 +32,8 @@ enum ath79_soc_type {
ATH79_SOC_AR9341, ATH79_SOC_AR9341,
ATH79_SOC_AR9342, ATH79_SOC_AR9342,
ATH79_SOC_AR9344, ATH79_SOC_AR9344,
ATH79_SOC_QCA9556,
ATH79_SOC_QCA9558,
}; };
extern enum ath79_soc_type ath79_soc; extern enum ath79_soc_type ath79_soc;
...@@ -98,6 +100,21 @@ static inline int soc_is_ar934x(void) ...@@ -98,6 +100,21 @@ static inline int soc_is_ar934x(void)
return soc_is_ar9341() || soc_is_ar9342() || soc_is_ar9344(); return soc_is_ar9341() || soc_is_ar9342() || soc_is_ar9344();
} }
static inline int soc_is_qca9556(void)
{
return ath79_soc == ATH79_SOC_QCA9556;
}
static inline int soc_is_qca9558(void)
{
return ath79_soc == ATH79_SOC_QCA9558;
}
static inline int soc_is_qca955x(void)
{
return soc_is_qca9556() || soc_is_qca9558();
}
extern void __iomem *ath79_ddr_base; extern void __iomem *ath79_ddr_base;
extern void __iomem *ath79_pll_base; extern void __iomem *ath79_pll_base;
extern void __iomem *ath79_reset_base; extern void __iomem *ath79_reset_base;
......
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