Commit 4e334660 authored by Lee Jones's avatar Lee Jones Committed by Linus Walleij

clk: ux500: Add Device Tree support for the TWD clock

This patch enables the TWD fixed factor clock to be specified from
Device Tree via phandles to the "smp-twd-clock" node.
Acked-by: default avatarMike Turquette <mturquette@linaro.org>
Signed-off-by: default avatarLee Jones <lee.jones@linaro.org>
Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parent d625a730
...@@ -60,7 +60,7 @@ void u8500_of_clk_init(u32 clkrst1_base, u32 clkrst2_base, u32 clkrst3_base, ...@@ -60,7 +60,7 @@ void u8500_of_clk_init(u32 clkrst1_base, u32 clkrst2_base, u32 clkrst3_base,
struct device_node *np = NULL; struct device_node *np = NULL;
struct device_node *child = NULL; struct device_node *child = NULL;
const char *sgaclk_parent = NULL; const char *sgaclk_parent = NULL;
struct clk *clk, *rtc_clk; struct clk *clk, *rtc_clk, *twd_clk;
if (of_have_populated_dt()) if (of_have_populated_dt())
np = of_find_matching_node(NULL, u8500_clk_of_match); np = of_find_matching_node(NULL, u8500_clk_of_match);
...@@ -234,7 +234,7 @@ void u8500_of_clk_init(u32 clkrst1_base, u32 clkrst2_base, u32 clkrst3_base, ...@@ -234,7 +234,7 @@ void u8500_of_clk_init(u32 clkrst1_base, u32 clkrst2_base, u32 clkrst3_base,
clk = clk_reg_prcmu_scalable_rate("armss", NULL, clk = clk_reg_prcmu_scalable_rate("armss", NULL,
PRCMU_ARMSS, 0, CLK_IS_ROOT|CLK_IGNORE_UNUSED); PRCMU_ARMSS, 0, CLK_IS_ROOT|CLK_IGNORE_UNUSED);
clk = clk_register_fixed_factor(NULL, "smp_twd", "armss", twd_clk = clk_register_fixed_factor(NULL, "smp_twd", "armss",
CLK_IGNORE_UNUSED, 1, 2); CLK_IGNORE_UNUSED, 1, 2);
/* /*
...@@ -551,5 +551,8 @@ void u8500_of_clk_init(u32 clkrst1_base, u32 clkrst2_base, u32 clkrst3_base, ...@@ -551,5 +551,8 @@ void u8500_of_clk_init(u32 clkrst1_base, u32 clkrst2_base, u32 clkrst3_base,
if (!of_node_cmp(child->name, "rtc32k-clock")) if (!of_node_cmp(child->name, "rtc32k-clock"))
of_clk_add_provider(child, of_clk_src_simple_get, rtc_clk); of_clk_add_provider(child, of_clk_src_simple_get, rtc_clk);
if (!of_node_cmp(child->name, "smp-twd-clock"))
of_clk_add_provider(child, of_clk_src_simple_get, twd_clk);
} }
} }
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