From 5879600a70d07d643f1b858f3f94675a9e93ba29 Mon Sep 17 00:00:00 2001
From: Aapo Vienamo <avienamo@nvidia.com>
Date: Fri, 10 Aug 2018 21:14:03 +0300
Subject: [PATCH] arm64: dts: tegra210: Add SDMMC4 DQS trim value
Add the HS400 DQS trim value for Tegra210 SDMMC4.
Signed-off-by: Aapo Vienamo <avienamo@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
---
arch/arm64/boot/dts/nvidia/tegra210.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi b/arch/arm64/boot/dts/nvidia/tegra210.dtsi
index 14da98ac65e8..f8e5f0908ade 100644
--- a/arch/arm64/boot/dts/nvidia/tegra210.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra210.dtsi
@@ -1115,6 +1115,7 @@ sdhci@700b0600 {
assigned-clocks = <&tegra_car TEGRA210_CLK_SDMMC4>,
<&tegra_car TEGRA210_CLK_PLL_C4_OUT0>;
assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_C4_OUT0>;
+ nvidia,dqs-trim = <40>;
status = "disabled";
};
--
2.30.9