Commit 5eca7453 authored by Wang Nan's avatar Wang Nan Committed by Ingo Molnar

x86/traps: Separate set_intr_gate() and clean up early_trap_init()

As early_trap_init() doesn't use IST, replace
set_intr_gate_ist() and set_system_intr_gate_ist() with their
standard counterparts.

set_intr_gate() requires a trace_debug symbol which we don't
have and won't use. This patch separates set_intr_gate() into two
parts, and uses base version in early_trap_init().
Reported-by: default avatarAndy Lutomirski <luto@amacapital.net>
Signed-off-by: default avatarWang Nan <wangnan0@huawei.com>
Acked-by: default avatarAndy Lutomirski <luto@amacapital.net>
Cc: <dave.hansen@linux.intel.com>
Cc: <lizefan@huawei.com>
Cc: <masami.hiramatsu.pt@hitachi.com>
Cc: <oleg@redhat.com>
Cc: <rostedt@goodmis.org>
Cc: Borislav Petkov <bp@alien8.de>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Link: http://lkml.kernel.org/r/1425010789-13714-1-git-send-email-wangnan0@huawei.comSigned-off-by: default avatarIngo Molnar <mingo@kernel.org>
parent 1e3fbb8a
...@@ -376,11 +376,16 @@ static inline void _set_gate(int gate, unsigned type, void *addr, ...@@ -376,11 +376,16 @@ static inline void _set_gate(int gate, unsigned type, void *addr,
* Pentium F0 0F bugfix can have resulted in the mapped * Pentium F0 0F bugfix can have resulted in the mapped
* IDT being write-protected. * IDT being write-protected.
*/ */
#define set_intr_gate(n, addr) \ #define set_intr_gate_notrace(n, addr) \
do { \ do { \
BUG_ON((unsigned)n > 0xFF); \ BUG_ON((unsigned)n > 0xFF); \
_set_gate(n, GATE_INTERRUPT, (void *)addr, 0, 0, \ _set_gate(n, GATE_INTERRUPT, (void *)addr, 0, 0, \
__KERNEL_CS); \ __KERNEL_CS); \
} while (0)
#define set_intr_gate(n, addr) \
do { \
set_intr_gate_notrace(n, addr); \
_trace_set_gate(n, GATE_INTERRUPT, (void *)trace_##addr,\ _trace_set_gate(n, GATE_INTERRUPT, (void *)trace_##addr,\
0, 0, __KERNEL_CS); \ 0, 0, __KERNEL_CS); \
} while (0) } while (0)
......
...@@ -926,16 +926,20 @@ dotraplinkage void do_iret_error(struct pt_regs *regs, long error_code) ...@@ -926,16 +926,20 @@ dotraplinkage void do_iret_error(struct pt_regs *regs, long error_code)
void __init early_trap_init(void) void __init early_trap_init(void)
{ {
/* /*
* Don't set ist to DEBUG_STACK as it doesn't work until TSS is * Don't use IST to set DEBUG_STACK as it doesn't work until TSS
* ready in cpu_init() <-- trap_init(). Before trap_init(), CPU * is ready in cpu_init() <-- trap_init(). Before trap_init(),
* runs at ring 0 so it is impossible to hit an invalid stack. * CPU runs at ring 0 so it is impossible to hit an invalid
* Using the original stack works well enough at this early * stack. Using the original stack works well enough at this
* stage. DEBUG_STACK will be equipped after cpu_init() in * early stage. DEBUG_STACK will be equipped after cpu_init() in
* trap_init(). * trap_init().
*
* We don't need to set trace_idt_table like set_intr_gate(),
* since we don't have trace_debug and it will be reset to
* 'debug' in trap_init() by set_intr_gate_ist().
*/ */
set_intr_gate_ist(X86_TRAP_DB, &debug, 0); set_intr_gate_notrace(X86_TRAP_DB, debug);
/* int3 can be called from all */ /* int3 can be called from all */
set_system_intr_gate_ist(X86_TRAP_BP, &int3, 0); set_system_intr_gate(X86_TRAP_BP, &int3);
#ifdef CONFIG_X86_32 #ifdef CONFIG_X86_32
set_intr_gate(X86_TRAP_PF, page_fault); set_intr_gate(X86_TRAP_PF, page_fault);
#endif #endif
...@@ -1015,7 +1019,7 @@ void __init trap_init(void) ...@@ -1015,7 +1019,7 @@ void __init trap_init(void)
/* /*
* X86_TRAP_DB and X86_TRAP_BP have been set * X86_TRAP_DB and X86_TRAP_BP have been set
* in early_trap_init(). However, DEBUG_STACK works only after * in early_trap_init(). However, ITS works only after
* cpu_init() loads TSS. See comments in early_trap_init(). * cpu_init() loads TSS. See comments in early_trap_init().
*/ */
set_intr_gate_ist(X86_TRAP_DB, &debug, DEBUG_STACK); set_intr_gate_ist(X86_TRAP_DB, &debug, DEBUG_STACK);
......
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