Commit 64e94192 authored by Bartlomiej Zolnierkiewicz's avatar Bartlomiej Zolnierkiewicz Committed by Eduardo Valentin

thermal: exynos: cleanup code for enabling threshold interrupts

Cleanup code for enabling threshold interrupts in ->tmu_control
method implementations.

There should be no functional changes caused by this patch.
Signed-off-by: default avatarBartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Signed-off-by: default avatarEduardo Valentin <edubezval@gmail.com>
parent 89335c20
...@@ -76,9 +76,6 @@ ...@@ -76,9 +76,6 @@
#define EXYNOS_TMU_THERM_TRIP_EN_SHIFT 12 #define EXYNOS_TMU_THERM_TRIP_EN_SHIFT 12
#define EXYNOS_TMU_INTEN_RISE0_SHIFT 0 #define EXYNOS_TMU_INTEN_RISE0_SHIFT 0
#define EXYNOS_TMU_INTEN_RISE1_SHIFT 4
#define EXYNOS_TMU_INTEN_RISE2_SHIFT 8
#define EXYNOS_TMU_INTEN_RISE3_SHIFT 12
#define EXYNOS_TMU_INTEN_FALL0_SHIFT 16 #define EXYNOS_TMU_INTEN_FALL0_SHIFT 16
#define EXYNOS_EMUL_TIME 0x57F0 #define EXYNOS_EMUL_TIME 0x57F0
...@@ -136,13 +133,6 @@ ...@@ -136,13 +133,6 @@
#define EXYNOS7_TMU_TEMP_MASK 0x1ff #define EXYNOS7_TMU_TEMP_MASK 0x1ff
#define EXYNOS7_PD_DET_EN_SHIFT 23 #define EXYNOS7_PD_DET_EN_SHIFT 23
#define EXYNOS7_TMU_INTEN_RISE0_SHIFT 0 #define EXYNOS7_TMU_INTEN_RISE0_SHIFT 0
#define EXYNOS7_TMU_INTEN_RISE1_SHIFT 1
#define EXYNOS7_TMU_INTEN_RISE2_SHIFT 2
#define EXYNOS7_TMU_INTEN_RISE3_SHIFT 3
#define EXYNOS7_TMU_INTEN_RISE4_SHIFT 4
#define EXYNOS7_TMU_INTEN_RISE5_SHIFT 5
#define EXYNOS7_TMU_INTEN_RISE6_SHIFT 6
#define EXYNOS7_TMU_INTEN_RISE7_SHIFT 7
#define EXYNOS7_EMUL_DATA_SHIFT 7 #define EXYNOS7_EMUL_DATA_SHIFT 7
#define EXYNOS7_EMUL_DATA_MASK 0x1ff #define EXYNOS7_EMUL_DATA_MASK 0x1ff
...@@ -615,29 +605,28 @@ static void exynos4210_tmu_control(struct platform_device *pdev, bool on) ...@@ -615,29 +605,28 @@ static void exynos4210_tmu_control(struct platform_device *pdev, bool on)
{ {
struct exynos_tmu_data *data = platform_get_drvdata(pdev); struct exynos_tmu_data *data = platform_get_drvdata(pdev);
struct thermal_zone_device *tz = data->tzd; struct thermal_zone_device *tz = data->tzd;
unsigned int con, interrupt_en; unsigned int con, interrupt_en = 0, i;
con = get_con_reg(data, readl(data->base + EXYNOS_TMU_REG_CONTROL)); con = get_con_reg(data, readl(data->base + EXYNOS_TMU_REG_CONTROL));
if (on) { if (on) {
con |= (1 << EXYNOS_TMU_CORE_EN_SHIFT); for (i = 0; i < data->ntrip; i++) {
interrupt_en = if (!of_thermal_is_trip_valid(tz, i))
(of_thermal_is_trip_valid(tz, 3) continue;
<< EXYNOS_TMU_INTEN_RISE3_SHIFT) |
(of_thermal_is_trip_valid(tz, 2) interrupt_en |=
<< EXYNOS_TMU_INTEN_RISE2_SHIFT) | (1 << (EXYNOS_TMU_INTEN_RISE0_SHIFT + i * 4));
(of_thermal_is_trip_valid(tz, 1) }
<< EXYNOS_TMU_INTEN_RISE1_SHIFT) |
(of_thermal_is_trip_valid(tz, 0)
<< EXYNOS_TMU_INTEN_RISE0_SHIFT);
if (data->soc != SOC_ARCH_EXYNOS4210) if (data->soc != SOC_ARCH_EXYNOS4210)
interrupt_en |= interrupt_en |=
interrupt_en << EXYNOS_TMU_INTEN_FALL0_SHIFT; interrupt_en << EXYNOS_TMU_INTEN_FALL0_SHIFT;
con |= (1 << EXYNOS_TMU_CORE_EN_SHIFT);
} else { } else {
con &= ~(1 << EXYNOS_TMU_CORE_EN_SHIFT); con &= ~(1 << EXYNOS_TMU_CORE_EN_SHIFT);
interrupt_en = 0; /* Disable all interrupts */
} }
writel(interrupt_en, data->base + EXYNOS_TMU_REG_INTEN); writel(interrupt_en, data->base + EXYNOS_TMU_REG_INTEN);
writel(con, data->base + EXYNOS_TMU_REG_CONTROL); writel(con, data->base + EXYNOS_TMU_REG_CONTROL);
} }
...@@ -646,36 +635,25 @@ static void exynos5433_tmu_control(struct platform_device *pdev, bool on) ...@@ -646,36 +635,25 @@ static void exynos5433_tmu_control(struct platform_device *pdev, bool on)
{ {
struct exynos_tmu_data *data = platform_get_drvdata(pdev); struct exynos_tmu_data *data = platform_get_drvdata(pdev);
struct thermal_zone_device *tz = data->tzd; struct thermal_zone_device *tz = data->tzd;
unsigned int con, interrupt_en, pd_det_en; unsigned int con, interrupt_en = 0, pd_det_en, i;
con = get_con_reg(data, readl(data->base + EXYNOS_TMU_REG_CONTROL)); con = get_con_reg(data, readl(data->base + EXYNOS_TMU_REG_CONTROL));
if (on) { if (on) {
con |= (1 << EXYNOS_TMU_CORE_EN_SHIFT); for (i = 0; i < data->ntrip; i++) {
interrupt_en = if (!of_thermal_is_trip_valid(tz, i))
(of_thermal_is_trip_valid(tz, 7) continue;
<< EXYNOS7_TMU_INTEN_RISE7_SHIFT) |
(of_thermal_is_trip_valid(tz, 6) interrupt_en |=
<< EXYNOS7_TMU_INTEN_RISE6_SHIFT) | (1 << (EXYNOS7_TMU_INTEN_RISE0_SHIFT + i));
(of_thermal_is_trip_valid(tz, 5) }
<< EXYNOS7_TMU_INTEN_RISE5_SHIFT) |
(of_thermal_is_trip_valid(tz, 4)
<< EXYNOS7_TMU_INTEN_RISE4_SHIFT) |
(of_thermal_is_trip_valid(tz, 3)
<< EXYNOS7_TMU_INTEN_RISE3_SHIFT) |
(of_thermal_is_trip_valid(tz, 2)
<< EXYNOS7_TMU_INTEN_RISE2_SHIFT) |
(of_thermal_is_trip_valid(tz, 1)
<< EXYNOS7_TMU_INTEN_RISE1_SHIFT) |
(of_thermal_is_trip_valid(tz, 0)
<< EXYNOS7_TMU_INTEN_RISE0_SHIFT);
interrupt_en |= interrupt_en |=
interrupt_en << EXYNOS_TMU_INTEN_FALL0_SHIFT; interrupt_en << EXYNOS_TMU_INTEN_FALL0_SHIFT;
} else {
con |= (1 << EXYNOS_TMU_CORE_EN_SHIFT);
} else
con &= ~(1 << EXYNOS_TMU_CORE_EN_SHIFT); con &= ~(1 << EXYNOS_TMU_CORE_EN_SHIFT);
interrupt_en = 0; /* Disable all interrupts */
}
pd_det_en = on ? EXYNOS5433_PD_DET_EN : 0; pd_det_en = on ? EXYNOS5433_PD_DET_EN : 0;
...@@ -688,37 +666,27 @@ static void exynos7_tmu_control(struct platform_device *pdev, bool on) ...@@ -688,37 +666,27 @@ static void exynos7_tmu_control(struct platform_device *pdev, bool on)
{ {
struct exynos_tmu_data *data = platform_get_drvdata(pdev); struct exynos_tmu_data *data = platform_get_drvdata(pdev);
struct thermal_zone_device *tz = data->tzd; struct thermal_zone_device *tz = data->tzd;
unsigned int con, interrupt_en; unsigned int con, interrupt_en = 0, i;
con = get_con_reg(data, readl(data->base + EXYNOS_TMU_REG_CONTROL)); con = get_con_reg(data, readl(data->base + EXYNOS_TMU_REG_CONTROL));
if (on) { if (on) {
con |= (1 << EXYNOS_TMU_CORE_EN_SHIFT); for (i = 0; i < data->ntrip; i++) {
con |= (1 << EXYNOS7_PD_DET_EN_SHIFT); if (!of_thermal_is_trip_valid(tz, i))
interrupt_en = continue;
(of_thermal_is_trip_valid(tz, 7)
<< EXYNOS7_TMU_INTEN_RISE7_SHIFT) | interrupt_en |=
(of_thermal_is_trip_valid(tz, 6) (1 << (EXYNOS7_TMU_INTEN_RISE0_SHIFT + i));
<< EXYNOS7_TMU_INTEN_RISE6_SHIFT) | }
(of_thermal_is_trip_valid(tz, 5)
<< EXYNOS7_TMU_INTEN_RISE5_SHIFT) |
(of_thermal_is_trip_valid(tz, 4)
<< EXYNOS7_TMU_INTEN_RISE4_SHIFT) |
(of_thermal_is_trip_valid(tz, 3)
<< EXYNOS7_TMU_INTEN_RISE3_SHIFT) |
(of_thermal_is_trip_valid(tz, 2)
<< EXYNOS7_TMU_INTEN_RISE2_SHIFT) |
(of_thermal_is_trip_valid(tz, 1)
<< EXYNOS7_TMU_INTEN_RISE1_SHIFT) |
(of_thermal_is_trip_valid(tz, 0)
<< EXYNOS7_TMU_INTEN_RISE0_SHIFT);
interrupt_en |= interrupt_en |=
interrupt_en << EXYNOS_TMU_INTEN_FALL0_SHIFT; interrupt_en << EXYNOS_TMU_INTEN_FALL0_SHIFT;
con |= (1 << EXYNOS_TMU_CORE_EN_SHIFT);
con |= (1 << EXYNOS7_PD_DET_EN_SHIFT);
} else { } else {
con &= ~(1 << EXYNOS_TMU_CORE_EN_SHIFT); con &= ~(1 << EXYNOS_TMU_CORE_EN_SHIFT);
con &= ~(1 << EXYNOS7_PD_DET_EN_SHIFT); con &= ~(1 << EXYNOS7_PD_DET_EN_SHIFT);
interrupt_en = 0; /* Disable all interrupts */
} }
writel(interrupt_en, data->base + EXYNOS7_TMU_REG_INTEN); writel(interrupt_en, data->base + EXYNOS7_TMU_REG_INTEN);
......
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