Commit 65ad7cac authored by Rex Zhu's avatar Rex Zhu Committed by Alex Deucher

drm/amd/pp: Refine powerplay instance

Include adev in powerplay instance.
so can visit adev directly instand of through cgs interface.
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarRex Zhu <Rex.Zhu@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent a2c120ce
...@@ -30,6 +30,7 @@ ...@@ -30,6 +30,7 @@
#include "pp_instance.h" #include "pp_instance.h"
#include "power_state.h" #include "power_state.h"
#include "amdgpu.h" #include "amdgpu.h"
#include "hwmgr.h"
#define PP_DPM_DISABLED 0xCCCC #define PP_DPM_DISABLED 0xCCCC
...@@ -64,13 +65,10 @@ static int amd_powerplay_create(struct amdgpu_device *adev) ...@@ -64,13 +65,10 @@ static int amd_powerplay_create(struct amdgpu_device *adev)
if (instance == NULL) if (instance == NULL)
return -ENOMEM; return -ENOMEM;
instance->chip_family = adev->family; instance->parent = adev;
instance->chip_id = adev->asic_type;
instance->pm_en = (amdgpu_dpm != 0 && !amdgpu_sriov_vf(adev)) ? true : false; instance->pm_en = (amdgpu_dpm != 0 && !amdgpu_sriov_vf(adev)) ? true : false;
instance->feature_mask = amdgpu_pp_feature_mask;
instance->device = adev->powerplay.cgs_device; instance->device = adev->powerplay.cgs_device;
mutex_init(&instance->pp_lock); mutex_init(&instance->pp_lock);
adev->powerplay.pp_handle = instance; adev->powerplay.pp_handle = instance;
return 0; return 0;
......
...@@ -146,10 +146,11 @@ int hwmgr_early_init(struct pp_instance *handle) ...@@ -146,10 +146,11 @@ int hwmgr_early_init(struct pp_instance *handle)
return -ENOMEM; return -ENOMEM;
handle->hwmgr = hwmgr; handle->hwmgr = hwmgr;
hwmgr->adev = handle->parent;
hwmgr->device = handle->device; hwmgr->device = handle->device;
hwmgr->chip_family = handle->chip_family; hwmgr->chip_family = ((struct amdgpu_device *)handle->parent)->family;
hwmgr->chip_id = handle->chip_id; hwmgr->chip_id = ((struct amdgpu_device *)handle->parent)->asic_type;
hwmgr->feature_mask = handle->feature_mask; hwmgr->feature_mask = amdgpu_pp_feature_mask;
hwmgr->usec_timeout = AMD_MAX_USEC_TIMEOUT; hwmgr->usec_timeout = AMD_MAX_USEC_TIMEOUT;
hwmgr->power_source = PP_PowerSource_AC; hwmgr->power_source = PP_PowerSource_AC;
hwmgr->pp_table_version = PP_TABLE_V1; hwmgr->pp_table_version = PP_TABLE_V1;
......
...@@ -700,6 +700,7 @@ enum PP_TABLE_VERSION { ...@@ -700,6 +700,7 @@ enum PP_TABLE_VERSION {
* The main hardware manager structure. * The main hardware manager structure.
*/ */
struct pp_hwmgr { struct pp_hwmgr {
void *adev;
uint32_t chip_family; uint32_t chip_family;
uint32_t chip_id; uint32_t chip_id;
uint32_t smu_version; uint32_t smu_version;
......
...@@ -23,14 +23,12 @@ ...@@ -23,14 +23,12 @@
#ifndef _PP_INSTANCE_H_ #ifndef _PP_INSTANCE_H_
#define _PP_INSTANCE_H_ #define _PP_INSTANCE_H_
#include "hwmgr.h" struct pp_hwmgr;
struct pp_instance { struct pp_instance {
uint32_t chip_family; void *parent; /* e.g. amdgpu_device */
uint32_t chip_id; void *device; /* e.g. cgs_device */
bool pm_en; bool pm_en;
uint32_t feature_mask;
void *device;
struct pp_hwmgr *hwmgr; struct pp_hwmgr *hwmgr;
struct mutex pp_lock; struct mutex pp_lock;
}; };
......
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