Commit 7c179f9d authored by Arnd Bergmann's avatar Arnd Bergmann

Merge tag 'imx-dt-4.16' of...

Merge tag 'imx-dt-4.16' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt

Pull "i.MX device tree changes for 4.16" from Shawn Guo:

 - A few random updates for vf610-zii board: correct switch EEPROM size,
   enable edma1, correct GPIO expander interrupt, add PHYs for switch2
   device.
 - LS1021A device tree updates: add reboot and QSPI device nodes, label
   USB controllers, specify interrupt-affinity for PMU, fix TMR_FIPER1
   setting, enable esdhc device, add Moxa UC-8410A board support.
 - A bunch of patches from Fabio: fix reg - unit address mismatches,
   remove leading zero in unit address, move regulators out of
   simple-bus, move nodes with no reg property out of bus, remove extra
   clock cell, add missing phy-cells to usb-nop-xceiv, etc.
 - A couple series from Hummingboard developers: re-organise device tree
   files for better handling various board versions, and then add the
   new hummingboard2 board support on top of that.
 - Disable AC'97 input pins pad and add support for powering off for
   imx6qdl-udoo board.
 - Convert from fbdev to drm bindings for imx6sx-sdb and imx6sl-evk
   board.
 - Add device tree for Variscite DART-MX6 SoM and Carrier-board support.
 - Add new board support of TS-4600 and TS-7970 from Technologic
   Systems.
 - A series from Stefan to update imx7-colibri device tree and then add
   new version of Toradex Colibri iMX7D board with eMMC support.
 - Other random updates on various board support.

* tag 'imx-dt-4.16' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (126 commits)
  ARM: dts: imx7s: Avoid using label in unit address and reg
  ARM: dts: imx51-zii-rdu1: Add missing #phy-cells to usb-nop-xceiv
  ARM: dts: imx6qdl-hummingboard2: Remove leading zero in unit address
  ARM: dts: ls1021a: add support for Moxa UC-8410A open platform
  ARM: dts: imx51-babbage: Fix the 26MHz clock modelling
  ARM: dts: vf610-zii-dev-rev-b: add PHYs for switch2
  ARM: dts: vf610-zii-dev-rev-b: fix interrupt for GPIO expander
  ARM: dts: vf610-zii-dev: enable edma1
  ARM: dts: ls1021a-twr: Remove extra clock cell
  ARM: dts: ls1021a-qds: Remove extra clock cell
  ARM: dts: imx53: add srtc node
  dt-bindings: imx-gpcv2: Fix the unit address
  ARM: imx: dts: Use lower case for bindings notation
  ARM: dts: imx6q-h100: use usdhc2 VSELECT
  ARM: dts: imx6sx: Add support for PCI power domain
  ARM: dts: imx6sx: Fix PCI non-prefetchable memory range
  ARM: dts: imx6qdl-hummingboard2: rename regulators to match schematic
  ARM: dts: imx6qdl-hummingboard2: add v1.5 som with eMMC
  ARM: dts: imx6qdl-hummingboard2: add v1.5 som without eMMC
  ARM: dts: imx6qdl-hummingboard2: add PWM3 support
  ...
parents b55eb1ae 84a82ef7
Technologic Systems Platforms Device Tree Bindings Technologic Systems Platforms Device Tree Bindings
-------------------------------------------------- --------------------------------------------------
TS-4600 is a System-on-Module based on the Freescale i.MX28 System-on-Chip.
It can be mounted on a carrier board providing additional peripheral connectors.
Required root node properties:
- compatible = "technologic,imx28-ts4600", "fsl,imx28"
TS-4800 board TS-4800 board
Required root node properties: Required root node properties:
- compatible = "technologic,imx51-ts4800", "fsl,imx51"; - compatible = "technologic,imx51-ts4800", "fsl,imx51";
...@@ -10,3 +15,9 @@ It can be mounted on a carrier board providing additional peripheral connectors. ...@@ -10,3 +15,9 @@ It can be mounted on a carrier board providing additional peripheral connectors.
Required root node properties: Required root node properties:
- compatible = "technologic,imx6dl-ts4900", "fsl,imx6dl" - compatible = "technologic,imx6dl-ts4900", "fsl,imx6dl"
- compatible = "technologic,imx6q-ts4900", "fsl,imx6q" - compatible = "technologic,imx6q-ts4900", "fsl,imx6q"
TS-7970 is a System-on-Module based on the Freescale i.MX6 System-on-Chip.
It can be mounted on a carrier board providing additional peripheral connectors.
Required root node properties:
- compatible = "technologic,imx6dl-ts7970", "fsl,imx6dl"
- compatible = "technologic,imx6q-ts7970", "fsl,imx6q"
Solomon Goldentek Display GKTW70SDAE4SE LVDS Display Panel
==========================================================
The GKTW70SDAE4SE is a 7" WVGA TFT-LCD display panel.
These DT bindings follow the LVDS panel bindings defined in panel-lvds.txt
with the following device-specific properties.
Required properties:
- compatible: Shall contain "sgd,gktw70sdae4se" and "panel-lvds", in that order.
Example
-------
panel {
compatible = "sgd,gktw70sdae4se", "panel-lvds";
width-mm = <153>;
height-mm = <86>;
data-mapping = "jeida-18";
panel-timing {
clock-frequency = <32000000>;
hactive = <800>;
vactive = <480>;
hback-porch = <39>;
hfront-porch = <39>;
vback-porch = <29>;
vfront-porch = <13>;
hsync-len = <47>;
vsync-len = <2>;
};
port {
panel_in: endpoint {
remote-endpoint = <&lvds_encoder>;
};
};
};
...@@ -44,10 +44,10 @@ Example: ...@@ -44,10 +44,10 @@ Example:
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
pgc_pcie_phy: power-domain@3 { pgc_pcie_phy: power-domain@1 {
#power-domain-cells = <0>; #power-domain-cells = <0>;
reg = <IMX7_POWER_DOMAIN_PCIE_PHY>; reg = <1>;
power-supply = <&reg_1p0d>; power-supply = <&reg_1p0d>;
}; };
}; };
......
...@@ -306,6 +306,7 @@ seagate Seagate Technology PLC ...@@ -306,6 +306,7 @@ seagate Seagate Technology PLC
semtech Semtech Corporation semtech Semtech Corporation
sensirion Sensirion AG sensirion Sensirion AG
sff Small Form Factor Committee sff Small Form Factor Committee
sgd Solomon Goldentek Display Corporation
sgx SGX Sensortech sgx SGX Sensortech
sharp Sharp Corporation sharp Sharp Corporation
shimafuji Shimafuji Electric, Inc. shimafuji Shimafuji Electric, Inc.
......
...@@ -373,6 +373,8 @@ dtb-$(CONFIG_SOC_IMX6Q) += \ ...@@ -373,6 +373,8 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
imx6dl-aristainetos2_7.dtb \ imx6dl-aristainetos2_7.dtb \
imx6dl-colibri-eval-v3.dtb \ imx6dl-colibri-eval-v3.dtb \
imx6dl-cubox-i.dtb \ imx6dl-cubox-i.dtb \
imx6dl-cubox-i-emmc-som-v15.dtb \
imx6dl-cubox-i-som-v15.dtb \
imx6dl-dfi-fs700-m60.dtb \ imx6dl-dfi-fs700-m60.dtb \
imx6dl-gw51xx.dtb \ imx6dl-gw51xx.dtb \
imx6dl-gw52xx.dtb \ imx6dl-gw52xx.dtb \
...@@ -385,6 +387,11 @@ dtb-$(CONFIG_SOC_IMX6Q) += \ ...@@ -385,6 +387,11 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
imx6dl-gw5903.dtb \ imx6dl-gw5903.dtb \
imx6dl-gw5904.dtb \ imx6dl-gw5904.dtb \
imx6dl-hummingboard.dtb \ imx6dl-hummingboard.dtb \
imx6dl-hummingboard-emmc-som-v15.dtb \
imx6dl-hummingboard-som-v15.dtb \
imx6dl-hummingboard2.dtb \
imx6dl-hummingboard2-emmc-som-v15.dtb \
imx6dl-hummingboard2-som-v15.dtb \
imx6dl-icore.dtb \ imx6dl-icore.dtb \
imx6dl-icore-rqs.dtb \ imx6dl-icore-rqs.dtb \
imx6dl-nit6xlite.dtb \ imx6dl-nit6xlite.dtb \
...@@ -397,6 +404,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \ ...@@ -397,6 +404,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
imx6dl-sabresd.dtb \ imx6dl-sabresd.dtb \
imx6dl-savageboard.dtb \ imx6dl-savageboard.dtb \
imx6dl-ts4900.dtb \ imx6dl-ts4900.dtb \
imx6dl-ts7970.dtb \
imx6dl-tx6dl-comtft.dtb \ imx6dl-tx6dl-comtft.dtb \
imx6dl-tx6s-8034.dtb \ imx6dl-tx6s-8034.dtb \
imx6dl-tx6s-8034-mb7.dtb \ imx6dl-tx6s-8034-mb7.dtb \
...@@ -422,6 +430,8 @@ dtb-$(CONFIG_SOC_IMX6Q) += \ ...@@ -422,6 +430,8 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
imx6q-b850v3.dtb \ imx6q-b850v3.dtb \
imx6q-cm-fx6.dtb \ imx6q-cm-fx6.dtb \
imx6q-cubox-i.dtb \ imx6q-cubox-i.dtb \
imx6q-cubox-i-emmc-som-v15.dtb \
imx6q-cubox-i-som-v15.dtb \
imx6q-dfi-fs700-m60.dtb \ imx6q-dfi-fs700-m60.dtb \
imx6q-display5-tianma-tm070-1280x768.dtb \ imx6q-display5-tianma-tm070-1280x768.dtb \
imx6q-dmo-edmqmx6.dtb \ imx6q-dmo-edmqmx6.dtb \
...@@ -440,6 +450,11 @@ dtb-$(CONFIG_SOC_IMX6Q) += \ ...@@ -440,6 +450,11 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
imx6q-gw5904.dtb \ imx6q-gw5904.dtb \
imx6q-h100.dtb \ imx6q-h100.dtb \
imx6q-hummingboard.dtb \ imx6q-hummingboard.dtb \
imx6q-hummingboard-emmc-som-v15.dtb \
imx6q-hummingboard-som-v15.dtb \
imx6q-hummingboard2.dtb \
imx6q-hummingboard2-emmc-som-v15.dtb \
imx6q-hummingboard2-som-v15.dtb \
imx6q-icore.dtb \ imx6q-icore.dtb \
imx6q-icore-ofcap10.dtb \ imx6q-icore-ofcap10.dtb \
imx6q-icore-ofcap12.dtb \ imx6q-icore-ofcap12.dtb \
...@@ -460,6 +475,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \ ...@@ -460,6 +475,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
imx6q-sbc6x.dtb \ imx6q-sbc6x.dtb \
imx6q-tbs2910.dtb \ imx6q-tbs2910.dtb \
imx6q-ts4900.dtb \ imx6q-ts4900.dtb \
imx6q-ts7970.dtb \
imx6q-tx6q-1010.dtb \ imx6q-tx6q-1010.dtb \
imx6q-tx6q-1010-comtft.dtb \ imx6q-tx6q-1010-comtft.dtb \
imx6q-tx6q-1020.dtb \ imx6q-tx6q-1020.dtb \
...@@ -471,6 +487,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \ ...@@ -471,6 +487,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
imx6q-tx6q-11x0-mb7.dtb \ imx6q-tx6q-11x0-mb7.dtb \
imx6q-udoo.dtb \ imx6q-udoo.dtb \
imx6q-utilite-pro.dtb \ imx6q-utilite-pro.dtb \
imx6q-var-dt6customboard.dtb \
imx6q-wandboard.dtb \ imx6q-wandboard.dtb \
imx6q-wandboard-revb1.dtb \ imx6q-wandboard-revb1.dtb \
imx6q-wandboard-revd1.dtb \ imx6q-wandboard-revd1.dtb \
...@@ -512,15 +529,17 @@ dtb-$(CONFIG_SOC_IMX6UL) += \ ...@@ -512,15 +529,17 @@ dtb-$(CONFIG_SOC_IMX6UL) += \
imx6ull-14x14-evk.dtb imx6ull-14x14-evk.dtb
dtb-$(CONFIG_SOC_IMX7D) += \ dtb-$(CONFIG_SOC_IMX7D) += \
imx7d-cl-som-imx7.dtb \ imx7d-cl-som-imx7.dtb \
imx7d-colibri-emmc-eval-v3.dtb \
imx7d-colibri-eval-v3.dtb \ imx7d-colibri-eval-v3.dtb \
imx7d-nitrogen7.dtb \ imx7d-nitrogen7.dtb \
imx7d-pico.dtb \ imx7d-pico-pi.dtb \
imx7d-sbc-imx7.dtb \ imx7d-sbc-imx7.dtb \
imx7d-sdb.dtb \ imx7d-sdb.dtb \
imx7d-sdb-sht11.dtb \ imx7d-sdb-sht11.dtb \
imx7s-colibri-eval-v3.dtb \ imx7s-colibri-eval-v3.dtb \
imx7s-warp.dtb imx7s-warp.dtb
dtb-$(CONFIG_SOC_LS1021A) += \ dtb-$(CONFIG_SOC_LS1021A) += \
ls1021a-moxa-uc-8410a.dtb \
ls1021a-qds.dtb \ ls1021a-qds.dtb \
ls1021a-twr.dtb ls1021a-twr.dtb
dtb-$(CONFIG_SOC_VF610) += \ dtb-$(CONFIG_SOC_VF610) += \
...@@ -559,6 +578,7 @@ dtb-$(CONFIG_ARCH_MXS) += \ ...@@ -559,6 +578,7 @@ dtb-$(CONFIG_ARCH_MXS) += \
imx28-m28cu3.dtb \ imx28-m28cu3.dtb \
imx28-m28evk.dtb \ imx28-m28evk.dtb \
imx28-sps1.dtb \ imx28-sps1.dtb \
imx28-ts4600.dtb \
imx28-tx28.dtb imx28-tx28.dtb
dtb-$(CONFIG_ARCH_NOMADIK) += \ dtb-$(CONFIG_ARCH_NOMADIK) += \
ste-nomadik-s8815.dtb \ ste-nomadik-s8815.dtb \
......
...@@ -628,11 +628,13 @@ usbphy { ...@@ -628,11 +628,13 @@ usbphy {
usbphy0: usb-phy@0 { usbphy0: usb-phy@0 {
reg = <0>; reg = <0>;
compatible = "usb-nop-xceiv"; compatible = "usb-nop-xceiv";
#phy-cells = <0>;
}; };
usbphy1: usb-phy@1 { usbphy1: usb-phy@1 {
reg = <1>; reg = <1>;
compatible = "usb-nop-xceiv"; compatible = "usb-nop-xceiv";
#phy-cells = <0>;
}; };
}; };
}; };
...@@ -30,6 +30,7 @@ usbphy0: usbphy@0 { ...@@ -30,6 +30,7 @@ usbphy0: usbphy@0 {
reg = <0>; reg = <0>;
clocks = <&clks IMX27_CLK_DUMMY>; clocks = <&clks IMX27_CLK_DUMMY>;
clock-names = "main_clk"; clock-names = "main_clk";
#phy-cells = <0>;
}; };
}; };
}; };
......
...@@ -63,6 +63,7 @@ usbphy2: usbphy@2 { ...@@ -63,6 +63,7 @@ usbphy2: usbphy@2 {
vcc-supply = <&reg_5v0>; vcc-supply = <&reg_5v0>;
clocks = <&clks IMX27_CLK_DUMMY>; clocks = <&clks IMX27_CLK_DUMMY>;
clock-names = "main_clk"; clock-names = "main_clk";
#phy-cells = <0>;
}; };
}; };
}; };
......
...@@ -53,6 +53,7 @@ usbphy0: usbphy@0 { ...@@ -53,6 +53,7 @@ usbphy0: usbphy@0 {
vcc-supply = <&sw3_reg>; vcc-supply = <&sw3_reg>;
clocks = <&clks IMX27_CLK_DUMMY>; clocks = <&clks IMX27_CLK_DUMMY>;
clock-names = "main_clk"; clock-names = "main_clk";
#phy-cells = <0>;
}; };
}; };
}; };
......
/*
* Copyright (C) 2016 Savoir-Faire Linux
* Author: Sebastien Bourdelin <sebastien.bourdelin@savoirfairelinux.com>
*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
* Version 2 or later at the following locations:
*
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
*/
/dts-v1/;
#include "imx28.dtsi"
#include "dt-bindings/gpio/gpio.h"
/ {
model = "Technologic Systems i.MX28 TS-4600";
compatible = "technologic,imx28-ts4600", "fsl,imx28";
memory {
reg = <0x40000000 0x10000000>; /* 256MB */
};
apb@80000000 {
apbh@80000000 {
ssp0: ssp@80010000 {
compatible = "fsl,imx28-mmc";
pinctrl-names = "default";
pinctrl-0 = <&mmc0_4bit_pins_a
&mmc0_sck_cfg
&en_sd_pwr>;
broken-cd = <1>;
bus-width = <4>;
vmmc-supply = <&reg_vddio_sd0>;
status = "okay";
};
pinctrl@80018000 {
en_sd_pwr: en-sd-pwr@0 {
reg = <0>;
fsl,pinmux-ids = <
MX28_PAD_PWM3__GPIO_3_28
>;
fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <MXS_PULL_DISABLE>;
};
};
};
apbx@80040000 {
pwm: pwm@80064000 {
pinctrl-names = "default";
pinctrl-0 = <&pwm2_pins_a>;
status = "okay";
};
duart: serial@80074000 {
pinctrl-names = "default";
pinctrl-0 = <&duart_pins_a>;
status = "okay";
};
};
};
reg_vddio_sd0: regulator-vddio-sd0 {
compatible = "regulator-fixed";
regulator-name = "vddio-sd0";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
gpio = <&gpio3 28 GPIO_ACTIVE_LOW>;
};
};
...@@ -402,11 +402,13 @@ usbphy { ...@@ -402,11 +402,13 @@ usbphy {
usbphy0: usb-phy@0 { usbphy0: usb-phy@0 {
reg = <0>; reg = <0>;
compatible = "usb-nop-xceiv"; compatible = "usb-nop-xceiv";
#phy-cells = <0>;
}; };
usbphy1: usb-phy@1 { usbphy1: usb-phy@1 {
reg = <1>; reg = <1>;
compatible = "usb-nop-xceiv"; compatible = "usb-nop-xceiv";
#phy-cells = <0>;
}; };
}; };
}; };
...@@ -25,18 +25,41 @@ memory { ...@@ -25,18 +25,41 @@ memory {
reg = <0x90000000 0x20000000>; reg = <0x90000000 0x20000000>;
}; };
clocks {
ckih1 { ckih1 {
clock-frequency = <22579200>; clock-frequency = <22579200>;
}; };
clk_26M: codec_clock { clk_osc: clk-osc {
compatible = "fixed-clock"; compatible = "fixed-clock";
reg=<0>;
#clock-cells = <0>; #clock-cells = <0>;
clock-frequency = <26000000>; clock-frequency = <26000000>;
gpios = <&gpio4 26 GPIO_ACTIVE_LOW>;
}; };
clk_osc_gate: clk-osc-gate {
compatible = "gpio-gate-clock";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_clk26mhz_osc>;
clocks = <&clk_osc>;
#clock-cells = <0>;
enable-gpios = <&gpio3 1 GPIO_ACTIVE_HIGH>;
};
clk_audio: clk-audio {
compatible = "gpio-gate-clock";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_clk26mhz_audio>;
clocks = <&clk_osc_gate>;
#clock-cells = <0>;
enable-gpios = <&gpio4 26 GPIO_ACTIVE_LOW>;
};
clk_usb: clk-usb {
compatible = "gpio-gate-clock";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_clk26mhz_usb>;
clocks = <&clk_osc_gate>;
#clock-cells = <0>;
enable-gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
}; };
display1: disp1 { display1: disp1 {
...@@ -162,9 +185,11 @@ usbphy { ...@@ -162,9 +185,11 @@ usbphy {
usbh1phy: usbh1phy@0 { usbh1phy: usbh1phy@0 {
compatible = "usb-nop-xceiv"; compatible = "usb-nop-xceiv";
reg = <0>; reg = <0>;
clocks = <&clks IMX5_CLK_DUMMY>; clocks = <&clk_usb>;
clock-names = "main_clk"; clock-names = "main_clk";
reset-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>; reset-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>;
vcc-supply = <&vusb_reg>;
#phy-cells = <0>;
}; };
}; };
}; };
...@@ -240,6 +265,10 @@ vsd_reg: vsd { ...@@ -240,6 +265,10 @@ vsd_reg: vsd {
regulator-max-microvolt = <3150000>; regulator-max-microvolt = <3150000>;
}; };
vusb_reg: vusb {
regulator-boot-on;
};
vusb2_reg: vusb2 { vusb2_reg: vusb2 {
regulator-min-microvolt = <2400000>; regulator-min-microvolt = <2400000>;
regulator-max-microvolt = <2775000>; regulator-max-microvolt = <2775000>;
...@@ -339,10 +368,8 @@ &i2c2 { ...@@ -339,10 +368,8 @@ &i2c2 {
sgtl5000: codec@a { sgtl5000: codec@a {
compatible = "fsl,sgtl5000"; compatible = "fsl,sgtl5000";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_clkcodec>;
reg = <0x0a>; reg = <0x0a>;
clocks = <&clk_26M>; clocks = <&clk_audio>;
VDDA-supply = <&vdig_reg>; VDDA-supply = <&vdig_reg>;
VDDIO-supply = <&vvideo_reg>; VDDIO-supply = <&vvideo_reg>;
}; };
...@@ -413,6 +440,10 @@ &usbh1 { ...@@ -413,6 +440,10 @@ &usbh1 {
status = "okay"; status = "okay";
}; };
&usbphy0 {
vcc-supply = <&vusb_reg>;
};
&usbotg { &usbotg {
dr_mode = "otg"; dr_mode = "otg";
disable-over-current; disable-over-current;
...@@ -431,9 +462,21 @@ MX51_PAD_AUD3_BB_FS__AUD3_TXFS 0x80000000 ...@@ -431,9 +462,21 @@ MX51_PAD_AUD3_BB_FS__AUD3_TXFS 0x80000000
>; >;
}; };
pinctrl_clkcodec: clkcodecgrp { pinctrl_clk26mhz_audio: clk26mhzaudiocgrp {
fsl,pins = <
MX51_PAD_CSPI1_RDY__GPIO4_26 0x85
>;
};
pinctrl_clk26mhz_osc: clk26mhzoscgrp {
fsl,pins = <
MX51_PAD_DI1_PIN12__GPIO3_1 0x85
>;
};
pinctrl_clk26mhz_usb: clk26mhzusbgrp {
fsl,pins = < fsl,pins = <
MX51_PAD_CSPI1_RDY__GPIO4_26 0x80000000 MX51_PAD_EIM_D17__GPIO2_1 0x85
>; >;
}; };
......
...@@ -94,6 +94,7 @@ usbh1phy: usbh1phy@0 { ...@@ -94,6 +94,7 @@ usbh1phy: usbh1phy@0 {
clocks = <&clks IMX5_CLK_USB_PHY_GATE>; clocks = <&clks IMX5_CLK_USB_PHY_GATE>;
clock-names = "main_clk"; clock-names = "main_clk";
clock-frequency = <19200000>; clock-frequency = <19200000>;
#phy-cells = <0>;
}; };
}; };
}; };
......
...@@ -149,18 +149,18 @@ fpga@0 { ...@@ -149,18 +149,18 @@ fpga@0 {
#size-cells = <1>; #size-cells = <1>;
ranges = <0 0 0 0x1d000>; ranges = <0 0 0 0x1d000>;
syscon: syscon@b0010000 { syscon: syscon@10000 {
compatible = "syscon", "simple-mfd"; compatible = "syscon", "simple-mfd";
reg = <0x10000 0x3d>; reg = <0x10000 0x3d>;
reg-io-width = <2>; reg-io-width = <2>;
wdt@e { wdt {
compatible = "technologic,ts4800-wdt"; compatible = "technologic,ts4800-wdt";
syscon = <&syscon 0xe>; syscon = <&syscon 0xe>;
}; };
}; };
touchscreen { touchscreen@12000 {
compatible = "technologic,ts4800-ts"; compatible = "technologic,ts4800-ts";
reg = <0x12000 0x1000>; reg = <0x12000 0x1000>;
syscon = <&syscon 0x10 6>; syscon = <&syscon 0x10 6>;
......
...@@ -242,7 +242,7 @@ port@4 { ...@@ -242,7 +242,7 @@ port@4 {
sound { sound {
compatible = "simple-audio-card"; compatible = "simple-audio-card";
simple-audio-card,name = "RDU1 audio"; simple-audio-card,name = "Front";
simple-audio-card,format = "i2s"; simple-audio-card,format = "i2s";
simple-audio-card,bitclock-master = <&sound_codec>; simple-audio-card,bitclock-master = <&sound_codec>;
simple-audio-card,frame-master = <&sound_codec>; simple-audio-card,frame-master = <&sound_codec>;
...@@ -251,7 +251,7 @@ sound { ...@@ -251,7 +251,7 @@ sound {
simple-audio-card,routing = simple-audio-card,routing =
"Headphone Jack", "HPLEFT", "Headphone Jack", "HPLEFT",
"Headphone Jack", "HPRIGHT"; "Headphone Jack", "HPRIGHT";
simple-audio-card,aux-devs = <&tpa6130a2>; simple-audio-card,aux-devs = <&hpa1>;
sound_cpu: simple-audio-card,cpu { sound_cpu: simple-audio-card,cpu {
sound-dai = <&ssi2>; sound-dai = <&ssi2>;
...@@ -271,6 +271,7 @@ usbh1phy: usbphy1 { ...@@ -271,6 +271,7 @@ usbh1phy: usbphy1 {
clock-names = "main_clk"; clock-names = "main_clk";
reset-gpios = <&gpio4 8 GPIO_ACTIVE_LOW>; reset-gpios = <&gpio4 8 GPIO_ACTIVE_LOW>;
vcc-supply = <&vusb_reg>; vcc-supply = <&vusb_reg>;
#phy-cells = <0>;
}; };
usbh2phy: usbphy2 { usbh2phy: usbphy2 {
...@@ -281,6 +282,7 @@ usbh2phy: usbphy2 { ...@@ -281,6 +282,7 @@ usbh2phy: usbphy2 {
clock-names = "main_clk"; clock-names = "main_clk";
reset-gpios = <&gpio4 7 GPIO_ACTIVE_LOW>; reset-gpios = <&gpio4 7 GPIO_ACTIVE_LOW>;
vcc-supply = <&vusb_reg>; vcc-supply = <&vusb_reg>;
#phy-cells = <0>;
}; };
}; };
...@@ -428,13 +430,13 @@ leds { ...@@ -428,13 +430,13 @@ leds {
#size-cells = <0>; #size-cells = <0>;
led-control = <0x0 0x0 0x3f83f8 0x0>; led-control = <0x0 0x0 0x3f83f8 0x0>;
sysled0 { sysled0@3 {
reg = <3>; reg = <3>;
label = "system:green:status"; label = "system:green:status";
linux,default-trigger = "default-on"; linux,default-trigger = "default-on";
}; };
sysled1 { sysled1@4 {
reg = <4>; reg = <4>;
label = "system:green:act"; label = "system:green:act";
linux,default-trigger = "heartbeat"; linux,default-trigger = "heartbeat";
...@@ -479,7 +481,7 @@ eeprom@50 { ...@@ -479,7 +481,7 @@ eeprom@50 {
reg = <0x50>; reg = <0x50>;
}; };
tpa6130a2: amp@60 { hpa1: amp@60 {
compatible = "ti,tpa6130a2"; compatible = "ti,tpa6130a2";
reg = <0x60>; reg = <0x60>;
pinctrl-names = "default"; pinctrl-names = "default";
......
...@@ -113,6 +113,7 @@ usbphy0: usbphy@0 { ...@@ -113,6 +113,7 @@ usbphy0: usbphy@0 {
reg = <0>; reg = <0>;
clocks = <&clks IMX5_CLK_USB_PHY_GATE>; clocks = <&clks IMX5_CLK_USB_PHY_GATE>;
clock-names = "main_clk"; clock-names = "main_clk";
#phy-cells = <0>;
}; };
}; };
......
...@@ -152,7 +152,7 @@ &fec { ...@@ -152,7 +152,7 @@ &fec {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_fec>; pinctrl-0 = <&pinctrl_fec>;
phy-mode = "rmii"; phy-mode = "rmii";
phy-reset-gpios = <&gpio7 6 GPIO_ACTIVE_HIGH>; phy-reset-gpios = <&gpio7 6 GPIO_ACTIVE_LOW>;
status = "okay"; status = "okay";
}; };
......
...@@ -64,7 +64,6 @@ stmpe610@41 { ...@@ -64,7 +64,6 @@ stmpe610@41 {
stmpe_touchscreen { stmpe_touchscreen {
compatible = "st,stmpe-ts"; compatible = "st,stmpe-ts";
reg = <0>;
st,sample-time = <4>; st,sample-time = <4>;
st,mod-12b = <1>; st,mod-12b = <1>;
st,ref-sel = <0>; st,ref-sel = <0>;
......
...@@ -53,7 +53,6 @@ aliases { ...@@ -53,7 +53,6 @@ aliases {
display = &display; display = &display;
}; };
soc {
display: disp0 { display: disp0 {
compatible = "fsl,imx-parallel-display"; compatible = "fsl,imx-parallel-display";
interface-pix-fmt = "rgb24"; interface-pix-fmt = "rgb24";
...@@ -181,7 +180,6 @@ ETQ570 { ...@@ -181,7 +180,6 @@ ETQ570 {
}; };
}; };
}; };
};
backlight: backlight { backlight: backlight {
compatible = "pwm-backlight"; compatible = "pwm-backlight";
......
...@@ -225,11 +225,17 @@ &fec { ...@@ -225,11 +225,17 @@ &fec {
mac-address = [000000000000]; /* placeholder; will be overwritten by bootloader */ mac-address = [000000000000]; /* placeholder; will be overwritten by bootloader */
status = "okay"; status = "okay";
mdio {
#address-cells = <1>;
#size-cells = <0>;
phy0: ethernet-phy@0 { phy0: ethernet-phy@0 {
reg = <0>;
interrupt-parent = <&gpio2>; interrupt-parent = <&gpio2>;
interrupts = <4 IRQ_TYPE_EDGE_FALLING>; interrupts = <4 IRQ_TYPE_EDGE_FALLING>;
device_type = "ethernet-phy"; device_type = "ethernet-phy";
}; };
};
}; };
&i2c1 { &i2c1 {
......
...@@ -116,6 +116,28 @@ osc { ...@@ -116,6 +116,28 @@ osc {
}; };
}; };
pmu {
compatible = "arm,cortex-a8-pmu";
interrupt-parent = <&tzic>;
interrupts = <77>;
};
usbphy0: usbphy-0 {
compatible = "usb-nop-xceiv";
clocks = <&clks IMX5_CLK_USB_PHY1_GATE>;
clock-names = "main_clk";
#phy-cells = <0>;
status = "okay";
};
usbphy1: usbphy-1 {
compatible = "usb-nop-xceiv";
clocks = <&clks IMX5_CLK_USB_PHY2_GATE>;
clock-names = "main_clk";
#phy-cells = <0>;
status = "okay";
};
soc { soc {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
...@@ -299,20 +321,6 @@ aipstz1: bridge@53f00000 { ...@@ -299,20 +321,6 @@ aipstz1: bridge@53f00000 {
reg = <0x53f00000 0x60>; reg = <0x53f00000 0x60>;
}; };
usbphy0: usbphy-0 {
compatible = "usb-nop-xceiv";
clocks = <&clks IMX5_CLK_USB_PHY1_GATE>;
clock-names = "main_clk";
status = "okay";
};
usbphy1: usbphy-1 {
compatible = "usb-nop-xceiv";
clocks = <&clks IMX5_CLK_USB_PHY2_GATE>;
clock-names = "main_clk";
status = "okay";
};
usbotg: usb@53f80000 { usbotg: usb@53f80000 {
compatible = "fsl,imx53-usb", "fsl,imx27-usb"; compatible = "fsl,imx53-usb", "fsl,imx27-usb";
reg = <0x53f80000 0x0200>; reg = <0x53f80000 0x0200>;
...@@ -433,6 +441,13 @@ gpt: timer@53fa0000 { ...@@ -433,6 +441,13 @@ gpt: timer@53fa0000 {
clock-names = "ipg", "per"; clock-names = "ipg", "per";
}; };
srtc: rtc@53fa4000 {
compatible = "fsl,imx53-rtc";
reg = <0x53fa4000 0x4000>;
interrupts = <24>;
clocks = <&clks IMX5_CLK_SRTC_GATE>;
};
iomuxc: iomuxc@53fa8000 { iomuxc: iomuxc@53fa8000 {
compatible = "fsl,imx53-iomuxc"; compatible = "fsl,imx53-iomuxc";
reg = <0x53fa8000 0x4000>; reg = <0x53fa8000 0x4000>;
...@@ -813,10 +828,5 @@ ocram: sram@f8000000 { ...@@ -813,10 +828,5 @@ ocram: sram@f8000000 {
reg = <0xf8000000 0x20000>; reg = <0xf8000000 0x20000>;
clocks = <&clks IMX5_CLK_OCRAM>; clocks = <&clks IMX5_CLK_OCRAM>;
}; };
pmu {
compatible = "arm,cortex-a8-pmu";
interrupts = <77>;
};
}; };
}; };
...@@ -31,7 +31,6 @@ memory { ...@@ -31,7 +31,6 @@ memory {
reg = <0x10000000 0x40000000>; reg = <0x10000000 0x40000000>;
}; };
soc {
display0: disp0 { display0: disp0 {
compatible = "fsl,imx-parallel-display"; compatible = "fsl,imx-parallel-display";
interface-pix-fmt = "rgb24"; interface-pix-fmt = "rgb24";
...@@ -62,7 +61,6 @@ display0_in: endpoint { ...@@ -62,7 +61,6 @@ display0_in: endpoint {
}; };
}; };
}; };
};
}; };
&ecspi2 { &ecspi2 {
......
...@@ -20,7 +20,6 @@ memory { ...@@ -20,7 +20,6 @@ memory {
reg = <0x10000000 0x40000000>; reg = <0x10000000 0x40000000>;
}; };
soc {
display0: disp0 { display0: disp0 {
compatible = "fsl,imx-parallel-display"; compatible = "fsl,imx-parallel-display";
interface-pix-fmt = "rgb24"; interface-pix-fmt = "rgb24";
...@@ -50,7 +49,6 @@ display0_in: endpoint { ...@@ -50,7 +49,6 @@ display0_in: endpoint {
}; };
}; };
}; };
};
backlight { backlight {
compatible = "pwm-backlight"; compatible = "pwm-backlight";
......
...@@ -163,7 +163,7 @@ &i2c3 { ...@@ -163,7 +163,7 @@ &i2c3 {
/* M41T0M6 real time clock on carrier board */ /* M41T0M6 real time clock on carrier board */
rtc_i2c: rtc@68 { rtc_i2c: rtc@68 {
compatible = "st,m41t00"; compatible = "st,m41t0";
reg = <0x68>; reg = <0x68>;
}; };
}; };
......
/*
* Copyright (C) 2014 Russell King
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
/dts-v1/;
#include "imx6dl.dtsi"
#include "imx6qdl-sr-som.dtsi"
#include "imx6qdl-sr-som-ti.dtsi"
#include "imx6qdl-sr-som-emmc.dtsi"
#include "imx6qdl-cubox-i.dtsi"
/ {
model = "SolidRun Cubox-i Solo/DualLite (1.5som+emmc)";
compatible = "solidrun,cubox-i/dl", "fsl,imx6dl";
};
/*
* Copyright (C) 2014 Russell King
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
/dts-v1/;
#include "imx6dl.dtsi"
#include "imx6qdl-sr-som.dtsi"
#include "imx6qdl-sr-som-ti.dtsi"
#include "imx6qdl-cubox-i.dtsi"
/ {
model = "SolidRun Cubox-i Solo/DualLite (1.5som)";
compatible = "solidrun,cubox-i/dl", "fsl,imx6dl";
};
...@@ -41,6 +41,8 @@ ...@@ -41,6 +41,8 @@
/dts-v1/; /dts-v1/;
#include "imx6dl.dtsi" #include "imx6dl.dtsi"
#include "imx6qdl-sr-som.dtsi"
#include "imx6qdl-sr-som-brcm.dtsi"
#include "imx6qdl-cubox-i.dtsi" #include "imx6qdl-cubox-i.dtsi"
/ { / {
......
/*
* Copyright (C) 2014 Rabeeh Khoury (rabeeh@solid-run.com)
* Based on dt work by Russell King
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
/dts-v1/;
#include "imx6dl.dtsi"
#include "imx6qdl-sr-som.dtsi"
#include "imx6qdl-sr-som-ti.dtsi"
#include "imx6qdl-sr-som-emmc.dtsi"
#include "imx6qdl-hummingboard.dtsi"
/ {
model = "SolidRun HummingBoard Solo/DualLite (1.5som+emmc)";
compatible = "solidrun,hummingboard/dl", "fsl,imx6dl";
};
/*
* Copyright (C) 2014 Rabeeh Khoury (rabeeh@solid-run.com)
* Based on dt work by Russell King
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
/dts-v1/;
#include "imx6dl.dtsi"
#include "imx6qdl-sr-som.dtsi"
#include "imx6qdl-sr-som-ti.dtsi"
#include "imx6qdl-hummingboard.dtsi"
/ {
model = "SolidRun HummingBoard Solo/DualLite (1.5som)";
compatible = "solidrun,hummingboard/dl", "fsl,imx6dl";
};
...@@ -42,6 +42,8 @@ ...@@ -42,6 +42,8 @@
/dts-v1/; /dts-v1/;
#include "imx6dl.dtsi" #include "imx6dl.dtsi"
#include "imx6qdl-sr-som.dtsi"
#include "imx6qdl-sr-som-brcm.dtsi"
#include "imx6qdl-hummingboard.dtsi" #include "imx6qdl-hummingboard.dtsi"
/ { / {
......
/*
* Device Tree file for SolidRun HummingBoard2
* Copyright (C) 2015 Rabeeh Khoury <rabeeh@solid-run.com>
* Based on work by Russell King
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License.
*
* This file is distributed in the hope that it will be useful
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
/dts-v1/;
#include "imx6dl.dtsi"
#include "imx6qdl-sr-som.dtsi"
#include "imx6qdl-sr-som-emmc.dtsi"
#include "imx6qdl-sr-som-ti.dtsi"
#include "imx6qdl-hummingboard2.dtsi"
/ {
model = "SolidRun HummingBoard2 Solo/DualLite (1.5som+emmc)";
compatible = "solidrun,hummingboard2/dl", "fsl,imx6dl";
};
/*
* Device Tree file for SolidRun HummingBoard2
* Copyright (C) 2015 Rabeeh Khoury <rabeeh@solid-run.com>
* Based on work by Russell King
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License.
*
* This file is distributed in the hope that it will be useful
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
/dts-v1/;
#include "imx6dl.dtsi"
#include "imx6qdl-sr-som.dtsi"
#include "imx6qdl-sr-som-ti.dtsi"
#include "imx6qdl-hummingboard2.dtsi"
/ {
model = "SolidRun HummingBoard2 Solo/DualLite (1.5som)";
compatible = "solidrun,hummingboard2/dl", "fsl,imx6dl";
};
/*
* Copyright (C) 2015 Rabeeh Khoury <rabeeh@solid-run.com>
* Based on dt work by Russell King
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
/dts-v1/;
#include "imx6dl.dtsi"
#include "imx6qdl-sr-som.dtsi"
#include "imx6qdl-sr-som-brcm.dtsi"
#include "imx6qdl-hummingboard2.dtsi"
#include "imx6qdl-hummingboard2-emmc.dtsi"
/ {
model = "SolidRun HummingBoard2 Solo/DualLite";
compatible = "solidrun,hummingboard2/dl", "fsl,imx6dl";
};
...@@ -668,6 +668,7 @@ ...@@ -668,6 +668,7 @@
#define MX6QDL_PAD_ENET_RX_ER__SPDIF_IN 0x1f4 0x5c4 0x8f0 0x3 0x1 #define MX6QDL_PAD_ENET_RX_ER__SPDIF_IN 0x1f4 0x5c4 0x8f0 0x3 0x1
#define MX6QDL_PAD_ENET_RX_ER__ENET_1588_EVENT2_OUT 0x1f4 0x5c4 0x000 0x4 0x0 #define MX6QDL_PAD_ENET_RX_ER__ENET_1588_EVENT2_OUT 0x1f4 0x5c4 0x000 0x4 0x0
#define MX6QDL_PAD_ENET_RX_ER__GPIO1_IO24 0x1f4 0x5c4 0x000 0x5 0x0 #define MX6QDL_PAD_ENET_RX_ER__GPIO1_IO24 0x1f4 0x5c4 0x000 0x5 0x0
#define MX6QDL_PAD_ENET_RXD0__OSC32K_32K_OUT 0x1f8 0x5c8 0x000 0x0 0x0
#define MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0 0x1f8 0x5c8 0x818 0x1 0x0 #define MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0 0x1f8 0x5c8 0x818 0x1 0x0
#define MX6QDL_PAD_ENET_RXD0__ESAI_TX_HF_CLK 0x1f8 0x5c8 0x838 0x2 0x0 #define MX6QDL_PAD_ENET_RXD0__ESAI_TX_HF_CLK 0x1f8 0x5c8 0x838 0x2 0x0
#define MX6QDL_PAD_ENET_RXD0__SPDIF_OUT 0x1f8 0x5c8 0x000 0x3 0x0 #define MX6QDL_PAD_ENET_RXD0__SPDIF_OUT 0x1f8 0x5c8 0x000 0x3 0x0
......
/*
* Copyright 2015 Technologic Systems
* Copyright 2017 Savoir-faire Linux
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
/dts-v1/;
#include "imx6dl.dtsi"
#include "imx6qdl-ts7970.dtsi"
/ {
model = "Technologic Systems i.MX6 Solo/DualLite TS-7970 (Default Device Tree)";
compatible = "technologic,imx6dl-ts7970", "fsl,imx6dl";
};
...@@ -170,7 +170,7 @@ &gpio7 { ...@@ -170,7 +170,7 @@ &gpio7 {
}; };
&gpr { &gpr {
ipu1_csi0_mux: ipu1_csi0_mux@34 { ipu1_csi0_mux {
compatible = "video-mux"; compatible = "video-mux";
mux-controls = <&mux 0>; mux-controls = <&mux 0>;
#address-cells = <1>; #address-cells = <1>;
...@@ -224,7 +224,7 @@ ipu1_csi0_mux_to_ipu1_csi0: endpoint { ...@@ -224,7 +224,7 @@ ipu1_csi0_mux_to_ipu1_csi0: endpoint {
}; };
}; };
ipu1_csi1_mux: ipu1_csi1_mux@34 { ipu1_csi1_mux {
compatible = "video-mux"; compatible = "video-mux";
mux-controls = <&mux 1>; mux-controls = <&mux 1>;
#address-cells = <1>; #address-cells = <1>;
...@@ -309,10 +309,12 @@ port@1 { ...@@ -309,10 +309,12 @@ port@1 {
#size-cells = <0>; #size-cells = <0>;
mipi_vc0_to_ipu1_csi0_mux: endpoint@0 { mipi_vc0_to_ipu1_csi0_mux: endpoint@0 {
reg = <0>;
remote-endpoint = <&ipu1_csi0_mux_from_mipi_vc0>; remote-endpoint = <&ipu1_csi0_mux_from_mipi_vc0>;
}; };
mipi_vc0_to_ipu1_csi1_mux: endpoint@1 { mipi_vc0_to_ipu1_csi1_mux: endpoint@1 {
reg = <1>;
remote-endpoint = <&ipu1_csi1_mux_from_mipi_vc0>; remote-endpoint = <&ipu1_csi1_mux_from_mipi_vc0>;
}; };
}; };
...@@ -323,10 +325,12 @@ port@2 { ...@@ -323,10 +325,12 @@ port@2 {
#size-cells = <0>; #size-cells = <0>;
mipi_vc1_to_ipu1_csi0_mux: endpoint@0 { mipi_vc1_to_ipu1_csi0_mux: endpoint@0 {
reg = <0>;
remote-endpoint = <&ipu1_csi0_mux_from_mipi_vc1>; remote-endpoint = <&ipu1_csi0_mux_from_mipi_vc1>;
}; };
mipi_vc1_to_ipu1_csi1_mux: endpoint@1 { mipi_vc1_to_ipu1_csi1_mux: endpoint@1 {
reg = <1>;
remote-endpoint = <&ipu1_csi1_mux_from_mipi_vc1>; remote-endpoint = <&ipu1_csi1_mux_from_mipi_vc1>;
}; };
}; };
...@@ -337,10 +341,12 @@ port@3 { ...@@ -337,10 +341,12 @@ port@3 {
#size-cells = <0>; #size-cells = <0>;
mipi_vc2_to_ipu1_csi0_mux: endpoint@0 { mipi_vc2_to_ipu1_csi0_mux: endpoint@0 {
reg = <0>;
remote-endpoint = <&ipu1_csi0_mux_from_mipi_vc2>; remote-endpoint = <&ipu1_csi0_mux_from_mipi_vc2>;
}; };
mipi_vc2_to_ipu1_csi1_mux: endpoint@1 { mipi_vc2_to_ipu1_csi1_mux: endpoint@1 {
reg = <1>;
remote-endpoint = <&ipu1_csi1_mux_from_mipi_vc2>; remote-endpoint = <&ipu1_csi1_mux_from_mipi_vc2>;
}; };
}; };
...@@ -351,10 +357,12 @@ port@4 { ...@@ -351,10 +357,12 @@ port@4 {
#size-cells = <0>; #size-cells = <0>;
mipi_vc3_to_ipu1_csi0_mux: endpoint@0 { mipi_vc3_to_ipu1_csi0_mux: endpoint@0 {
reg = <0>;
remote-endpoint = <&ipu1_csi0_mux_from_mipi_vc3>; remote-endpoint = <&ipu1_csi0_mux_from_mipi_vc3>;
}; };
mipi_vc3_to_ipu1_csi1_mux: endpoint@1 { mipi_vc3_to_ipu1_csi1_mux: endpoint@1 {
reg = <1>;
remote-endpoint = <&ipu1_csi1_mux_from_mipi_vc3>; remote-endpoint = <&ipu1_csi1_mux_from_mipi_vc3>;
}; };
}; };
......
...@@ -158,7 +158,7 @@ pcie-switch@58 { ...@@ -158,7 +158,7 @@ pcie-switch@58 {
/* M41T0M6 real time clock on carrier board */ /* M41T0M6 real time clock on carrier board */
rtc_i2c: rtc@68 { rtc_i2c: rtc@68 {
compatible = "st,m41t00"; compatible = "st,m41t0";
reg = <0x68>; reg = <0x68>;
}; };
}; };
......
...@@ -170,7 +170,7 @@ &i2c1 { ...@@ -170,7 +170,7 @@ &i2c1 {
/* M41T0M6 real time clock on carrier board */ /* M41T0M6 real time clock on carrier board */
rtc_i2c: rtc@68 { rtc_i2c: rtc@68 {
compatible = "st,m41t00"; compatible = "st,m41t0";
reg = <0x68>; reg = <0x68>;
}; };
}; };
......
...@@ -174,7 +174,7 @@ eeprom@50 { ...@@ -174,7 +174,7 @@ eeprom@50 {
/* M41T0M6 real time clock on carrier board */ /* M41T0M6 real time clock on carrier board */
rtc_i2c: rtc@68 { rtc_i2c: rtc@68 {
compatible = "st,m41t00"; compatible = "st,m41t0";
reg = <0x68>; reg = <0x68>;
}; };
}; };
......
/*
* Copyright (C) 2014 Russell King
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
/dts-v1/;
#include "imx6q.dtsi"
#include "imx6qdl-sr-som.dtsi"
#include "imx6qdl-sr-som-ti.dtsi"
#include "imx6qdl-sr-som-emmc.dtsi"
#include "imx6qdl-cubox-i.dtsi"
/ {
model = "SolidRun Cubox-i Dual/Quad (1.5som+emmc)";
compatible = "solidrun,cubox-i/q", "fsl,imx6q";
};
&sata {
status = "okay";
fsl,transmit-level-mV = <1104>;
fsl,transmit-boost-mdB = <0>;
fsl,transmit-atten-16ths = <9>;
fsl,no-spread-spectrum;
};
/*
* Copyright (C) 2014 Russell King
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
/dts-v1/;
#include "imx6q.dtsi"
#include "imx6qdl-sr-som.dtsi"
#include "imx6qdl-sr-som-ti.dtsi"
#include "imx6qdl-cubox-i.dtsi"
/ {
model = "SolidRun Cubox-i Dual/Quad (1.5som)";
compatible = "solidrun,cubox-i/q", "fsl,imx6q";
};
&sata {
status = "okay";
fsl,transmit-level-mV = <1104>;
fsl,transmit-boost-mdB = <0>;
fsl,transmit-atten-16ths = <9>;
fsl,no-spread-spectrum;
};
...@@ -41,6 +41,8 @@ ...@@ -41,6 +41,8 @@
/dts-v1/; /dts-v1/;
#include "imx6q.dtsi" #include "imx6q.dtsi"
#include "imx6qdl-sr-som.dtsi"
#include "imx6qdl-sr-som-brcm.dtsi"
#include "imx6qdl-cubox-i.dtsi" #include "imx6qdl-cubox-i.dtsi"
/ { / {
......
...@@ -255,7 +255,7 @@ &i2c1 { ...@@ -255,7 +255,7 @@ &i2c1 {
pinctrl-0 = <&pinctrl_i2c1>; pinctrl-0 = <&pinctrl_i2c1>;
status = "okay"; status = "okay";
codec: tfa9879@6C { codec: tfa9879@6c {
#sound-dai-cells = <0>; #sound-dai-cells = <0>;
compatible = "nxp,tfa9879"; compatible = "nxp,tfa9879";
reg = <0x6C>; reg = <0x6C>;
......
...@@ -42,8 +42,8 @@ ...@@ -42,8 +42,8 @@
/dts-v1/; /dts-v1/;
#include "imx6q.dtsi" #include "imx6q.dtsi"
#include "imx6qdl-microsom.dtsi" #include "imx6qdl-sr-som.dtsi"
#include "imx6qdl-microsom-ar8035.dtsi" #include "imx6qdl-sr-som-brcm.dtsi"
/ { / {
model = "Auvidea H100"; model = "Auvidea H100";
...@@ -108,21 +108,6 @@ reg_hdmi: regulator-hdmi { ...@@ -108,21 +108,6 @@ reg_hdmi: regulator-hdmi {
regulator-always-on; regulator-always-on;
}; };
reg_nvcc_sd2: regulator-nvcc-sd2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_h100_reg_nvcc_sd2>;
compatible = "regulator-gpio";
regulator-name = "NVCC_SD2";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-type = "voltage";
regulator-boot-on;
regulator-always-on;
gpios = <&gpio4 9 GPIO_ACTIVE_HIGH>;
states = <1800000 0x1
3300000 0x0>;
};
reg_usbh1_vbus: regulator-usb-h1-vbus { reg_usbh1_vbus: regulator-usb-h1-vbus {
compatible = "regulator-fixed"; compatible = "regulator-fixed";
enable-active-high; enable-active-high;
...@@ -205,7 +190,7 @@ tc358743: tc358743@f { ...@@ -205,7 +190,7 @@ tc358743: tc358743@f {
reset-gpios = <&gpio6 15 GPIO_ACTIVE_LOW>; reset-gpios = <&gpio6 15 GPIO_ACTIVE_LOW>;
/* IRQ has a wrong pull resistor which renders it useless */ /* IRQ has a wrong pull resistor which renders it useless */
port@0 { port {
tc358743_out: endpoint { tc358743_out: endpoint {
remote-endpoint = <&mipi_csi2_in>; remote-endpoint = <&mipi_csi2_in>;
data-lanes = <1 2 3 4>; data-lanes = <1 2 3 4>;
...@@ -260,12 +245,6 @@ MX6QDL_PAD_EIM_A18__GPIO2_IO20 0x1b0b0 ...@@ -260,12 +245,6 @@ MX6QDL_PAD_EIM_A18__GPIO2_IO20 0x1b0b0
>; >;
}; };
pinctrl_h100_reg_nvcc_sd2: h100-reg-nvcc-sd2 {
fsl,pins = <
MX6QDL_PAD_KEY_ROW1__GPIO4_IO09 0x1b0b0
>;
};
pinctrl_h100_sgtl5000: h100-sgtl5000 { pinctrl_h100_sgtl5000: h100-sgtl5000 {
fsl,pins = < fsl,pins = <
MX6QDL_PAD_DISP0_DAT19__AUD5_RXD 0x130b0 MX6QDL_PAD_DISP0_DAT19__AUD5_RXD 0x130b0
...@@ -316,6 +295,7 @@ MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059 ...@@ -316,6 +295,7 @@ MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x13059 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x13059
MX6QDL_PAD_KEY_ROW1__SD2_VSELECT 0x1b0b0
>; >;
}; };
...@@ -328,6 +308,7 @@ MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x170b9 ...@@ -328,6 +308,7 @@ MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x170b9
MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x170b9 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x170b9
MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x170b9 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x170b9
MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x170b9 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x170b9
MX6QDL_PAD_KEY_ROW1__SD2_VSELECT 0x1b0b0
>; >;
}; };
...@@ -340,6 +321,7 @@ MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x170f9 ...@@ -340,6 +321,7 @@ MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x170f9
MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x170f9 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x170f9
MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x170f9 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x170f9
MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x170f9 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x170f9
MX6QDL_PAD_KEY_ROW1__SD2_VSELECT 0x1b0b0
>; >;
}; };
}; };
...@@ -348,7 +330,7 @@ MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x170f9 ...@@ -348,7 +330,7 @@ MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x170f9
&mipi_csi { &mipi_csi {
status = "okay"; status = "okay";
port@0 { port {
mipi_csi2_in: endpoint { mipi_csi2_in: endpoint {
remote-endpoint = <&tc358743_out>; remote-endpoint = <&tc358743_out>;
data-lanes = <1 2 3 4>; data-lanes = <1 2 3 4>;
...@@ -389,7 +371,6 @@ &usdhc2 { ...@@ -389,7 +371,6 @@ &usdhc2 {
pinctrl-1 = <&pinctrl_h100_usdhc2_100mhz>; pinctrl-1 = <&pinctrl_h100_usdhc2_100mhz>;
pinctrl-2 = <&pinctrl_h100_usdhc2_200mhz>; pinctrl-2 = <&pinctrl_h100_usdhc2_200mhz>;
vmmc-supply = <&reg_3p3v>; vmmc-supply = <&reg_3p3v>;
vqmmc-supply = <&reg_nvcc_sd2>;
cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
status = "okay"; status = "okay";
}; };
/*
* Copyright (C) 2014 Rabeeh Khoury (rabeeh@solid-run.com)
* Based on dt work by Russell King
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
/dts-v1/;
#include "imx6q.dtsi"
#include "imx6qdl-sr-som.dtsi"
#include "imx6qdl-sr-som-ti.dtsi"
#include "imx6qdl-sr-som-emmc.dtsi"
#include "imx6qdl-hummingboard.dtsi"
/ {
model = "SolidRun HummingBoard Dual/Quad (1.5som+emmc)";
compatible = "solidrun,hummingboard/q", "fsl,imx6q";
};
&sata {
status = "okay";
fsl,transmit-level-mV = <1025>;
fsl,transmit-boost-mdB = <3330>;
fsl,transmit-atten-16ths = <9>;
fsl,receive-eq-mdB = <3000>;
};
/*
* Copyright (C) 2014 Rabeeh Khoury (rabeeh@solid-run.com)
* Based on dt work by Russell King
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
/dts-v1/;
#include "imx6q.dtsi"
#include "imx6qdl-sr-som.dtsi"
#include "imx6qdl-sr-som-ti.dtsi"
#include "imx6qdl-hummingboard.dtsi"
/ {
model = "SolidRun HummingBoard Dual/Quad (1.5som)";
compatible = "solidrun,hummingboard/q", "fsl,imx6q";
};
&sata {
status = "okay";
fsl,transmit-level-mV = <1025>;
fsl,transmit-boost-mdB = <3330>;
fsl,transmit-atten-16ths = <9>;
fsl,receive-eq-mdB = <3000>;
};
...@@ -42,6 +42,8 @@ ...@@ -42,6 +42,8 @@
/dts-v1/; /dts-v1/;
#include "imx6q.dtsi" #include "imx6q.dtsi"
#include "imx6qdl-sr-som.dtsi"
#include "imx6qdl-sr-som-brcm.dtsi"
#include "imx6qdl-hummingboard.dtsi" #include "imx6qdl-hummingboard.dtsi"
/ { / {
......
/*
* Device Tree file for SolidRun HummingBoard2
* Copyright (C) 2015 Rabeeh Khoury <rabeeh@solid-run.com>
* Based on work by Russell King
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License.
*
* This file is distributed in the hope that it will be useful
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
/dts-v1/;
#include "imx6q.dtsi"
#include "imx6qdl-sr-som.dtsi"
#include "imx6qdl-sr-som-emmc.dtsi"
#include "imx6qdl-sr-som-ti.dtsi"
#include "imx6qdl-hummingboard2.dtsi"
/ {
model = "SolidRun HummingBoard2 Dual/Quad (1.5som+emmc)";
compatible = "solidrun,hummingboard2/q", "fsl,imx6q";
};
&sata {
status = "okay";
fsl,transmit-level-mV = <1104>;
fsl,transmit-boost-mdB = <0>;
fsl,transmit-atten-16ths = <9>;
fsl,no-spread-spectrum;
};
/*
* Device Tree file for SolidRun HummingBoard2
* Copyright (C) 2015 Rabeeh Khoury <rabeeh@solid-run.com>
* Based on work by Russell King
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License.
*
* This file is distributed in the hope that it will be useful
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
/dts-v1/;
#include "imx6q.dtsi"
#include "imx6qdl-sr-som.dtsi"
#include "imx6qdl-sr-som-ti.dtsi"
#include "imx6qdl-hummingboard2.dtsi"
/ {
model = "SolidRun HummingBoard2 Dual/Quad (1.5som)";
compatible = "solidrun,hummingboard2/q", "fsl,imx6q";
};
&sata {
status = "okay";
fsl,transmit-level-mV = <1104>;
fsl,transmit-boost-mdB = <0>;
fsl,transmit-atten-16ths = <9>;
fsl,no-spread-spectrum;
};
/*
* Copyright (C) 2015 Rabeeh Khoury <rabeeh@solid-run.com>
* Based on dt work by Russell King
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
/dts-v1/;
#include "imx6q.dtsi"
#include "imx6qdl-sr-som.dtsi"
#include "imx6qdl-sr-som-brcm.dtsi"
#include "imx6qdl-hummingboard2.dtsi"
#include "imx6qdl-hummingboard2-emmc.dtsi"
/ {
model = "SolidRun HummingBoard2 Dual/Quad";
compatible = "solidrun,hummingboard2/q", "fsl,imx6q";
};
&sata {
status = "okay";
fsl,transmit-level-mV = <1104>;
fsl,transmit-boost-mdB = <0>;
fsl,transmit-atten-16ths = <9>;
fsl,no-spread-spectrum;
};
...@@ -551,6 +551,7 @@ ...@@ -551,6 +551,7 @@
#define MX6QDL_PAD_ENET_RXD1__ESAI_TX_FS 0x1e0 0x4f4 0x860 0x2 0x0 #define MX6QDL_PAD_ENET_RXD1__ESAI_TX_FS 0x1e0 0x4f4 0x860 0x2 0x0
#define MX6QDL_PAD_ENET_RXD1__ENET_1588_EVENT3_OUT 0x1e0 0x4f4 0x000 0x4 0x0 #define MX6QDL_PAD_ENET_RXD1__ENET_1588_EVENT3_OUT 0x1e0 0x4f4 0x000 0x4 0x0
#define MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x1e0 0x4f4 0x000 0x5 0x0 #define MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x1e0 0x4f4 0x000 0x5 0x0
#define MX6QDL_PAD_ENET_RXD0__OSC32K_32K_OUT 0x1e4 0x4f8 0x000 0x0 0x0
#define MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0 0x1e4 0x4f8 0x848 0x1 0x1 #define MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0 0x1e4 0x4f8 0x848 0x1 0x1
#define MX6QDL_PAD_ENET_RXD0__ESAI_TX_HF_CLK 0x1e4 0x4f8 0x868 0x2 0x0 #define MX6QDL_PAD_ENET_RXD0__ESAI_TX_HF_CLK 0x1e4 0x4f8 0x868 0x2 0x0
#define MX6QDL_PAD_ENET_RXD0__SPDIF_OUT 0x1e4 0x4f8 0x000 0x3 0x0 #define MX6QDL_PAD_ENET_RXD0__SPDIF_OUT 0x1e4 0x4f8 0x000 0x3 0x0
......
/*
* Copyright 2015 Technologic Systems
* Copyright 2017 Savoir-faire Linux
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
/dts-v1/;
#include "imx6q.dtsi"
#include "imx6qdl-ts7970.dtsi"
/ {
model = "Technologic Systems i.MX6 Quad TS-7970 (Default Device Tree)";
compatible = "technologic,imx6q-ts7970", "fsl,imx6q";
};
&sata {
status = "okay";
};
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Support for Variscite DART-MX6 Carrier-board
*
* Copyright 2017 BayLibre, SAS
* Author: Neil Armstrong <narmstrong@baylibre.com>
*/
/dts-v1/;
#include "imx6q.dtsi"
#include "imx6qdl-var-dart.dtsi"
#include <dt-bindings/input/linux-event-codes.h>
/ {
model = "Variscite DART-MX6 Carrier-board";
compatible = "variscite,dt6customboard", "fsl,imx6q";
backlight_lvds: backlight {
compatible = "pwm-backlight";
pwms = <&pwm2 0 50000>;
brightness-levels = <0 4 8 16 32 64 128 248>;
default-brightness-level = <7>;
status = "okay";
};
gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
autorepeat;
back {
gpios = <&gpio4 26 GPIO_ACTIVE_LOW>;
linux,code = <KEY_BACK>;
label = "Key Back";
linux,input-type = <1>;
debounce-interval = <100>;
wakeup-source;
};
home {
gpios = <&gpio5 11 GPIO_ACTIVE_LOW>;
linux,code = <KEY_HOME>;
label = "Key Home";
linux,input-type = <1>;
debounce-interval = <100>;
wakeup-source;
};
menu {
gpios = <&gpio4 25 GPIO_ACTIVE_LOW>;
linux,code = <KEY_MENU>;
label = "Key Menu";
linux,input-type = <1>;
debounce-interval = <100>;
wakeup-source;
};
};
gpio-leds {
compatible = "gpio-leds";
led1 {
gpios = <&gpio4 27 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
};
led2 {
gpios = <&gpio4 28 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "default-on";
};
};
panel1: lvds-panel {
compatible = "sgd,gktw70sdae4se", "panel-lvds";
backlight = <&backlight_lvds>;
width-mm = <153>;
height-mm = <86>;
label = "gktw70sdae4se";
data-mapping = "jeida-18";
panel-timing {
clock-frequency = <32000000>;
hactive = <800>;
vactive = <480>;
hback-porch = <39>;
hfront-porch = <39>;
vback-porch = <29>;
vfront-porch = <13>;
hsync-len = <47>;
vsync-len = <2>;
};
port {
panel_in: endpoint {
remote-endpoint = <&lvds1_out>;
};
};
};
reg_usb_h1_vbus: regulator-usbh1vbus {
compatible = "regulator-fixed";
regulator-name = "usb_h1_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio1 28 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
reg_usb_otg_vbus: regulator-usbotgvbus {
compatible = "regulator-fixed";
regulator-name = "usb_otg_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio4 15 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
sound {
compatible = "simple-audio-card";
simple-audio-card,name = "dt6-customboard-audio";
simple-audio-card,format = "i2s";
simple-audio-card,bitclock-master = <&sound_codec>;
simple-audio-card,frame-master = <&sound_codec>;
simple-audio-card,widgets = "Headphone", "Headphone Jack",
"Line", "Line In";
simple-audio-card,routing = "Headphone Jack", "HPLOUT",
"Headphone Jack", "HPROUT",
"LINE1L", "Line In",
"LINE1R", "Line In";
sound_cpu: simple-audio-card,cpu {
sound-dai = <&ssi2>;
};
sound_codec: simple-audio-card,codec {
sound-dai = <&tlv320aic3106>;
clocks = <&clks IMX6QDL_CLK_CKO>;
};
};
};
&can1 {
status = "okay";
};
&ecspi1 {
cs-gpios = <&gpio4 9 GPIO_ACTIVE_HIGH>,
<&gpio4 10 GPIO_ACTIVE_HIGH>;
status = "okay";
};
&fec {
status = "okay";
phy-mode = "rgmii";
phy-reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
};
&hdmi {
status = "okay";
};
&i2c1 {
clock-frequency = <100000>;
status = "okay";
};
&i2c3 {
clock-frequency = <100000>;
status = "okay";
touchscreen@38 {
compatible = "edt,edt-ft5x06";
reg = <0x38>;
interrupt-parent = <&gpio1>;
interrupts = <4 IRQ_TYPE_EDGE_FALLING>;
touchscreen-size-x = <800>;
touchscreen-size-y = <480>;
touchscreen-inverted-x;
touchscreen-inverted-y;
};
rtc@68 {
compatible = "isil,isl12057";
reg = <0x68>;
};
};
&ldb {
status = "okay";
lvds-channel@1 {
status = "okay";
port@4 {
reg = <4>;
lvds1_out: endpoint {
remote-endpoint = <&panel_in>;
};
};
};
};
&pwm2 {
status = "okay";
};
&uart1 {
status = "okay";
};
&uart3 {
status = "okay";
};
&usbh1 {
vbus-supply = <&reg_usb_h1_vbus>;
status = "okay";
};
&usbotg {
vbus-supply = <&reg_usb_otg_vbus>;
dr_mode = "otg";
srp-disable;
hnp-disable;
adp-disable;
status = "okay";
};
&usdhc2 {
cd-gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
status = "okay";
};
...@@ -338,7 +338,6 @@ stmpe811@41 { ...@@ -338,7 +338,6 @@ stmpe811@41 {
stmpe_touchscreen { stmpe_touchscreen {
compatible = "st,stmpe-ts"; compatible = "st,stmpe-ts";
reg = <0>;
/* 3.25 MHz ADC clock speed */ /* 3.25 MHz ADC clock speed */
st,adc-freq = <1>; st,adc-freq = <1>;
/* 8 sample average control */ /* 8 sample average control */
......
...@@ -111,10 +111,7 @@ user-led { ...@@ -111,10 +111,7 @@ user-led {
}; };
}; };
regulators { reg_3p3v: regulator-3p3v {
compatible = "simple-bus";
reg_3p3v: 3p3v {
compatible = "regulator-fixed"; compatible = "regulator-fixed";
regulator-name = "3P3V"; regulator-name = "3P3V";
regulator-min-microvolt = <3300000>; regulator-min-microvolt = <3300000>;
...@@ -122,7 +119,7 @@ reg_3p3v: 3p3v { ...@@ -122,7 +119,7 @@ reg_3p3v: 3p3v {
regulator-always-on; regulator-always-on;
}; };
reg_usbh1_vbus: usb-h1-vbus { reg_usbh1_vbus: regulator-usb-h1-vbus {
compatible = "regulator-fixed"; compatible = "regulator-fixed";
regulator-name = "usb_h1_vbus"; regulator-name = "usb_h1_vbus";
regulator-min-microvolt = <5000000>; regulator-min-microvolt = <5000000>;
...@@ -130,14 +127,13 @@ reg_usbh1_vbus: usb-h1-vbus { ...@@ -130,14 +127,13 @@ reg_usbh1_vbus: usb-h1-vbus {
regulator-always-on; regulator-always-on;
}; };
reg_usb_otg_vbus: usb-otg-vbus { reg_usb_otg_vbus: regulator-usb-otg-vbus {
compatible = "regulator-fixed"; compatible = "regulator-fixed";
regulator-name = "usb_otg_vbus"; regulator-name = "usb_otg_vbus";
regulator-min-microvolt = <5000000>; regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>; regulator-max-microvolt = <5000000>;
regulator-always-on; regulator-always-on;
}; };
};
sound { sound {
compatible = "fsl,imx6-armadeus-sgtl5000", compatible = "fsl,imx6-armadeus-sgtl5000",
......
...@@ -12,12 +12,8 @@ ...@@ -12,12 +12,8 @@
#include <dt-bindings/gpio/gpio.h> #include <dt-bindings/gpio/gpio.h>
/ { / {
regulators {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
reg_2p5v: regulator@0 { reg_2p5v: regulator-2p5v {
compatible = "regulator-fixed"; compatible = "regulator-fixed";
regulator-name = "2P5V"; regulator-name = "2P5V";
regulator-min-microvolt = <2500000>; regulator-min-microvolt = <2500000>;
...@@ -25,7 +21,7 @@ reg_2p5v: regulator@0 { ...@@ -25,7 +21,7 @@ reg_2p5v: regulator@0 {
regulator-always-on; regulator-always-on;
}; };
reg_3p3v: regulator@1 { reg_3p3v: regulator-3p3v {
compatible = "regulator-fixed"; compatible = "regulator-fixed";
regulator-name = "3P3V"; regulator-name = "3P3V";
regulator-min-microvolt = <3300000>; regulator-min-microvolt = <3300000>;
...@@ -33,7 +29,7 @@ reg_3p3v: regulator@1 { ...@@ -33,7 +29,7 @@ reg_3p3v: regulator@1 {
regulator-always-on; regulator-always-on;
}; };
reg_usbh1_vbus: regulator@2 { reg_usbh1_vbus: regulator-usbh1-vbus {
compatible = "regulator-fixed"; compatible = "regulator-fixed";
enable-active-high; enable-active-high;
gpio = <&gpio3 31 GPIO_ACTIVE_HIGH>; gpio = <&gpio3 31 GPIO_ACTIVE_HIGH>;
...@@ -44,7 +40,7 @@ reg_usbh1_vbus: regulator@2 { ...@@ -44,7 +40,7 @@ reg_usbh1_vbus: regulator@2 {
regulator-max-microvolt = <5000000>; regulator-max-microvolt = <5000000>;
}; };
reg_usbotg_vbus: regulator@3 { reg_usbotg_vbus: regulator-usbotg-vbus {
compatible = "regulator-fixed"; compatible = "regulator-fixed";
enable-active-high; enable-active-high;
gpio = <&gpio4 15 GPIO_ACTIVE_HIGH>; gpio = <&gpio4 15 GPIO_ACTIVE_HIGH>;
...@@ -54,7 +50,6 @@ reg_usbotg_vbus: regulator@3 { ...@@ -54,7 +50,6 @@ reg_usbotg_vbus: regulator@3 {
regulator-min-microvolt = <5000000>; regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>; regulator-max-microvolt = <5000000>;
}; };
};
}; };
&audmux { &audmux {
......
...@@ -52,10 +52,7 @@ backlight: backlight { ...@@ -52,10 +52,7 @@ backlight: backlight {
enable-gpios = <&gpio6 31 GPIO_ACTIVE_HIGH>; enable-gpios = <&gpio6 31 GPIO_ACTIVE_HIGH>;
}; };
regulators { reg_2p5v: regulator-2p5v {
compatible = "simple-bus";
reg_2p5v: 2p5v {
compatible = "regulator-fixed"; compatible = "regulator-fixed";
regulator-name = "2P5V"; regulator-name = "2P5V";
regulator-min-microvolt = <2500000>; regulator-min-microvolt = <2500000>;
...@@ -63,7 +60,7 @@ reg_2p5v: 2p5v { ...@@ -63,7 +60,7 @@ reg_2p5v: 2p5v {
regulator-always-on; regulator-always-on;
}; };
reg_3p3v: 3p3v { reg_3p3v: regulator-3p3v {
compatible = "regulator-fixed"; compatible = "regulator-fixed";
regulator-name = "3P3V"; regulator-name = "3P3V";
regulator-min-microvolt = <3300000>; regulator-min-microvolt = <3300000>;
...@@ -71,7 +68,7 @@ reg_3p3v: 3p3v { ...@@ -71,7 +68,7 @@ reg_3p3v: 3p3v {
regulator-always-on; regulator-always-on;
}; };
reg_usbh1_vbus: usb-h1-vbus { reg_usbh1_vbus: regulator-usbh1-vbus {
compatible = "regulator-fixed"; compatible = "regulator-fixed";
enable-active-high; enable-active-high;
gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>; gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>;
...@@ -82,7 +79,7 @@ reg_usbh1_vbus: usb-h1-vbus { ...@@ -82,7 +79,7 @@ reg_usbh1_vbus: usb-h1-vbus {
regulator-max-microvolt = <5000000>; regulator-max-microvolt = <5000000>;
}; };
reg_usbotg_vbus: usb-otg-vbus { reg_usbotg_vbus: regulator-usbotg-vbus {
compatible = "regulator-fixed"; compatible = "regulator-fixed";
enable-active-high; enable-active-high;
gpio = <&gpio4 15 GPIO_ACTIVE_HIGH>; gpio = <&gpio4 15 GPIO_ACTIVE_HIGH>;
...@@ -92,7 +89,6 @@ reg_usbotg_vbus: usb-otg-vbus { ...@@ -92,7 +89,6 @@ reg_usbotg_vbus: usb-otg-vbus {
regulator-min-microvolt = <5000000>; regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>; regulator-max-microvolt = <5000000>;
}; };
};
}; };
&audmux { &audmux {
......
...@@ -274,7 +274,6 @@ stmpe811@41 { ...@@ -274,7 +274,6 @@ stmpe811@41 {
stmpe_touchscreen { stmpe_touchscreen {
compatible = "st,stmpe-ts"; compatible = "st,stmpe-ts";
reg = <0>;
/* 3.25 MHz ADC clock speed */ /* 3.25 MHz ADC clock speed */
st,adc-freq = <1>; st,adc-freq = <1>;
/* 8 sample average control */ /* 8 sample average control */
......
...@@ -38,8 +38,6 @@ ...@@ -38,8 +38,6 @@
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE. * OTHER DEALINGS IN THE SOFTWARE.
*/ */
#include "imx6qdl-microsom.dtsi"
#include "imx6qdl-microsom-ar8035.dtsi"
#include <dt-bindings/input/input.h> #include <dt-bindings/input/input.h>
#include <dt-bindings/gpio/gpio.h> #include <dt-bindings/gpio/gpio.h>
...@@ -64,38 +62,36 @@ front { ...@@ -64,38 +62,36 @@ front {
}; };
}; };
regulators { v_5v0: regulator-v-5v0 {
compatible = "simple-bus";
reg_3p3v: 3p3v {
compatible = "regulator-fixed"; compatible = "regulator-fixed";
regulator-name = "3P3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on; regulator-always-on;
regulator-max-microvolt = <5000000>;
regulator-min-microvolt = <5000000>;
regulator-name = "v_5v0";
}; };
reg_usbh1_vbus: usb-h1-vbus { v_usb2: regulator-v-usb2 {
compatible = "regulator-fixed"; compatible = "regulator-fixed";
enable-active-high; enable-active-high;
gpio = <&gpio1 0 0>; gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_cubox_i_usbh1_vbus>; pinctrl-0 = <&pinctrl_cubox_i_usbh1_vbus>;
regulator-name = "usb_h1_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>; regulator-max-microvolt = <5000000>;
regulator-min-microvolt = <5000000>;
regulator-name = "v_usb2";
vin-supply = <&v_5v0>;
}; };
reg_usbotg_vbus: usb-otg-vbus { v_usb1: regulator-v-usb1 {
compatible = "regulator-fixed"; compatible = "regulator-fixed";
enable-active-high; enable-active-high;
gpio = <&gpio3 22 0>; gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_cubox_i_usbotg_vbus>; pinctrl-0 = <&pinctrl_cubox_i_usbotg_vbus>;
regulator-name = "usb_otg_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>; regulator-max-microvolt = <5000000>;
}; regulator-min-microvolt = <5000000>;
regulator-name = "v_usb1";
vin-supply = <&v_5v0>;
}; };
sound-spdif { sound-spdif {
...@@ -139,7 +135,7 @@ &i2c3 { ...@@ -139,7 +135,7 @@ &i2c3 {
status = "okay"; status = "okay";
rtc: pcf8523@68 { rtc@68 {
compatible = "nxp,pcf8523"; compatible = "nxp,pcf8523";
reg = <0x68>; reg = <0x68>;
}; };
...@@ -243,21 +239,25 @@ &spdif { ...@@ -243,21 +239,25 @@ &spdif {
&usbh1 { &usbh1 {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_cubox_i_usbh1>; pinctrl-0 = <&pinctrl_cubox_i_usbh1>;
vbus-supply = <&reg_usbh1_vbus>; vbus-supply = <&v_usb2>;
status = "okay"; status = "okay";
}; };
&usbotg { &usbotg {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_cubox_i_usbotg>; pinctrl-0 = <&pinctrl_cubox_i_usbotg>;
vbus-supply = <&reg_usbotg_vbus>; vbus-supply = <&v_usb1>;
status = "okay"; status = "okay";
}; };
&usdhc2 { &usdhc2 {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_cubox_i_usdhc2_aux &pinctrl_cubox_i_usdhc2>; pinctrl-0 = <&pinctrl_cubox_i_usdhc2_aux &pinctrl_cubox_i_usdhc2>;
vmmc-supply = <&reg_3p3v>; vmmc-supply = <&vcc_3v3>;
cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
status = "okay"; status = "okay";
}; };
&vcc_3v3 {
vin-supply = <&v_5v0>;
};
...@@ -38,8 +38,6 @@ ...@@ -38,8 +38,6 @@
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE. * OTHER DEALINGS IN THE SOFTWARE.
*/ */
#include "imx6qdl-microsom.dtsi"
#include "imx6qdl-microsom-ar8035.dtsi"
/ { / {
chosen { chosen {
...@@ -53,38 +51,58 @@ ir_recv: ir-receiver { ...@@ -53,38 +51,58 @@ ir_recv: ir-receiver {
pinctrl-0 = <&pinctrl_hummingboard_gpio3_5>; pinctrl-0 = <&pinctrl_hummingboard_gpio3_5>;
}; };
regulators { v_3v2: regulator-v-3v2 {
compatible = "simple-bus";
reg_3p3v: 3p3v {
compatible = "regulator-fixed"; compatible = "regulator-fixed";
regulator-name = "3P3V"; regulator-always-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>; regulator-max-microvolt = <3300000>;
regulator-min-microvolt = <3300000>;
regulator-name = "v_3v2";
vin-supply = <&v_5v0>;
};
v_5v0: regulator-v-5v0 {
compatible = "regulator-fixed";
regulator-always-on; regulator-always-on;
regulator-max-microvolt = <5000000>;
regulator-min-microvolt = <5000000>;
regulator-name = "v_5v0";
}; };
reg_usbh1_vbus: usb-h1-vbus { v_sd: regulator-v-sd {
compatible = "regulator-fixed";
gpio = <&gpio4 30 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hummingboard_vmmc>;
regulator-boot-on;
regulator-max-microvolt = <3300000>;
regulator-min-microvolt = <3300000>;
regulator-name = "v_sd";
startup-delay-us = <1000>;
vin-supply = <&v_3v2>;
};
v_usb2: regulator-v-usb2 {
compatible = "regulator-fixed"; compatible = "regulator-fixed";
enable-active-high; enable-active-high;
gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>; gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hummingboard_usbh1_vbus>; pinctrl-0 = <&pinctrl_hummingboard_usbh1_vbus>;
regulator-name = "usb_h1_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>; regulator-max-microvolt = <5000000>;
regulator-min-microvolt = <5000000>;
regulator-name = "v_usb2";
vin-supply = <&v_5v0>;
}; };
reg_usbotg_vbus: usb-otg-vbus { v_usb1: regulator-v-usb1 {
compatible = "regulator-fixed"; compatible = "regulator-fixed";
enable-active-high; enable-active-high;
gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>; gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hummingboard_usbotg_vbus>; pinctrl-0 = <&pinctrl_hummingboard_usbotg_vbus>;
regulator-name = "usb_otg_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>; regulator-max-microvolt = <5000000>;
}; regulator-min-microvolt = <5000000>;
regulator-name = "v_usb1";
vin-supply = <&v_5v0>;
}; };
sound-sgtl5000 { sound-sgtl5000 {
...@@ -132,20 +150,20 @@ &i2c1 { ...@@ -132,20 +150,20 @@ &i2c1 {
status = "okay"; status = "okay";
/* Pro baseboard model */ /* Pro baseboard model */
rtc: pcf8523@68 { rtc@68 {
compatible = "nxp,pcf8523"; compatible = "nxp,pcf8523";
reg = <0x68>; reg = <0x68>;
}; };
/* Pro baseboard model */ /* Pro baseboard model */
sgtl5000: sgtl5000@a { sgtl5000: codec@a {
clocks = <&clks IMX6QDL_CLK_CKO>; clocks = <&clks IMX6QDL_CLK_CKO>;
compatible = "fsl,sgtl5000"; compatible = "fsl,sgtl5000";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hummingboard_sgtl5000>; pinctrl-0 = <&pinctrl_hummingboard_sgtl5000>;
reg = <0x0a>; reg = <0x0a>;
VDDA-supply = <&reg_3p3v>; VDDA-supply = <&v_3v2>;
VDDIO-supply = <&reg_3p3v>; VDDIO-supply = <&v_3v2>;
}; };
}; };
...@@ -247,6 +265,11 @@ MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059 ...@@ -247,6 +265,11 @@ MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x13059 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x13059
>; >;
}; };
pinctrl_hummingboard_vmmc: hummingboard-vmmc {
fsl,pins = <
MX6QDL_PAD_DISP0_DAT9__GPIO4_IO30 0x1b0b0
>;
};
}; };
}; };
...@@ -280,7 +303,7 @@ &ssi1 { ...@@ -280,7 +303,7 @@ &ssi1 {
&usbh1 { &usbh1 {
disable-over-current; disable-over-current;
vbus-supply = <&reg_usbh1_vbus>; vbus-supply = <&v_usb2>;
status = "okay"; status = "okay";
}; };
...@@ -288,7 +311,7 @@ &usbotg { ...@@ -288,7 +311,7 @@ &usbotg {
disable-over-current; disable-over-current;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hummingboard_usbotg_id>; pinctrl-0 = <&pinctrl_hummingboard_usbotg_id>;
vbus-supply = <&reg_usbotg_vbus>; vbus-supply = <&v_usb1>;
status = "okay"; status = "okay";
}; };
...@@ -298,7 +321,11 @@ &usdhc2 { ...@@ -298,7 +321,11 @@ &usdhc2 {
&pinctrl_hummingboard_usdhc2_aux &pinctrl_hummingboard_usdhc2_aux
&pinctrl_hummingboard_usdhc2 &pinctrl_hummingboard_usdhc2
>; >;
vmmc-supply = <&reg_3p3v>; vmmc-supply = <&v_sd>;
cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
status = "okay"; status = "okay";
}; };
&vcc_3v3 {
vin-supply = <&v_3v2>;
};
/*
* Device Tree file for SolidRun HummingBoard2
* Copyright (C) 2015 Rabeeh Khoury <rabeeh@solid-run.com>
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
&iomuxc {
hummingboard2 {
pinctrl_hummingboard2_usdhc3: hummingboard2-usdhc3 {
fsl,pins = <
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059
MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059
MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059
MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059
MX6QDL_PAD_SD3_RST__SD3_RESET 0x17059
>;
};
};
};
&usdhc3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hummingboard2_usdhc3>;
vmmc-supply = <&v_3v2>;
vqmmc-supply = <&v_3v2>;
bus-width = <8>;
non-removable;
status = "okay";
};
/*
* Copyright (C) 2015 Rabeeh Khoury <rabeeh@solid-run.com>
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
/ {
chosen {
stdout-path = &uart1;
};
ir_recv: ir-receiver {
compatible = "gpio-ir-receiver";
gpios = <&gpio7 9 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hummingboard2_gpio7_9>;
linux,rc-map-name = "rc-rc6-mce";
};
v_3v2: regulator-v-3v2 {
compatible = "regulator-fixed";
regulator-always-on;
regulator-max-microvolt = <3300000>;
regulator-min-microvolt = <3300000>;
regulator-name = "v_3v2";
};
v_5v0: regulator-v-5v0 {
compatible = "regulator-fixed";
regulator-always-on;
regulator-max-microvolt = <5000000>;
regulator-min-microvolt = <5000000>;
regulator-name = "v_5v0";
};
vcc_1p8: regulator-vcc-1p8 {
compatible = "regulator-fixed";
regulator-always-on;
regulator-max-microvolt = <1800000>;
regulator-min-microvolt = <1800000>;
regulator-name = "vcc_1p8";
vin-supply = <&v_3v2>;
};
v_sd: regulator-v-sd {
compatible = "regulator-fixed";
gpio = <&gpio4 30 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hummingboard2_vmmc>;
regulator-boot-on;
regulator-max-microvolt = <3300000>;
regulator-min-microvolt = <3300000>;
regulator-name = "v_sd";
startup-delay-us = <1000>;
vin-supply = <&v_3v2>;
};
v_usb1: regulator-v-usb1 {
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hummingboard2_usbotg_vbus>;
regulator-always-on;
regulator-max-microvolt = <5000000>;
regulator-min-microvolt = <5000000>;
regulator-name = "v_usb1";
vin-supply = <&v_5v0>;
};
v_usb2: regulator-v-usb2 {
/* USB hub port 1 */
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hummingboard2_usbh1_vbus>;
regulator-always-on;
regulator-max-microvolt = <5000000>;
regulator-min-microvolt = <5000000>;
regulator-name = "v_usb2";
vin-supply = <&v_5v0>;
};
v_usb3: regulator-v-usb3 {
/* USB hub port 3 */
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio2 13 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hummingboard2_usbh2_vbus>;
regulator-always-on;
regulator-max-microvolt = <5000000>;
regulator-min-microvolt = <5000000>;
regulator-name = "v_usb3";
vin-supply = <&v_5v0>;
};
v_usb4: regulator-v-usb4 {
/* USB hub port 4 */
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio7 10 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hummingboard2_usbh3_vbus>;
regulator-always-on;
regulator-max-microvolt = <5000000>;
regulator-min-microvolt = <5000000>;
regulator-name = "v_usb4";
vin-supply = <&v_5v0>;
};
sound-sgtl5000 {
audio-codec = <&sgtl5000>;
audio-routing =
"MIC_IN", "Mic Jack",
"Mic Jack", "Mic Bias",
"Headphone Jack", "HP_OUT";
compatible = "fsl,imx-audio-sgtl5000";
model = "On-board Codec";
mux-ext-port = <5>;
mux-int-port = <1>;
ssi-controller = <&ssi1>;
};
};
&audmux {
status = "okay";
};
&ecspi2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hummingboard2_ecspi2>;
cs-gpios = <&gpio2 26 0>;
status = "okay";
};
&hdmi {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hummingboard2_hdmi>;
ddc-i2c-bus = <&i2c2>;
status = "okay";
};
&i2c1 {
clock-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hummingboard2_i2c1>;
status = "okay";
pcf8523: rtc@68 {
compatible = "nxp,pcf8523";
reg = <0x68>;
};
sgtl5000: codec@a {
clocks = <&clks IMX6QDL_CLK_CKO>;
compatible = "fsl,sgtl5000";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hummingboard2_sgtl5000>;
reg = <0x0a>;
VDDA-supply = <&v_3v2>;
VDDD-supply = <&vcc_1p8>;
VDDIO-supply = <&v_3v2>;
};
};
&i2c2 {
clock-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hummingboard2_i2c2>;
status = "okay";
};
&i2c3 {
clock-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hummingboard2_i2c3>;
status = "okay";
};
&iomuxc {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hog>;
hummingboard2 {
pinctrl_hog: hoggrp {
fsl,pins = <
/*
* 36 pin headers GPIO description. The pins
* numbering as following -
*
* 3.2v 5v 74 75
* 73 72 71 70
* 69 68 67 66
*
* 77 78 79 76
* 65 64 61 60
* 53 52 51 50
* 49 48 166 132
* 95 94 90 91
* GND 54 24 204
*
* The GPIO numbers can be extracted using
* signal name from below.
* Example -
* MX6QDL_PAD_EIM_DA10__GPIO3_IO10 is
* GPIO(3,10) which is (3-1)*32+10 = gpio 74
*
* i.e. The mapping of GPIO(X,Y) to Linux gpio
* number is : gpio number = (X-1) * 32 + Y
*/
/* DI1_PIN15 */
MX6QDL_PAD_EIM_DA10__GPIO3_IO10 0x400130b1
/* DI1_PIN02 */
MX6QDL_PAD_EIM_DA11__GPIO3_IO11 0x400130b1
/* DISP1_DATA00 */
MX6QDL_PAD_EIM_DA9__GPIO3_IO09 0x400130b1
/* DISP1_DATA01 */
MX6QDL_PAD_EIM_DA8__GPIO3_IO08 0x400130b1
/* DISP1_DATA02 */
MX6QDL_PAD_EIM_DA7__GPIO3_IO07 0x400130b1
/* DISP1_DATA03 */
MX6QDL_PAD_EIM_DA6__GPIO3_IO06 0x400130b1
/* DISP1_DATA04 */
MX6QDL_PAD_EIM_DA5__GPIO3_IO05 0x400130b1
/* DISP1_DATA05 */
MX6QDL_PAD_EIM_DA4__GPIO3_IO04 0x400130b1
/* DISP1_DATA06 */
MX6QDL_PAD_EIM_DA3__GPIO3_IO03 0x400130b1
/* DISP1_DATA07 */
MX6QDL_PAD_EIM_DA2__GPIO3_IO02 0x400130b1
/* DI1_D0_CS */
MX6QDL_PAD_EIM_DA13__GPIO3_IO13 0x400130b1
/* DI1_D1_CS */
MX6QDL_PAD_EIM_DA14__GPIO3_IO14 0x400130b1
/* DI1_PIN01 */
MX6QDL_PAD_EIM_DA15__GPIO3_IO15 0x400130b1
/* DI1_PIN03 */
MX6QDL_PAD_EIM_DA12__GPIO3_IO12 0x400130b1
/* DISP1_DATA08 */
MX6QDL_PAD_EIM_DA1__GPIO3_IO01 0x400130b1
/* DISP1_DATA09 */
MX6QDL_PAD_EIM_DA0__GPIO3_IO00 0x400130b1
/* DISP1_DATA10 */
MX6QDL_PAD_EIM_EB1__GPIO2_IO29 0x400130b1
/* DISP1_DATA11 */
MX6QDL_PAD_EIM_EB0__GPIO2_IO28 0x400130b1
/* DISP1_DATA12 */
MX6QDL_PAD_EIM_A17__GPIO2_IO21 0x400130b1
/* DISP1_DATA13 */
MX6QDL_PAD_EIM_A18__GPIO2_IO20 0x400130b1
/* DISP1_DATA14 */
MX6QDL_PAD_EIM_A19__GPIO2_IO19 0x400130b1
/* DISP1_DATA15 */
MX6QDL_PAD_EIM_A20__GPIO2_IO18 0x400130b1
/* DISP1_DATA16 */
MX6QDL_PAD_EIM_A21__GPIO2_IO17 0x400130b1
/* DISP1_DATA17 */
MX6QDL_PAD_EIM_A22__GPIO2_IO16 0x400130b1
/* DISP1_DATA18 */
MX6QDL_PAD_EIM_A23__GPIO6_IO06 0x400130b1
/* DISP1_DATA19 */
MX6QDL_PAD_EIM_A24__GPIO5_IO04 0x400130b1
/* DISP1_DATA20 */
MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x400130b1
/* DISP1_DATA21 */
MX6QDL_PAD_EIM_D30__GPIO3_IO30 0x400130b1
/* DISP1_DATA22 */
MX6QDL_PAD_EIM_D26__GPIO3_IO26 0x400130b1
/* DISP1_DATA23 */
MX6QDL_PAD_EIM_D27__GPIO3_IO27 0x400130b1
/* DI1_DISP_CLK */
MX6QDL_PAD_EIM_A16__GPIO2_IO22 0x400130b1
/* SPDIF_IN */
MX6QDL_PAD_ENET_RX_ER__GPIO1_IO24 0x400130b1
/* SPDIF_OUT */
MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x400130b1
/* MikroBUS GPIO pin number 10 */
MX6QDL_PAD_EIM_LBA__GPIO2_IO27 0x400130b1
>;
};
pinctrl_hummingboard2_ecspi2: hummingboard2-ecspi2grp {
fsl,pins = <
MX6QDL_PAD_EIM_OE__ECSPI2_MISO 0x100b1
MX6QDL_PAD_EIM_CS1__ECSPI2_MOSI 0x100b1
MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0x100b1
MX6QDL_PAD_EIM_RW__GPIO2_IO26 0x000b1 /* CS */
>;
};
pinctrl_hummingboard2_gpio7_9: hummingboard2-gpio7_9 {
fsl,pins = <
MX6QDL_PAD_SD4_CMD__GPIO7_IO09 0x80000000
>;
};
pinctrl_hummingboard2_hdmi: hummingboard2-hdmi {
fsl,pins = <
MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE 0x1f8b0
>;
};
pinctrl_hummingboard2_i2c1: hummingboard2-i2c1 {
fsl,pins = <
MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
>;
};
pinctrl_hummingboard2_i2c2: hummingboard2-i2c2 {
fsl,pins = <
MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
>;
};
pinctrl_hummingboard2_i2c3: hummingboard2-i2c3 {
fsl,pins = <
MX6QDL_PAD_EIM_D17__I2C3_SCL 0x4001b8b1
MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1
>;
};
pinctrl_hummingboard2_mipi: hummingboard2_mipi {
fsl,pins = <
MX6QDL_PAD_SD4_DAT2__GPIO2_IO10 0x4001b8b1
MX6QDL_PAD_KEY_COL4__GPIO4_IO14 0x4001b8b1
MX6QDL_PAD_NANDF_CS2__CCM_CLKO2 0x130b0
>;
};
pinctrl_hummingboard2_pcie_reset: hummingboard2-pcie-reset {
fsl,pins = <
MX6QDL_PAD_SD4_DAT3__GPIO2_IO11 0x1b0b1
>;
};
pinctrl_hummingboard2_pwm1: pwm1grp {
fsl,pins = <
MX6QDL_PAD_DISP0_DAT8__PWM1_OUT 0x1b0b1
>;
};
pinctrl_hummingboard2_pwm3: pwm3grp {
fsl,pins = <
MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1
>;
};
pinctrl_hummingboard2_sgtl5000: hummingboard2-sgtl5000 {
fsl,pins = <
MX6QDL_PAD_DISP0_DAT19__AUD5_RXD 0x130b0
MX6QDL_PAD_KEY_COL0__AUD5_TXC 0x130b0
MX6QDL_PAD_KEY_ROW0__AUD5_TXD 0x110b0
MX6QDL_PAD_KEY_COL1__AUD5_TXFS 0x130b0
MX6QDL_PAD_GPIO_5__CCM_CLKO1 0x130b0
>;
};
pinctrl_hummingboard2_usbh1_vbus: hummingboard2-usbh1-vbus {
fsl,pins = <MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0>;
};
pinctrl_hummingboard2_usbh2_vbus: hummingboard2-usbh2-vbus {
fsl,pins = <MX6QDL_PAD_SD4_DAT5__GPIO2_IO13 0x1b0b0>;
};
pinctrl_hummingboard2_usbh3_vbus: hummingboard2-usbh3-vbus {
fsl,pins = <MX6QDL_PAD_SD4_CLK__GPIO7_IO10 0x1b0b0>;
};
pinctrl_hummingboard2_usbotg_id: hummingboard2-usbotg-id {
/*
* Similar to pinctrl_usbotg_2, but we want it
* pulled down for a fixed host connection.
*/
fsl,pins = <MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x13059>;
};
pinctrl_hummingboard2_usbotg_vbus: hummingboard2-usbotg-vbus {
fsl,pins = <MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0>;
};
pinctrl_hummingboard2_usdhc2_aux: hummingboard2-usdhc2-aux {
fsl,pins = <
MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1f071
MX6QDL_PAD_KEY_ROW1__SD2_VSELECT 0x1b071
>;
};
pinctrl_hummingboard2_usdhc2: hummingboard2-usdhc2 {
fsl,pins = <
MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x13059
>;
};
pinctrl_hummingboard2_usdhc2_100mhz: hummingboard2-usdhc2-100mhz {
fsl,pins = <
MX6QDL_PAD_SD2_CMD__SD2_CMD 0x170b9
MX6QDL_PAD_SD2_CLK__SD2_CLK 0x100b9
MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x170b9
MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x170b9
MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x170b9
MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x130b9
>;
};
pinctrl_hummingboard2_usdhc2_200mhz: hummingboard2-usdhc2-200mhz {
fsl,pins = <
MX6QDL_PAD_SD2_CMD__SD2_CMD 0x170f9
MX6QDL_PAD_SD2_CLK__SD2_CLK 0x100f9
MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x170f9
MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x170f9
MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x170f9
MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x130f9
>;
};
pinctrl_hummingboard2_vmmc: hummingboard2-vmmc {
fsl,pins = <
MX6QDL_PAD_DISP0_DAT9__GPIO4_IO30 0x1b0b0
>;
};
pinctrl_hummingboard2_uart3: hummingboard2-uart3 {
fsl,pins = <
MX6QDL_PAD_EIM_D25__UART3_TX_DATA 0x1b0b1
MX6QDL_PAD_EIM_D24__UART3_RX_DATA 0x40013000
>;
};
};
};
&pcie {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hummingboard2_pcie_reset>;
reset-gpio = <&gpio2 11 GPIO_ACTIVE_LOW>;
status = "okay";
};
&pwm1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hummingboard2_pwm1>;
status = "okay";
};
&pwm3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hummingboard2_pwm3>;
status = "okay";
};
&ssi1 {
status = "okay";
};
&usbh1 {
disable-over-current;
status = "okay";
};
&usbotg {
disable-over-current;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hummingboard2_usbotg_id>;
vbus-supply = <&v_usb1>;
status = "okay";
};
&usdhc2 {
pinctrl-names = "default", "state_100mhz", "state_200mhz";
pinctrl-0 = <
&pinctrl_hummingboard2_usdhc2_aux
&pinctrl_hummingboard2_usdhc2
>;
pinctrl-1 = <
&pinctrl_hummingboard2_usdhc2_aux
&pinctrl_hummingboard2_usdhc2_100mhz
>;
pinctrl-2 = <
&pinctrl_hummingboard2_usdhc2_aux
&pinctrl_hummingboard2_usdhc2_200mhz
>;
vmmc-supply = <&v_sd>;
cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
status = "okay";
};
&uart3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hummingboard2_uart3>;
status = "okay";
};
&vcc_3v3 {
vin-supply = <&v_3v2>;
};
...@@ -172,7 +172,7 @@ volume-down { ...@@ -172,7 +172,7 @@ volume-down {
}; };
}; };
i2cmux@2 { i2c2mux {
compatible = "i2c-mux-gpio"; compatible = "i2c-mux-gpio";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2mux>; pinctrl-0 = <&pinctrl_i2c2mux>;
...@@ -183,20 +183,20 @@ i2cmux@2 { ...@@ -183,20 +183,20 @@ i2cmux@2 {
i2c-parent = <&i2c2>; i2c-parent = <&i2c2>;
idle-state = <0>; idle-state = <0>;
i2c2@1 { i2c2mux@1 {
reg = <1>; reg = <1>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
}; };
i2c2@2 { i2c2mux@2 {
reg = <2>; reg = <2>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
}; };
}; };
i2cmux@3 { i2c3mux {
compatible = "i2c-mux-gpio"; compatible = "i2c-mux-gpio";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c3mux>; pinctrl-0 = <&pinctrl_i2c3mux>;
...@@ -206,7 +206,7 @@ i2cmux@3 { ...@@ -206,7 +206,7 @@ i2cmux@3 {
i2c-parent = <&i2c3>; i2c-parent = <&i2c3>;
idle-state = <0>; idle-state = <0>;
i2c3@1 { i2c3mux@1 {
reg = <1>; reg = <1>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
......
...@@ -276,6 +276,23 @@ flash: m25p80@0 { ...@@ -276,6 +276,23 @@ flash: m25p80@0 {
compatible = "sst,sst25vf016b", "jedec,spi-nor"; compatible = "sst,sst25vf016b", "jedec,spi-nor";
spi-max-frequency = <20000000>; spi-max-frequency = <20000000>;
reg = <0>; reg = <0>;
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "bootloader";
reg = <0x0 0xc0000>;
};
partition@c0000 {
label = "env";
reg = <0xc0000 0x2000>;
};
partition@c2000 {
label = "splash";
reg = <0xc2000 0x13e000>;
};
}; };
}; };
......
...@@ -235,6 +235,9 @@ &gpmi { ...@@ -235,6 +235,9 @@ &gpmi {
}; };
&hdmi { &hdmi {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hdmi_cec>;
ddc-i2c-bus = <&i2c2>;
status = "okay"; status = "okay";
}; };
...@@ -453,6 +456,12 @@ MX6QDL_PAD_SD4_DAT0__NAND_DQS 0x00b1 ...@@ -453,6 +456,12 @@ MX6QDL_PAD_SD4_DAT0__NAND_DQS 0x00b1
>; >;
}; };
pinctrl_hdmi_cec: hdmicecgrp {
fsl,pins = <
MX6QDL_PAD_EIM_A25__HDMI_TX_CEC_LINE 0x1f8b0
>;
};
pinctrl_i2c2: i2c2grp { pinctrl_i2c2: i2c2grp {
fsl,pins = < fsl,pins = <
MX6QDL_PAD_EIM_EB2__I2C2_SCL 0x4001b8b1 MX6QDL_PAD_EIM_EB2__I2C2_SCL 0x4001b8b1
......
...@@ -40,7 +40,7 @@ ...@@ -40,7 +40,7 @@
*/ */
#include <dt-bindings/gpio/gpio.h> #include <dt-bindings/gpio/gpio.h>
/ { / {
clk_sdio: sdio-clock { clk_brcm: brcm-clock {
compatible = "gpio-gate-clock"; compatible = "gpio-gate-clock";
#clock-cells = <0>; #clock-cells = <0>;
pinctrl-names = "default"; pinctrl-names = "default";
...@@ -48,9 +48,6 @@ clk_sdio: sdio-clock { ...@@ -48,9 +48,6 @@ clk_sdio: sdio-clock {
enable-gpios = <&gpio5 5 GPIO_ACTIVE_HIGH>; enable-gpios = <&gpio5 5 GPIO_ACTIVE_HIGH>;
}; };
regulators {
compatible = "simple-bus";
reg_brcm: brcm-reg { reg_brcm: brcm-reg {
compatible = "regulator-fixed"; compatible = "regulator-fixed";
enable-active-high; enable-active-high;
...@@ -62,13 +59,12 @@ reg_brcm: brcm-reg { ...@@ -62,13 +59,12 @@ reg_brcm: brcm-reg {
regulator-max-microvolt = <3300000>; regulator-max-microvolt = <3300000>;
startup-delay-us = <200000>; startup-delay-us = <200000>;
}; };
};
usdhc1_pwrseq: usdhc1_pwrseq { usdhc1_pwrseq: usdhc1_pwrseq {
compatible = "mmc-pwrseq-simple"; compatible = "mmc-pwrseq-simple";
reset-gpios = <&gpio5 26 GPIO_ACTIVE_LOW>, reset-gpios = <&gpio5 26 GPIO_ACTIVE_LOW>,
<&gpio6 0 GPIO_ACTIVE_LOW>; <&gpio6 0 GPIO_ACTIVE_LOW>;
clocks = <&clk_sdio>; clocks = <&clk_brcm>;
clock-names = "ext_clock"; clock-names = "ext_clock";
}; };
}; };
...@@ -104,13 +100,6 @@ MX6QDL_PAD_CSI0_DAT9__GPIO5_IO27 0x40013070 ...@@ -104,13 +100,6 @@ MX6QDL_PAD_CSI0_DAT9__GPIO5_IO27 0x40013070
>; >;
}; };
pinctrl_microsom_uart1: microsom-uart1 {
fsl,pins = <
MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
>;
};
pinctrl_microsom_uart4: microsom-uart4 { pinctrl_microsom_uart4: microsom-uart4 {
fsl,pins = < fsl,pins = <
MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA 0x1b0b1 MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA 0x1b0b1
...@@ -133,12 +122,6 @@ MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17059 ...@@ -133,12 +122,6 @@ MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17059
}; };
}; };
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_microsom_uart1>;
status = "okay";
};
/* UART4 - Connected to optional BRCM Wifi/BT/FM */ /* UART4 - Connected to optional BRCM Wifi/BT/FM */
&uart4 { &uart4 {
pinctrl-names = "default"; pinctrl-names = "default";
......
/*
* Copyright (C) 2013,2014 Russell King
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
&iomuxc {
microsom {
pinctrl_microsom_usdhc3: microsom-usdhc3 {
fsl,pins = <
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059
MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059
MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059
MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059
MX6QDL_PAD_SD3_RST__SD3_RESET 0x17059
>;
};
};
};
/* USDHC3 - eMMC */
&usdhc3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_microsom_usdhc3>;
bus-width = <8>;
non-removable;
vmmc-supply = <&vcc_3v3>;
status = "okay";
};
/*
* Copyright (C) 2013,2014 Russell King
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
#include <dt-bindings/gpio/gpio.h>
/ {
nvcc_sd1: regulator-nvcc-sd1 {
compatible = "regulator-fixed";
regulator-always-on;
regulator-name = "nvcc_sd1";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
vin-supply = <&vcc_3v3>;
};
clk_ti_wifi: ti-wifi-clock {
/* This is a hack around the kernel - using "fixed clock"
* results in the "pinctrl" properties being ignored, and
* the clock not being output. Instead, use a gated clock
* and the unrouted WL_XTAL_PU gpio.
*/
compatible = "gpio-gate-clock";
#clock-cells = <0>;
clock-frequency = <32768>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_microsom_ti_clk>;
enable-gpios = <&gpio5 5 GPIO_ACTIVE_HIGH>;
};
pwrseq_ti_wifi: ti-wifi-pwrseq {
compatible = "mmc-pwrseq-simple";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_microsom_ti_wifi_en>;
reset-gpios = <&gpio5 26 GPIO_ACTIVE_LOW>;
post-power-on-delay-ms = <200>;
clocks = <&clk_ti_wifi>;
clock-names = "ext_clock";
};
};
&iomuxc {
microsom {
pinctrl_microsom_ti_bt: microsom-ti-bt {
fsl,pins = <
/* BT_EN_SOC */
MX6QDL_PAD_CSI0_DAT14__GPIO6_IO00 0x40013070
>;
};
pinctrl_microsom_ti_clk: microsom-ti-clk {
fsl,pins = <
/* EXT_32K */
MX6QDL_PAD_GPIO_8__XTALOSC_REF_CLK_32K 0x1b0b0
/* WL_XTAL_PU (unrouted) */
MX6QDL_PAD_DISP0_DAT11__GPIO5_IO05 0x40013070
>;
};
pinctrl_microsom_ti_wifi_en: microsom-ti-wifi-en {
fsl,pins = <
/* WLAN_EN_SOC */
MX6QDL_PAD_CSI0_DAT8__GPIO5_IO26 0x40013070
>;
};
pinctrl_microsom_ti_wifi_irq: microsom-ti-wifi-irq {
fsl,pins = <
/* WLAN_IRQ */
MX6QDL_PAD_CSI0_DAT18__GPIO6_IO04 0x40013070
>;
};
pinctrl_microsom_uart4: microsom-uart4 {
fsl,pins = <
MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA 0x1b0b1
MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA 0x1b0b1
MX6QDL_PAD_CSI0_DAT16__UART4_RTS_B 0x1b0b1
MX6QDL_PAD_CSI0_DAT17__UART4_CTS_B 0x1b0b1
>;
};
pinctrl_microsom_usdhc1: microsom-usdhc1 {
fsl,pins = <
MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17059
MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10059
MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17059
MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17059
MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17059
MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17059
>;
};
};
};
/* UART4 - Connected to optional TI Wi-Fi/BT/FM */
&uart4 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_microsom_uart4>;
uart-has-rtscts;
status = "okay";
bluetooth {
compatible = "ti,wl1837-st";
clocks = <&clk_ti_wifi>;
clock-names = "ext_clock";
enable-gpios = <&gpio6 0 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_microsom_ti_bt>;
};
};
/* USDHC1 - Connected to optional TI Wi-Fi/BT/FM */
&usdhc1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_microsom_usdhc1>;
bus-width = <4>;
keep-power-in-suspend;
mmc-pwrseq = <&pwrseq_ti_wifi>;
non-removable;
vmmc-supply = <&vcc_3v3>;
/* vqmmc-supply = <&nvcc_sd1>; - MMC layer doesn't like it! */
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
wlcore@2 {
compatible = "ti,wl1837";
reg = <2>;
interrupts-extended = <&gpio6 4 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_microsom_ti_wifi_irq>;
};
};
/* /*
* Copyright (C) 2013,2014 Russell King * Copyright (C) 2013,2014 Russell King
* *
* This describes the hookup for an AR8035 to the iMX6 on the SolidRun
* MicroSOM.
*
* This file is dual-licensed: you can use it either under the terms * This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual * of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a * licensing only applies to this file, and not this project as a
...@@ -41,6 +38,18 @@ ...@@ -41,6 +38,18 @@
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE. * OTHER DEALINGS IN THE SOFTWARE.
*/ */
#include <dt-bindings/gpio/gpio.h>
/ {
vcc_3v3: regulator-vcc-3v3 {
compatible = "regulator-fixed";
regulator-always-on;
regulator-name = "vcc_3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
};
&fec { &fec {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_microsom_enet_ar8035>; pinctrl-0 = <&pinctrl_microsom_enet_ar8035>;
...@@ -51,7 +60,7 @@ &fec { ...@@ -51,7 +60,7 @@ &fec {
}; };
&iomuxc { &iomuxc {
enet { microsom {
pinctrl_microsom_enet_ar8035: microsom-enet-ar8035 { pinctrl_microsom_enet_ar8035: microsom-enet-ar8035 {
fsl,pins = < fsl,pins = <
MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b8b0 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b8b0
...@@ -59,10 +68,10 @@ MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 ...@@ -59,10 +68,10 @@ MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
/* AR8035 reset */ /* AR8035 reset */
MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x130b0 MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x130b0
/* AR8035 interrupt */ /* AR8035 interrupt */
MX6QDL_PAD_DI0_PIN2__GPIO4_IO18 0x80000000 MX6QDL_PAD_DI0_PIN2__GPIO4_IO18 0x1b0b0
/* GPIO16 -> AR8035 25MHz */ /* GPIO16 -> AR8035 25MHz */
MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0xc0000000 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0b0
MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x80000000 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x13030
MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
...@@ -95,5 +104,18 @@ MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 0x03000 ...@@ -95,5 +104,18 @@ MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 0x03000
MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x03000 MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x03000
>; >;
}; };
pinctrl_microsom_uart1: microsom-uart1 {
fsl,pins = <
MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
>;
};
}; };
}; };
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_microsom_uart1>;
status = "okay";
};
/*
* Copyright 2015 Technologic Systems
* Copyright 2017 Savoir-Faire Linux
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
/ {
leds {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_leds1>;
compatible = "gpio-leds";
green-led {
label = "green-led";
gpios = <&gpio3 27 GPIO_ACTIVE_LOW>;
default-state = "on";
};
red-led {
label = "red-led";
gpios = <&gpio1 2 GPIO_ACTIVE_LOW>;
default-state = "off";
};
yel-led {
label = "yellow-led";
gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
default-state = "off";
};
blue-led {
label = "blue-led";
gpios = <&gpio4 25 GPIO_ACTIVE_LOW>;
default-state = "off";
};
en-usb-5v {
label = "en-usb-5v";
gpios = <&gpio2 22 GPIO_ACTIVE_HIGH>;
default-state = "on";
};
sel_dc_usb {
label = "sel_dc_usb";
gpios = <&gpio5 17 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
};
reg_3p3v: regulator-3p3v {
compatible = "regulator-fixed";
regulator-name = "3p3v";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
reg_can1_3v3: reg_can1_3v3 {
compatible = "regulator-fixed";
regulator-name = "reg_can1_3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio4 21 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
reg_can2_3v3: en-reg_can2_3v3 {
compatible = "regulator-fixed";
regulator-name = "reg_can2_3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio6 31 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
reg_usb_otg_vbus: regulator-usb-otg-vbus {
compatible = "regulator-fixed";
regulator-name = "usb_otg_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
reg_wlan_vmmc: regulator_wlan_vmmc {
compatible = "regulator-fixed";
regulator-name = "wlan_vmmc";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
gpio = <&gpio8 14 GPIO_ACTIVE_HIGH>;
startup-delay-us = <70000>;
enable-active-high;
};
sound-sgtl5000 {
audio-codec = <&sgtl5000>;
audio-routing =
"MIC_IN", "Mic Jack",
"Mic Jack", "Mic Bias",
"Headphone Jack", "HP_OUT";
compatible = "fsl,imx-audio-sgtl5000";
model = "On-board Codec";
mux-ext-port = <3>;
mux-int-port = <1>;
ssi-controller = <&ssi1>;
};
};
&audmux {
status = "okay";
};
&can1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_flexcan1>;
xceiver-supply = <&reg_can1_3v3>;
status = "okay";
};
&can2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_flexcan2>;
xceiver-supply = <&reg_can2_3v3>;
status = "okay";
};
&ecspi1 {
cs-gpios = <&gpio3 19 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ecspi1>;
status = "okay";
n25q064: flash@0 {
compatible = "micron,n25q064", "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <20000000>;
};
};
&ecspi2 {
cs-gpios = <
&gpio5 31 GPIO_ACTIVE_HIGH
&gpio7 12 GPIO_ACTIVE_HIGH
&gpio5 18 GPIO_ACTIVE_HIGH
>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ecspi2>;
status = "okay";
};
&fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet>;
phy-mode = "rgmii";
interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>,
<&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
fsl,err006687-workaround-present;
status = "okay";
};
&hdmi {
status = "okay";
};
&i2c1 {
clock-frequency = <100000>;
pinctrl-names = "default", "gpio";
pinctrl-0 = <&pinctrl_i2c1>;
pinctrl-1 = <&pinctrl_i2c1_gpio>;
scl-gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>;
sda-gpios = <&gpio3 28 GPIO_ACTIVE_HIGH>;
status = "okay";
m41t00s: rtc@68 {
compatible = "m41t00";
reg = <0x68>;
};
isl12022: rtc@6f {
compatible = "isl,isl12022";
reg = <0x6f>;
};
gpio8: gpio@28 {
compatible = "technologic,ts7970-gpio";
reg = <0x28>;
#gpio-cells = <2>;
gpio-controller;
ngpio = <32>;
};
sgtl5000: codec@a {
compatible = "fsl,sgtl5000";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sgtl5000>;
reg = <0x0a>;
clocks = <&clks IMX6QDL_CLK_CKO>;
VDDA-supply = <&reg_3p3v>;
VDDIO-supply = <&reg_3p3v>;
};
};
&i2c2 {
clock-frequency = <100000>;
pinctrl-names = "default", "gpio";
pinctrl-0 = <&pinctrl_i2c2>;
pinctrl-1 = <&pinctrl_i2c2_gpio>;
scl-gpios = <&gpio4 12 GPIO_ACTIVE_HIGH>;
sda-gpios = <&gpio4 13 GPIO_ACTIVE_HIGH>;
status = "okay";
};
&iomuxc {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hog>;
pinctrl_ecspi1: ecspi1grp {
fsl,pins = <
MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1
MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x100b1 /* Onboard Flash CS */
>;
};
pinctrl_ecspi2: ecspi2 {
fsl,pins = <
MX6QDL_PAD_CSI0_DAT8__ECSPI2_SCLK 0x100b1
MX6QDL_PAD_CSI0_DAT9__ECSPI2_MOSI 0x100b1
MX6QDL_PAD_CSI0_DAT10__ECSPI2_MISO 0x100b1
MX6QDL_PAD_CSI0_DAT13__GPIO5_IO31 0x100b1 /* FPGA_SPI_CS0 */
MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x100b1 /* FPGA_SPI_CS1 */
MX6QDL_PAD_CSI0_PIXCLK__GPIO5_IO18 0x100b1 /* HD1_SPI_CS */
MX6QDL_PAD_CSI0_VSYNC__GPIO5_IO21 0x1b088 /* FPGA_RESET */
MX6QDL_PAD_GPIO_3__XTALOSC_REF_CLK_24M 0x10 /* FPGA 24MHZ */
MX6QDL_PAD_CSI0_DATA_EN__GPIO5_IO20 0x1b088 /* FPGA_IRQ_0 */
MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1b088 /* FPGA_IRQ_1 */
>;
};
pinctrl_enet: enet {
fsl,pins = <
MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x1b088
MX6QDL_PAD_DI0_PIN4__GPIO4_IO20 0x1b088 /* ETH_PHY_RESET */
MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1
>;
};
pinctrl_flexcan1: flexcan1grp {
fsl,pins = <
MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b088
MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b088
MX6QDL_PAD_DISP0_DAT0__GPIO4_IO21 0x1b088 /* EN_CAN_1 */
>;
};
pinctrl_flexcan2: flexcan2grp {
fsl,pins = <
MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX 0x1b088
MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX 0x1b088
MX6QDL_PAD_EIM_BCLK__GPIO6_IO31 0x1b088 /* EN_CAN_2 */
>;
};
pinctrl_hog: hoggrp {
fsl,pins = <
/* Onboard */
MX6QDL_PAD_SD4_DAT3__GPIO2_IO11 0x1b088 /* USB_HUB_RESET */
MX6QDL_PAD_DISP0_DAT23__GPIO5_IO17 0x1b088 /* SEL_DC_USB */
MX6QDL_PAD_EIM_A16__GPIO2_IO22 0x1b088 /* EN_USB_5V */
MX6QDL_PAD_DISP0_DAT14__GPIO5_IO08 0x1b088 /* JTAG_FPGA_TMS */
MX6QDL_PAD_DISP0_DAT17__GPIO5_IO11 0x1b088 /* JTAG_FPGA_TCK */
MX6QDL_PAD_DISP0_DAT18__GPIO5_IO12 0x1b088 /* JTAG_FPGA_TDO */
MX6QDL_PAD_DISP0_DAT22__GPIO5_IO16 0x1b088 /* JTAG_FPGA_TDI */
MX6QDL_PAD_DISP0_DAT20__GPIO5_IO14 0x1b088 /* GYRO_INT */
MX6QDL_PAD_EIM_OE__GPIO2_IO25 0x1b088 /* MODBUS_FAULT */
MX6QDL_PAD_EIM_RW__GPIO2_IO26 0x1b088 /* BUS_DIR/JP_SD_BOOT */
MX6QDL_PAD_EIM_A19__GPIO2_IO19 0x1b088 /* EN_MODBUS_24V */
MX6QDL_PAD_DISP0_DAT5__GPIO4_IO26 0x1b088 /* EN_MODBUS_3V */
MX6QDL_PAD_EIM_A17__GPIO2_IO21 0x1b088 /* I210_RESET */
MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x1b088 /* EN_RTC_PWR */
MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x1b088 /* REVSTRAP1 */
/* Offboard */
MX6QDL_PAD_DISP0_DAT7__GPIO4_IO28 0x1b088 /* LCD_D09 */
MX6QDL_PAD_DISP0_DAT9__GPIO4_IO30 0x1b088 /* HD1_IRQ */
MX6QDL_PAD_DISP0_DAT10__GPIO4_IO31 0x1b088 /* LCD_D10 */
MX6QDL_PAD_DISP0_DAT11__GPIO5_IO05 0x1b088 /* LCD_D11 */
MX6QDL_PAD_EIM_EB1__GPIO2_IO29 0x1b088 /* BUS_BHE */
MX6QDL_PAD_EIM_LBA__GPIO2_IO27 0x1b088 /* BUS_ALE */
MX6QDL_PAD_EIM_CS0__GPIO2_IO23 0x1b088 /* BUS_CS */
MX6QDL_PAD_EIM_A24__GPIO5_IO04 0x1b088 /* DIO_20 */
MX6QDL_PAD_EIM_WAIT__GPIO5_IO00 0x1b088 /* BUS_WAIT */
MX6QDL_PAD_EIM_DA0__GPIO3_IO00 0x1b088 /* MUX_AD_00 */
MX6QDL_PAD_EIM_DA1__GPIO3_IO01 0x1b088 /* MUX_AD_01 */
MX6QDL_PAD_EIM_DA2__GPIO3_IO02 0x1b088 /* MUX_AD_02 */
MX6QDL_PAD_EIM_DA3__GPIO3_IO03 0x1b088 /* MUX_AD_03 */
MX6QDL_PAD_EIM_DA4__GPIO3_IO04 0x1b088 /* MUX_AD_04 */
MX6QDL_PAD_EIM_DA5__GPIO3_IO05 0x1b088 /* MUX_AD_05 */
MX6QDL_PAD_EIM_DA6__GPIO3_IO06 0x1b088 /* MUX_AD_06 */
MX6QDL_PAD_EIM_DA7__GPIO3_IO07 0x1b088 /* MUX_AD_07 */
MX6QDL_PAD_EIM_DA8__GPIO3_IO08 0x1b088 /* MUX_AD_08 */
MX6QDL_PAD_EIM_DA9__GPIO3_IO09 0x1b088 /* MUX_AD_09 */
MX6QDL_PAD_EIM_DA10__GPIO3_IO10 0x1b088 /* MUX_AD_10 */
MX6QDL_PAD_EIM_DA11__GPIO3_IO11 0x1b088 /* MUX_AD_11 */
MX6QDL_PAD_EIM_DA12__GPIO3_IO12 0x1b088 /* MUX_AD_12 */
MX6QDL_PAD_EIM_DA13__GPIO3_IO13 0x1b088 /* MUX_AD_13 */
MX6QDL_PAD_EIM_DA14__GPIO3_IO14 0x1b088 /* MUX_AD_14 */
MX6QDL_PAD_EIM_DA15__GPIO3_IO15 0x1b088 /* MUX_AD_15 */
/* Strapping only */
MX6QDL_PAD_EIM_A18__GPIO2_IO20 0x1b088
MX6QDL_PAD_EIM_A21__GPIO2_IO17 0x1b088
>;
};
pinctrl_i2c1: i2c1grp {
fsl,pins = <
MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
>;
};
pinctrl_i2c1_gpio: i2c1gpiogrp {
fsl,pins = <
MX6QDL_PAD_EIM_D21__GPIO3_IO21 0x4001b8b1
MX6QDL_PAD_EIM_D28__GPIO3_IO28 0x4001b8b1
>;
};
pinctrl_i2c2: i2c2grp {
fsl,pins = <
MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
>;
};
pinctrl_i2c2_gpio: i2c2gpiogrp {
fsl,pins = <
MX6QDL_PAD_KEY_COL3__GPIO4_IO12 0x4001b8b1
MX6QDL_PAD_KEY_ROW3__GPIO4_IO13 0x4001b8b1
>;
};
pinctrl_leds1: leds1grp {
fsl,pins = <
MX6QDL_PAD_EIM_D27__GPIO3_IO27 0x1b088 /* GREEN_LED */
MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b088 /* RED_LED */
MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x1b088 /* YEL_LED */
MX6QDL_PAD_DISP0_DAT4__GPIO4_IO25 0x1b088 /* IMX6_BLUE_LED */
>;
};
pinctrl_sgtl5000: sgtl5000grp {
fsl,pins = <
MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0
MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0
MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0
MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0
MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0 /* Audio CLK */
>;
};
pinctrl_uart1: uart1grp {
fsl,pins = <
MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b088
MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b088
>;
};
pinctrl_uart2: uart2grp {
fsl,pins = <
MX6QDL_PAD_GPIO_7__UART2_TX_DATA 0x1b088
MX6QDL_PAD_GPIO_8__UART2_RX_DATA 0x1b088
MX6QDL_PAD_SD4_DAT6__UART2_CTS_B 0x1b088
MX6QDL_PAD_SD4_DAT5__UART2_RTS_B 0x1b088
>;
};
pinctrl_uart3: uart3grp {
fsl,pins = <
MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b088
MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b088
MX6QDL_PAD_EIM_D30__UART3_RTS_B 0x1b088
MX6QDL_PAD_EIM_D31__UART3_CTS_B 0x1b088
>;
};
pinctrl_uart4: uart4grp {
fsl,pins = <
MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b088
MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b088
>;
};
pinctrl_uart5: uart5grp {
fsl,pins = <
MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b088
MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b088
>;
};
pinctrl_usbotg: usbotggrp {
fsl,pins = <
MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
>;
};
pinctrl_usdhc1: usdhc1grp {
fsl,pins = <
MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17059
MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10059
MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17059
MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17059
MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17059
MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17059
MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x17059 /* WIFI IRQ */
>;
};
pinctrl_usdhc2: usdhc2grp {
fsl,pins = <
MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
MX6QDL_PAD_EIM_EB0__GPIO2_IO28 0x1b088 /* EN_SD_POWER */
>;
};
pinctrl_usdhc3: usdhc3grp {
fsl,pins = <
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
>;
};
};
&pcie {
status = "okay";
};
&snvs_rtc {
status = "disabled";
};
&ssi1 {
fsl,mode = "i2s-slave";
status = "okay";
};
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1>;
status = "okay";
};
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart2>;
uart-has-rtscts;
status = "okay";
};
&uart3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart3>;
status = "okay";
};
&uart4 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart4>;
status = "okay";
};
&uart5 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart5>;
status = "okay";
};
&usbh1 {
status = "okay";
};
&usbotg {
vbus-supply = <&reg_usb_otg_vbus>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usbotg>;
disable-over-current;
status = "okay";
};
/* WIFI */
&usdhc1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc1>;
vmmc-supply = <&reg_wlan_vmmc>;
bus-width = <4>;
non-removable;
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
wlcore: wlcore@2 {
compatible = "ti,wl1271";
reg = <2>;
interrupt-parent = <&gpio1>;
interrupts = <26 IRQ_TYPE_LEVEL_HIGH>;
ref-clock-frequency = <38400000>;
};
};
/* SD */
&usdhc2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc2>;
vmmc-supply = <&reg_3p3v>;
bus-width = <4>;
fsl,wp-controller;
status = "okay";
};
/* eMMC */
&usdhc3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc3>;
vmmc-supply = <&reg_3p3v>;
bus-width = <4>;
non-removable;
status = "okay";
};
...@@ -28,6 +28,13 @@ backlight: backlight { ...@@ -28,6 +28,13 @@ backlight: backlight {
status = "disabled"; status = "disabled";
}; };
gpio-poweroff {
compatible = "gpio-poweroff";
gpios = <&gpio2 4 0>;
pinctrl-0 = <&pinctrl_power_off>;
pinctrl-names = "default";
};
memory { memory {
reg = <0x10000000 0x40000000>; reg = <0x10000000 0x40000000>;
}; };
...@@ -172,6 +179,12 @@ MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x70 ...@@ -172,6 +179,12 @@ MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x70
>; >;
}; };
pinctrl_power_off: poweroffgrp {
fsl,pins = <
MX6QDL_PAD_NANDF_D4__GPIO2_IO04 0x30
>;
};
pinctrl_touchscreenp7: touchscreenp7grp { pinctrl_touchscreenp7: touchscreenp7grp {
fsl,pins = < fsl,pins = <
MX6QDL_PAD_SD2_DAT0__GPIO1_IO15 0x70 MX6QDL_PAD_SD2_DAT0__GPIO1_IO15 0x70
...@@ -208,8 +221,8 @@ pinctrl_ac97_running: ac97running { ...@@ -208,8 +221,8 @@ pinctrl_ac97_running: ac97running {
fsl,pins = < fsl,pins = <
MX6QDL_PAD_DI0_PIN2__AUD6_TXD 0x1b0b0 MX6QDL_PAD_DI0_PIN2__AUD6_TXD 0x1b0b0
MX6QDL_PAD_DI0_PIN3__AUD6_TXFS 0x1b0b0 MX6QDL_PAD_DI0_PIN3__AUD6_TXFS 0x1b0b0
MX6QDL_PAD_DI0_PIN4__AUD6_RXD 0x1b0b0 MX6QDL_PAD_DI0_PIN4__AUD6_RXD 0x13080
MX6QDL_PAD_DI0_PIN15__AUD6_TXC 0x1b0b0 MX6QDL_PAD_DI0_PIN15__AUD6_TXC 0x13080
MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x1b0b0 MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x1b0b0
>; >;
}; };
...@@ -218,8 +231,8 @@ pinctrl_ac97_warm_reset: ac97warmreset { ...@@ -218,8 +231,8 @@ pinctrl_ac97_warm_reset: ac97warmreset {
fsl,pins = < fsl,pins = <
MX6QDL_PAD_DI0_PIN2__AUD6_TXD 0x1b0b0 MX6QDL_PAD_DI0_PIN2__AUD6_TXD 0x1b0b0
MX6QDL_PAD_DI0_PIN3__GPIO4_IO19 0x1b0b0 MX6QDL_PAD_DI0_PIN3__GPIO4_IO19 0x1b0b0
MX6QDL_PAD_DI0_PIN4__AUD6_RXD 0x1b0b0 MX6QDL_PAD_DI0_PIN4__AUD6_RXD 0x13080
MX6QDL_PAD_DI0_PIN15__AUD6_TXC 0x1b0b0 MX6QDL_PAD_DI0_PIN15__AUD6_TXC 0x13080
MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x1b0b0 MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x1b0b0
>; >;
}; };
...@@ -228,8 +241,8 @@ pinctrl_ac97_reset: ac97reset { ...@@ -228,8 +241,8 @@ pinctrl_ac97_reset: ac97reset {
fsl,pins = < fsl,pins = <
MX6QDL_PAD_DI0_PIN2__GPIO4_IO18 0x1b0b0 MX6QDL_PAD_DI0_PIN2__GPIO4_IO18 0x1b0b0
MX6QDL_PAD_DI0_PIN3__GPIO4_IO19 0x1b0b0 MX6QDL_PAD_DI0_PIN3__GPIO4_IO19 0x1b0b0
MX6QDL_PAD_DI0_PIN4__AUD6_RXD 0x1b0b0 MX6QDL_PAD_DI0_PIN4__AUD6_RXD 0x13080
MX6QDL_PAD_DI0_PIN15__AUD6_TXC 0x1b0b0 MX6QDL_PAD_DI0_PIN15__AUD6_TXC 0x13080
MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x1b0b0 MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x1b0b0
>; >;
}; };
......
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Support for Variscite DART-MX6 Module
*
* Copyright 2017 BayLibre, SAS
* Author: Neil Armstrong <narmstrong@baylibre.com>
*/
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/sound/fsl-imx-audmux.h>
/ {
memory {
reg = <0x10000000 0x40000000>;
};
reg_3p3v: regulator-3p3v {
compatible = "regulator-fixed";
regulator-name = "3P3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
reg_wl18xx_vmmc: regulator-wl18xx {
compatible = "regulator-fixed";
regulator-name = "vwl1807";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
gpio = <&gpio7 8 GPIO_ACTIVE_HIGH>;
enable-active-high;
startup-delay-us = <70000>;
};
};
&audmux {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_audmux>;
status = "okay";
ssi2 {
fsl,audmux-port = <1>;
fsl,port-config = <
(IMX_AUDMUX_V2_PTCR_SYN |
IMX_AUDMUX_V2_PTCR_TFSDIR |
IMX_AUDMUX_V2_PTCR_TFSEL(2) |
IMX_AUDMUX_V2_PTCR_TCLKDIR |
IMX_AUDMUX_V2_PTCR_TCSEL(2))
IMX_AUDMUX_V2_PDCR_RXDSEL(2)
>;
};
aud3 {
fsl,audmux-port = <2>;
fsl,port-config = <
IMX_AUDMUX_V2_PTCR_SYN
IMX_AUDMUX_V2_PDCR_RXDSEL(1)
>;
};
};
&can1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_flexcan1>;
status = "disabled";
};
&can2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_flexcan2>;
status = "disabled";
};
&ecspi1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ecspi1>;
status = "disabled";
};
&fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet>;
phy-mode = "rgmii";
status = "disabled";
};
&hdmi {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hdmicec>;
ddc-i2c-bus = <&i2c1>;
status = "disabled";
};
&i2c1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c1>;
status = "disabled";
};
&i2c2 {
clock-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2>;
status = "okay";
pmic@8 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pmic>;
compatible = "fsl,pfuze100";
reg = <0x08>;
regulators {
sw1a_reg: sw1ab {
regulator-min-microvolt = <300000>;
regulator-max-microvolt = <1875000>;
regulator-boot-on;
regulator-always-on;
regulator-ramp-delay = <6250>;
};
sw1c_reg: sw1c {
regulator-min-microvolt = <300000>;
regulator-max-microvolt = <1875000>;
regulator-boot-on;
regulator-always-on;
regulator-ramp-delay = <6250>;
};
sw2_reg: sw2 {
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
regulator-always-on;
};
sw3a_reg: sw3a {
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <3950000>;
regulator-boot-on;
regulator-always-on;
};
sw3b_reg: sw3b {
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <3950000>;
regulator-boot-on;
regulator-always-on;
};
sw4_reg: sw4 {
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <3950000>;
};
snvs_reg: vsnvs {
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <3000000>;
regulator-boot-on;
regulator-always-on;
};
vref_reg: vrefddr {
regulator-boot-on;
regulator-always-on;
};
vgen6_reg: vgen6 {
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
regulator-always-on;
regulator-boot-on;
};
};
};
tlv320aic3106: codec@1b {
compatible = "ti,tlv320aic3106";
reg = <0x1b>;
#sound-dai-cells = <0>;
DRVDD-supply = <&reg_3p3v>;
AVDD-supply = <&reg_3p3v>;
IOVDD-supply = <&reg_3p3v>;
DVDD-supply = <&reg_3p3v>;
ai3x-ocmv = <0>;
gpio-reset = <&gpio5 5 GPIO_ACTIVE_LOW>;
};
};
&i2c3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c3>;
status = "disabled";
};
&iomuxc {
pinctrl_audmux: audmux {
fsl,pins = <
MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0
MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0
MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0
MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0
/* Audio Clock */
MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0
>;
};
pinctrl_bt: bt {
fsl,pins = <
/* Bluetooth enable */
MX6QDL_PAD_SD3_DAT6__GPIO6_IO18 0x1b0b1
/* Bluetooth Slow Clock */
MX6QDL_PAD_ENET_RXD0__OSC32K_32K_OUT 0x000b0
>;
};
pinctrl_ecspi1: ecspi1grp {
fsl,pins = <
MX6QDL_PAD_KEY_COL1__ECSPI1_MISO 0x100b1
MX6QDL_PAD_KEY_ROW0__ECSPI1_MOSI 0x100b1
MX6QDL_PAD_KEY_COL0__ECSPI1_SCLK 0x100b1
/* SPI1 CS0 */
MX6QDL_PAD_KEY_ROW1__GPIO4_IO09 0x1b0b0
/* SPI1 CS1 */
MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x1b0b0
>;
};
pinctrl_enet: enetgrp {
fsl,pins = <
MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x100b0
MX6QDL_PAD_ENET_MDC__ENET_MDC 0x100b0
MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x10030
MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x10030
MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x10030
MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x10030
MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x10030
MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x10030
MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x100b0
MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
>;
};
pinctrl_flexcan1: flexcan1grp {
fsl,pins = <
MX6QDL_PAD_GPIO_7__FLEXCAN1_TX 0x1b0b0
MX6QDL_PAD_GPIO_8__FLEXCAN1_RX 0x1b0b0
>;
};
pinctrl_flexcan2: flexcan2grp {
fsl,pins = <
MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX 0x1b0b0
MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX 0x1b0b0
>;
};
pinctrl_hdmicec: hdmicecgrp {
fsl,pins = <
MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE 0x1f8b0
>;
};
pinctrl_i2c1: i2c1grp {
fsl,pins = <
MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1
MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1
>;
};
pinctrl_i2c2: i2c2grp {
fsl,pins = <
MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
>;
};
pinctrl_i2c3: i2c3grp {
fsl,pins = <
MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
MX6QDL_PAD_GPIO_16__I2C3_SDA 0x4001b8b1
>;
};
pinctrl_pmic: pmicgrp {
fsl,pins = <
/* PMIC INT */
MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x1b0b1
>;
};
pinctrl_pwm2: pwm2grp {
fsl,pins = <
MX6QDL_PAD_DISP0_DAT9__PWM2_OUT 0x1b0b1
>;
};
pinctrl_uart1: uart1grp {
fsl,pins = <
MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
>;
};
pinctrl_uart2: uart2grp {
fsl,pins = <
MX6QDL_PAD_SD3_DAT4__UART2_RX_DATA 0x1b0b1
MX6QDL_PAD_SD3_DAT5__UART2_TX_DATA 0x1b0b1
MX6QDL_PAD_SD4_DAT6__UART2_CTS_B 0x1b0b1
MX6QDL_PAD_SD4_DAT5__UART2_RTS_B 0x1b0b1
>;
};
pinctrl_uart3: uart3grp {
fsl,pins = <
MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
MX6QDL_PAD_EIM_D23__UART3_CTS_B 0x1b0b1
MX6QDL_PAD_EIM_EB3__UART3_RTS_B 0x1b0b1
>;
};
pinctrl_usbotg: usbotggrp {
fsl,pins = <
MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
>;
};
pinctrl_usdhc1: usdhc1grp {
fsl,pins = <
MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17059
MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10059
MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17059
MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17059
MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17059
MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17059
/* WL_EN */
MX6QDL_PAD_SD3_DAT7__GPIO6_IO17 0x17071
/* WL_IRQ */
MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x17071
>;
};
pinctrl_usdhc1_100mhz: usdhc1grp100mhz {
fsl,pins = <
MX6QDL_PAD_SD1_CMD__SD1_CMD 0x170B9
MX6QDL_PAD_SD1_CLK__SD1_CLK 0x100B9
MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x170B9
MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x170B9
MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x170B9
MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x170B9
>;
};
pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
fsl,pins = <
MX6QDL_PAD_SD1_CMD__SD1_CMD 0x170F9
MX6QDL_PAD_SD1_CLK__SD1_CLK 0x100F9
MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x170F9
MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x170F9
MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x170F9
MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x170F9
>;
};
pinctrl_usdhc2: usdhc2grp {
fsl,pins = <
MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
>;
};
pinctrl_usdhc3: usdhc3grp {
fsl,pins = <
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
>;
};
};
&pcie {
fsl,tx-swing-full = <103>;
fsl,tx-swing-low = <103>;
reset-gpio = <&gpio4 11 GPIO_ACTIVE_LOW>;
status = "disabled";
};
&pwm2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm2>;
status = "disabled";
};
&reg_arm {
vin-supply = <&sw1a_reg>;
};
&reg_pu {
vin-supply = <&sw1c_reg>;
};
&reg_soc {
vin-supply = <&sw1c_reg>;
};
&snvs_poweroff {
status = "okay";
};
&ssi2 {
status = "okay";
};
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1>;
status = "disabled";
};
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart2 &pinctrl_bt>;
uart-has-rtscts;
status = "okay";
bluetooth {
compatible = "ti,wl1835-st";
enable-gpios = <&gpio6 18 GPIO_ACTIVE_HIGH>;
};
};
&uart3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart3>;
uart-has-rtscts;
status = "disabled";
};
&usbh1 {
status = "disabled";
};
&usbotg {
vbus-supply = <&reg_usb_otg_vbus>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usbotg>;
disable-over-current;
status = "disabled";
};
&usdhc1 {
pinctrl-names = "default", "state_100mhz", "state_200mhz";
pinctrl-0 = <&pinctrl_usdhc1>;
pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
bus-width = <4>;
vmmc-supply = <&reg_wl18xx_vmmc>;
non-removable;
wakeup-source;
keep-power-in-suspend;
cap-power-off-card;
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
wlcore: wlcore@2 {
compatible = "ti,wl1835";
reg = <2>;
interrupt-parent = <&gpio6>;
interrupts = <17 IRQ_TYPE_LEVEL_HIGH>;
ref-clock-frequency = <38400000>;
};
};
&usdhc2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc2>;
no-1-8-v;
keep-power-in-suspend;
wakeup-source;
status = "disabled";
};
&usdhc3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc3>;
non-removable;
keep-power-in-suspend;
wakeup-source;
status = "okay";
};
...@@ -21,6 +21,11 @@ reg_eth_phy: regulator-eth-phy { ...@@ -21,6 +21,11 @@ reg_eth_phy: regulator-eth-phy {
}; };
}; };
&hdmi {
ddc-i2c-bus = <&i2c2>;
status = "okay";
};
&i2c3 { &i2c3 {
clock-frequency = <100000>; clock-frequency = <100000>;
pinctrl-names = "default"; pinctrl-names = "default";
......
...@@ -49,6 +49,7 @@ chosen { ...@@ -49,6 +49,7 @@ chosen {
aliases { aliases {
mdio-gpio0 = &mdio1; mdio-gpio0 = &mdio1;
rtc0 = &ds1341;
}; };
mdio1: mdio { mdio1: mdio {
...@@ -501,7 +502,7 @@ eeprom@54 { ...@@ -501,7 +502,7 @@ eeprom@54 {
reg = <0x54>; reg = <0x54>;
}; };
rtc@68 { ds1341: rtc@68 {
compatible = "dallas,ds1341"; compatible = "dallas,ds1341";
reg = <0x68>; reg = <0x68>;
}; };
...@@ -580,6 +581,17 @@ &pcie { ...@@ -580,6 +581,17 @@ &pcie {
pinctrl-0 = <&pinctrl_pcie>; pinctrl-0 = <&pinctrl_pcie>;
reset-gpio = <&gpio7 12 GPIO_ACTIVE_LOW>; reset-gpio = <&gpio7 12 GPIO_ACTIVE_LOW>;
status = "okay"; status = "okay";
host@0 {
reg = <0 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
i210: i210@0 {
reg = <0 0 0 0 0>;
};
};
}; };
&usdhc2 { &usdhc2 {
......
...@@ -80,6 +80,75 @@ osc { ...@@ -80,6 +80,75 @@ osc {
}; };
}; };
tempmon: tempmon {
compatible = "fsl,imx6q-tempmon";
interrupt-parent = <&gpc>;
interrupts = <0 49 IRQ_TYPE_LEVEL_HIGH>;
fsl,tempmon = <&anatop>;
fsl,tempmon-data = <&ocotp>;
clocks = <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
};
ldb: ldb {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,imx6q-ldb", "fsl,imx53-ldb";
gpr = <&gpr>;
status = "disabled";
lvds-channel@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
status = "disabled";
port@0 {
reg = <0>;
lvds0_mux_0: endpoint {
remote-endpoint = <&ipu1_di0_lvds0>;
};
};
port@1 {
reg = <1>;
lvds0_mux_1: endpoint {
remote-endpoint = <&ipu1_di1_lvds0>;
};
};
};
lvds-channel@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
status = "disabled";
port@0 {
reg = <0>;
lvds1_mux_0: endpoint {
remote-endpoint = <&ipu1_di0_lvds1>;
};
};
port@1 {
reg = <1>;
lvds1_mux_1: endpoint {
remote-endpoint = <&ipu1_di1_lvds1>;
};
};
};
};
pmu {
compatible = "arm,cortex-a9-pmu";
interrupt-parent = <&gpc>;
interrupts = <0 94 IRQ_TYPE_LEVEL_HIGH>;
};
soc { soc {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
...@@ -224,11 +293,6 @@ pcie: pcie@1ffc000 { ...@@ -224,11 +293,6 @@ pcie: pcie@1ffc000 {
status = "disabled"; status = "disabled";
}; };
pmu {
compatible = "arm,cortex-a9-pmu";
interrupts = <0 94 IRQ_TYPE_LEVEL_HIGH>;
};
aips-bus@2000000 { /* AIPS1 */ aips-bus@2000000 { /* AIPS1 */
compatible = "fsl,aips-bus", "simple-bus"; compatible = "fsl,aips-bus", "simple-bus";
#address-cells = <1>; #address-cells = <1>;
...@@ -631,8 +695,11 @@ anatop: anatop@20c8000 { ...@@ -631,8 +695,11 @@ anatop: anatop@20c8000 {
interrupts = <0 49 IRQ_TYPE_LEVEL_HIGH>, interrupts = <0 49 IRQ_TYPE_LEVEL_HIGH>,
<0 54 IRQ_TYPE_LEVEL_HIGH>, <0 54 IRQ_TYPE_LEVEL_HIGH>,
<0 127 IRQ_TYPE_LEVEL_HIGH>; <0 127 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
regulator-1p1 { regulator-1p1@20c8110 {
reg = <0x20c8110>;
compatible = "fsl,anatop-regulator"; compatible = "fsl,anatop-regulator";
regulator-name = "vdd1p1"; regulator-name = "vdd1p1";
regulator-min-microvolt = <1000000>; regulator-min-microvolt = <1000000>;
...@@ -647,7 +714,8 @@ regulator-1p1 { ...@@ -647,7 +714,8 @@ regulator-1p1 {
anatop-enable-bit = <0>; anatop-enable-bit = <0>;
}; };
regulator-3p0 { regulator-3p0@20c8120 {
reg = <0x20c8120>;
compatible = "fsl,anatop-regulator"; compatible = "fsl,anatop-regulator";
regulator-name = "vdd3p0"; regulator-name = "vdd3p0";
regulator-min-microvolt = <2800000>; regulator-min-microvolt = <2800000>;
...@@ -662,7 +730,8 @@ regulator-3p0 { ...@@ -662,7 +730,8 @@ regulator-3p0 {
anatop-enable-bit = <0>; anatop-enable-bit = <0>;
}; };
regulator-2p5 { regulator-2p5@20c8130 {
reg = <0x20c8130>;
compatible = "fsl,anatop-regulator"; compatible = "fsl,anatop-regulator";
regulator-name = "vdd2p5"; regulator-name = "vdd2p5";
regulator-min-microvolt = <2250000>; regulator-min-microvolt = <2250000>;
...@@ -677,7 +746,8 @@ regulator-2p5 { ...@@ -677,7 +746,8 @@ regulator-2p5 {
anatop-enable-bit = <0>; anatop-enable-bit = <0>;
}; };
reg_arm: regulator-vddcore { reg_arm: regulator-vddcore@20c8140 {
reg = <0x20c8140>;
compatible = "fsl,anatop-regulator"; compatible = "fsl,anatop-regulator";
regulator-name = "vddarm"; regulator-name = "vddarm";
regulator-min-microvolt = <725000>; regulator-min-microvolt = <725000>;
...@@ -694,7 +764,8 @@ reg_arm: regulator-vddcore { ...@@ -694,7 +764,8 @@ reg_arm: regulator-vddcore {
anatop-max-voltage = <1450000>; anatop-max-voltage = <1450000>;
}; };
reg_pu: regulator-vddpu { reg_pu: regulator-vddpu@20c8140 {
reg = <0x20c8140>;
compatible = "fsl,anatop-regulator"; compatible = "fsl,anatop-regulator";
regulator-name = "vddpu"; regulator-name = "vddpu";
regulator-min-microvolt = <725000>; regulator-min-microvolt = <725000>;
...@@ -711,7 +782,8 @@ reg_pu: regulator-vddpu { ...@@ -711,7 +782,8 @@ reg_pu: regulator-vddpu {
anatop-max-voltage = <1450000>; anatop-max-voltage = <1450000>;
}; };
reg_soc: regulator-vddsoc { reg_soc: regulator-vddsoc@20c8140 {
reg = <0x20c8140>;
compatible = "fsl,anatop-regulator"; compatible = "fsl,anatop-regulator";
regulator-name = "vddsoc"; regulator-name = "vddsoc";
regulator-min-microvolt = <725000>; regulator-min-microvolt = <725000>;
...@@ -729,14 +801,6 @@ reg_soc: regulator-vddsoc { ...@@ -729,14 +801,6 @@ reg_soc: regulator-vddsoc {
}; };
}; };
tempmon: tempmon {
compatible = "fsl,imx6q-tempmon";
interrupts = <0 49 IRQ_TYPE_LEVEL_HIGH>;
fsl,tempmon = <&anatop>;
fsl,tempmon-data = <&ocotp>;
clocks = <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
};
usbphy1: usbphy@20c9000 { usbphy1: usbphy@20c9000 {
compatible = "fsl,imx6q-usbphy", "fsl,imx23-usbphy"; compatible = "fsl,imx6q-usbphy", "fsl,imx23-usbphy";
reg = <0x020c9000 0x1000>; reg = <0x020c9000 0x1000>;
...@@ -773,6 +837,10 @@ snvs_poweroff: snvs-poweroff { ...@@ -773,6 +837,10 @@ snvs_poweroff: snvs-poweroff {
mask = <0x60>; mask = <0x60>;
status = "disabled"; status = "disabled";
}; };
snvs_lpgpr: snvs-lpgpr {
compatible = "fsl,imx6q-snvs-lpgpr";
};
}; };
epit1: epit@20d0000 { /* EPIT1 */ epit1: epit@20d0000 { /* EPIT1 */
...@@ -841,60 +909,6 @@ iomuxc: iomuxc@20e0000 { ...@@ -841,60 +909,6 @@ iomuxc: iomuxc@20e0000 {
reg = <0x20e0000 0x4000>; reg = <0x20e0000 0x4000>;
}; };
ldb: ldb {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,imx6q-ldb", "fsl,imx53-ldb";
gpr = <&gpr>;
status = "disabled";
lvds-channel@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
status = "disabled";
port@0 {
reg = <0>;
lvds0_mux_0: endpoint {
remote-endpoint = <&ipu1_di0_lvds0>;
};
};
port@1 {
reg = <1>;
lvds0_mux_1: endpoint {
remote-endpoint = <&ipu1_di1_lvds0>;
};
};
};
lvds-channel@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
status = "disabled";
port@0 {
reg = <0>;
lvds1_mux_0: endpoint {
remote-endpoint = <&ipu1_di0_lvds1>;
};
};
port@1 {
reg = <1>;
lvds1_mux_1: endpoint {
remote-endpoint = <&ipu1_di1_lvds1>;
};
};
};
};
dcic1: dcic@20e4000 { dcic1: dcic@20e4000 {
reg = <0x020e4000 0x4000>; reg = <0x020e4000 0x4000>;
interrupts = <0 124 IRQ_TYPE_LEVEL_HIGH>; interrupts = <0 124 IRQ_TYPE_LEVEL_HIGH>;
...@@ -1017,6 +1031,7 @@ usbmisc: usbmisc@2184800 { ...@@ -1017,6 +1031,7 @@ usbmisc: usbmisc@2184800 {
fec: ethernet@2188000 { fec: ethernet@2188000 {
compatible = "fsl,imx6q-fec"; compatible = "fsl,imx6q-fec";
reg = <0x02188000 0x4000>; reg = <0x02188000 0x4000>;
interrupt-names = "int0", "pps";
interrupts-extended = interrupts-extended =
<&intc 0 118 IRQ_TYPE_LEVEL_HIGH>, <&intc 0 118 IRQ_TYPE_LEVEL_HIGH>,
<&intc 0 119 IRQ_TYPE_LEVEL_HIGH>; <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
......
...@@ -20,7 +20,7 @@ memory { ...@@ -20,7 +20,7 @@ memory {
reg = <0x80000000 0x40000000>; reg = <0x80000000 0x40000000>;
}; };
backlight { backlight_display: backlight_display {
compatible = "pwm-backlight"; compatible = "pwm-backlight";
pwms = <&pwm1 0 5000000>; pwms = <&pwm1 0 5000000>;
brightness-levels = <0 4 8 16 32 64 128 255>; brightness-levels = <0 4 8 16 32 64 128 255>;
...@@ -39,58 +39,54 @@ user { ...@@ -39,58 +39,54 @@ user {
}; };
}; };
regulators { reg_usb_otg1_vbus: regulator-usb-otg1-vbus {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
reg_usb_otg1_vbus: regulator@0 {
compatible = "regulator-fixed"; compatible = "regulator-fixed";
reg = <0>;
regulator-name = "usb_otg1_vbus"; regulator-name = "usb_otg1_vbus";
regulator-min-microvolt = <5000000>; regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>; regulator-max-microvolt = <5000000>;
gpio = <&gpio4 0 0>; gpio = <&gpio4 0 GPIO_ACTIVE_HIGH>;
enable-active-high; enable-active-high;
vin-supply = <&swbst_reg>; vin-supply = <&swbst_reg>;
}; };
reg_usb_otg2_vbus: regulator@1 { reg_usb_otg2_vbus: regulator-usb-otg2-vbus {
compatible = "regulator-fixed"; compatible = "regulator-fixed";
reg = <1>;
regulator-name = "usb_otg2_vbus"; regulator-name = "usb_otg2_vbus";
regulator-min-microvolt = <5000000>; regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>; regulator-max-microvolt = <5000000>;
gpio = <&gpio4 2 0>; gpio = <&gpio4 2 GPIO_ACTIVE_HIGH>;
enable-active-high; enable-active-high;
vin-supply = <&swbst_reg>; vin-supply = <&swbst_reg>;
}; };
reg_aud3v: regulator@2 { reg_aud3v: regulator-aud3v {
compatible = "regulator-fixed"; compatible = "regulator-fixed";
reg = <2>;
regulator-name = "wm8962-supply-3v15"; regulator-name = "wm8962-supply-3v15";
regulator-min-microvolt = <3150000>; regulator-min-microvolt = <3150000>;
regulator-max-microvolt = <3150000>; regulator-max-microvolt = <3150000>;
regulator-boot-on; regulator-boot-on;
}; };
reg_aud4v: regulator@3 { reg_aud4v: regulator-aud4v {
compatible = "regulator-fixed"; compatible = "regulator-fixed";
reg = <3>;
regulator-name = "wm8962-supply-4v2"; regulator-name = "wm8962-supply-4v2";
regulator-min-microvolt = <4325000>; regulator-min-microvolt = <4325000>;
regulator-max-microvolt = <4325000>; regulator-max-microvolt = <4325000>;
regulator-boot-on; regulator-boot-on;
}; };
reg_lcd_3v3: regulator@4 { reg_lcd_3v3: regulator-lcd-3v3 {
compatible = "regulator-fixed"; compatible = "regulator-fixed";
reg = <4>;
regulator-name = "lcd-3v3"; regulator-name = "lcd-3v3";
gpio = <&gpio4 3 0>; gpio = <&gpio4 3 GPIO_ACTIVE_HIGH>;
enable-active-high; enable-active-high;
}; };
reg_lcd_5v: regulator-lcd-5v {
compatible = "regulator-fixed";
regulator-name = "lcd-5v0";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
}; };
sound { sound {
...@@ -108,6 +104,19 @@ sound { ...@@ -108,6 +104,19 @@ sound {
mux-int-port = <2>; mux-int-port = <2>;
mux-ext-port = <3>; mux-ext-port = <3>;
}; };
panel {
compatible = "sii,43wvf1g";
backlight = <&backlight_display>;
dvdd-supply = <&reg_lcd_3v3>;
avdd-supply = <&reg_lcd_5v>;
port {
panel_in: endpoint {
remote-endpoint = <&display_out>;
};
};
};
}; };
&audmux { &audmux {
...@@ -546,31 +555,11 @@ MATRIX_KEY(0x2, 0x1, KEY_VOLUMEUP) /* ROW2, COL1 */ ...@@ -546,31 +555,11 @@ MATRIX_KEY(0x2, 0x1, KEY_VOLUMEUP) /* ROW2, COL1 */
&lcdif { &lcdif {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lcd>; pinctrl-0 = <&pinctrl_lcd>;
lcd-supply = <&reg_lcd_3v3>;
display = <&display0>;
status = "okay"; status = "okay";
display0: display0 { port {
bits-per-pixel = <32>; display_out: endpoint {
bus-width = <24>; remote-endpoint = <&panel_in>;
display-timings {
native-mode = <&timing0>;
timing0: timing0 {
clock-frequency = <33500000>;
hactive = <800>;
vactive = <480>;
hback-porch = <89>;
hfront-porch = <164>;
vback-porch = <23>;
vfront-porch = <10>;
hsync-len = <10>;
vsync-len = <10>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <1>;
pixelclk-active = <0>;
};
}; };
}; };
}; };
......
...@@ -102,6 +102,21 @@ osc { ...@@ -102,6 +102,21 @@ osc {
}; };
}; };
tempmon: tempmon {
compatible = "fsl,imx6q-tempmon";
interrupts = <0 49 IRQ_TYPE_LEVEL_HIGH>;
interrupt-parent = <&gpc>;
fsl,tempmon = <&anatop>;
fsl,tempmon-data = <&ocotp>;
clocks = <&clks IMX6SL_CLK_PLL3_USB_OTG>;
};
pmu {
compatible = "arm,cortex-a9-pmu";
interrupt-parent = <&gpc>;
interrupts = <0 94 IRQ_TYPE_LEVEL_HIGH>;
};
soc { soc {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
...@@ -125,11 +140,6 @@ L2: l2-cache@a02000 { ...@@ -125,11 +140,6 @@ L2: l2-cache@a02000 {
arm,data-latency = <4 2 3>; arm,data-latency = <4 2 3>;
}; };
pmu {
compatible = "arm,cortex-a9-pmu";
interrupts = <0 94 IRQ_TYPE_LEVEL_HIGH>;
};
aips1: aips-bus@2000000 { aips1: aips-bus@2000000 {
compatible = "fsl,aips-bus", "simple-bus"; compatible = "fsl,aips-bus", "simple-bus";
#address-cells = <1>; #address-cells = <1>;
...@@ -517,8 +527,11 @@ anatop: anatop@20c8000 { ...@@ -517,8 +527,11 @@ anatop: anatop@20c8000 {
interrupts = <0 49 IRQ_TYPE_LEVEL_HIGH>, interrupts = <0 49 IRQ_TYPE_LEVEL_HIGH>,
<0 54 IRQ_TYPE_LEVEL_HIGH>, <0 54 IRQ_TYPE_LEVEL_HIGH>,
<0 127 IRQ_TYPE_LEVEL_HIGH>; <0 127 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
regulator-1p1 { regulator-1p1@20c8110 {
reg = <0x20c8110>;
compatible = "fsl,anatop-regulator"; compatible = "fsl,anatop-regulator";
regulator-name = "vdd1p1"; regulator-name = "vdd1p1";
regulator-min-microvolt = <800000>; regulator-min-microvolt = <800000>;
...@@ -533,7 +546,8 @@ regulator-1p1 { ...@@ -533,7 +546,8 @@ regulator-1p1 {
anatop-enable-bit = <0>; anatop-enable-bit = <0>;
}; };
regulator-3p0 { regulator-3p0@20c8120 {
reg = <0x20c8120>;
compatible = "fsl,anatop-regulator"; compatible = "fsl,anatop-regulator";
regulator-name = "vdd3p0"; regulator-name = "vdd3p0";
regulator-min-microvolt = <2800000>; regulator-min-microvolt = <2800000>;
...@@ -548,7 +562,8 @@ regulator-3p0 { ...@@ -548,7 +562,8 @@ regulator-3p0 {
anatop-enable-bit = <0>; anatop-enable-bit = <0>;
}; };
regulator-2p5 { regulator-2p5@20c8130 {
reg = <0x20c8130>;
compatible = "fsl,anatop-regulator"; compatible = "fsl,anatop-regulator";
regulator-name = "vdd2p5"; regulator-name = "vdd2p5";
regulator-min-microvolt = <2100000>; regulator-min-microvolt = <2100000>;
...@@ -563,7 +578,8 @@ regulator-2p5 { ...@@ -563,7 +578,8 @@ regulator-2p5 {
anatop-enable-bit = <0>; anatop-enable-bit = <0>;
}; };
reg_arm: regulator-vddcore { reg_arm: regulator-vddcore@20c8140 {
reg = <0x20c8140>;
compatible = "fsl,anatop-regulator"; compatible = "fsl,anatop-regulator";
regulator-name = "vddarm"; regulator-name = "vddarm";
regulator-min-microvolt = <725000>; regulator-min-microvolt = <725000>;
...@@ -580,7 +596,8 @@ reg_arm: regulator-vddcore { ...@@ -580,7 +596,8 @@ reg_arm: regulator-vddcore {
anatop-max-voltage = <1450000>; anatop-max-voltage = <1450000>;
}; };
reg_pu: regulator-vddpu { reg_pu: regulator-vddpu@20c8140 {
reg = <0x20c8140>;
compatible = "fsl,anatop-regulator"; compatible = "fsl,anatop-regulator";
regulator-name = "vddpu"; regulator-name = "vddpu";
regulator-min-microvolt = <725000>; regulator-min-microvolt = <725000>;
...@@ -597,7 +614,8 @@ reg_pu: regulator-vddpu { ...@@ -597,7 +614,8 @@ reg_pu: regulator-vddpu {
anatop-max-voltage = <1450000>; anatop-max-voltage = <1450000>;
}; };
reg_soc: regulator-vddsoc { reg_soc: regulator-vddsoc@20c8140 {
reg = <0x20c8140>;
compatible = "fsl,anatop-regulator"; compatible = "fsl,anatop-regulator";
regulator-name = "vddsoc"; regulator-name = "vddsoc";
regulator-min-microvolt = <725000>; regulator-min-microvolt = <725000>;
...@@ -615,14 +633,6 @@ reg_soc: regulator-vddsoc { ...@@ -615,14 +633,6 @@ reg_soc: regulator-vddsoc {
}; };
}; };
tempmon: tempmon {
compatible = "fsl,imx6q-tempmon";
interrupts = <0 49 IRQ_TYPE_LEVEL_HIGH>;
fsl,tempmon = <&anatop>;
fsl,tempmon-data = <&ocotp>;
clocks = <&clks IMX6SL_CLK_PLL3_USB_OTG>;
};
usbphy1: usbphy@20c9000 { usbphy1: usbphy@20c9000 {
compatible = "fsl,imx6sl-usbphy", "fsl,imx23-usbphy"; compatible = "fsl,imx6sl-usbphy", "fsl,imx23-usbphy";
reg = <0x020c9000 0x1000>; reg = <0x020c9000 0x1000>;
......
...@@ -24,7 +24,7 @@ memory { ...@@ -24,7 +24,7 @@ memory {
reg = <0x80000000 0x40000000>; reg = <0x80000000 0x40000000>;
}; };
backlight { backlight_display: backlight-display {
compatible = "pwm-backlight"; compatible = "pwm-backlight";
pwms = <&pwm3 0 5000000>; pwms = <&pwm3 0 5000000>;
brightness-levels = <0 4 8 16 32 64 128 255>; brightness-levels = <0 4 8 16 32 64 128 255>;
...@@ -49,14 +49,8 @@ volume-down { ...@@ -49,14 +49,8 @@ volume-down {
}; };
}; };
regulators { vcc_sd3: regulator-vcc-sd3 {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
vcc_sd3: regulator@0 {
compatible = "regulator-fixed"; compatible = "regulator-fixed";
reg = <0>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_vcc_sd3>; pinctrl-0 = <&pinctrl_vcc_sd3>;
regulator-name = "VCC_SD3"; regulator-name = "VCC_SD3";
...@@ -66,9 +60,8 @@ vcc_sd3: regulator@0 { ...@@ -66,9 +60,8 @@ vcc_sd3: regulator@0 {
enable-active-high; enable-active-high;
}; };
reg_usb_otg1_vbus: regulator@1 { reg_usb_otg1_vbus: regulator-usb-otg1-vbus {
compatible = "regulator-fixed"; compatible = "regulator-fixed";
reg = <1>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usb_otg1>; pinctrl-0 = <&pinctrl_usb_otg1>;
regulator-name = "usb_otg1_vbus"; regulator-name = "usb_otg1_vbus";
...@@ -78,9 +71,8 @@ reg_usb_otg1_vbus: regulator@1 { ...@@ -78,9 +71,8 @@ reg_usb_otg1_vbus: regulator@1 {
enable-active-high; enable-active-high;
}; };
reg_usb_otg2_vbus: regulator@2 { reg_usb_otg2_vbus: regulator-usb-otg2-vbus {
compatible = "regulator-fixed"; compatible = "regulator-fixed";
reg = <2>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usb_otg2>; pinctrl-0 = <&pinctrl_usb_otg2>;
regulator-name = "usb_otg2_vbus"; regulator-name = "usb_otg2_vbus";
...@@ -90,25 +82,22 @@ reg_usb_otg2_vbus: regulator@2 { ...@@ -90,25 +82,22 @@ reg_usb_otg2_vbus: regulator@2 {
enable-active-high; enable-active-high;
}; };
reg_psu_5v: regulator@3 { reg_psu_5v: regulator-psu-5v {
compatible = "regulator-fixed"; compatible = "regulator-fixed";
reg = <3>;
regulator-name = "PSU-5V0"; regulator-name = "PSU-5V0";
regulator-min-microvolt = <5000000>; regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>; regulator-max-microvolt = <5000000>;
}; };
reg_lcd_3v3: regulator@4 { reg_lcd_3v3: regulator-lcd-3v3 {
compatible = "regulator-fixed"; compatible = "regulator-fixed";
reg = <4>;
regulator-name = "lcd-3v3"; regulator-name = "lcd-3v3";
gpio = <&gpio3 27 0>; gpio = <&gpio3 27 0>;
enable-active-high; enable-active-high;
}; };
reg_peri_3v3: regulator@5 { reg_peri_3v3: regulator-peri-3v3 {
compatible = "regulator-fixed"; compatible = "regulator-fixed";
reg = <5>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_peri_3v3>; pinctrl-0 = <&pinctrl_peri_3v3>;
regulator-name = "peri_3v3"; regulator-name = "peri_3v3";
...@@ -119,9 +108,8 @@ reg_peri_3v3: regulator@5 { ...@@ -119,9 +108,8 @@ reg_peri_3v3: regulator@5 {
regulator-always-on; regulator-always-on;
}; };
reg_enet_3v3: regulator@6 { reg_enet_3v3: regulator-enet-3v3 {
compatible = "regulator-fixed"; compatible = "regulator-fixed";
reg = <6>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet_3v3>; pinctrl-0 = <&pinctrl_enet_3v3>;
regulator-name = "enet_3v3"; regulator-name = "enet_3v3";
...@@ -129,6 +117,23 @@ reg_enet_3v3: regulator@6 { ...@@ -129,6 +117,23 @@ reg_enet_3v3: regulator@6 {
regulator-max-microvolt = <3300000>; regulator-max-microvolt = <3300000>;
gpios = <&gpio2 6 GPIO_ACTIVE_LOW>; gpios = <&gpio2 6 GPIO_ACTIVE_LOW>;
}; };
reg_pcie_gpio: regulator-pcie-gpio {
compatible = "regulator-fixed";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pcie_reg>;
regulator-name = "MPCIE_3V3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio2 1 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
reg_lcd_5v: regulator-lcd-5v {
compatible = "regulator-fixed";
regulator-name = "lcd-5v0";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
}; };
sound { sound {
...@@ -146,6 +151,19 @@ sound { ...@@ -146,6 +151,19 @@ sound {
mux-int-port = <2>; mux-int-port = <2>;
mux-ext-port = <6>; mux-ext-port = <6>;
}; };
panel {
compatible = "sii,43wvf1g";
backlight = <&backlight_display>;
dvdd-supply = <&reg_lcd_3v3>;
avdd-supply = <&reg_lcd_5v>;
port {
panel_in: endpoint {
remote-endpoint = <&display_out>;
};
};
};
}; };
&audmux { &audmux {
...@@ -212,34 +230,22 @@ codec: wm8962@1a { ...@@ -212,34 +230,22 @@ codec: wm8962@1a {
}; };
}; };
&pcie {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pcie>;
reset-gpio = <&gpio2 0 GPIO_ACTIVE_LOW>;
vpcie-supply = <&reg_pcie_gpio>;
status = "okay";
};
&lcdif1 { &lcdif1 {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lcd>; pinctrl-0 = <&pinctrl_lcd>;
lcd-supply = <&reg_lcd_3v3>;
display = <&display0>;
status = "okay"; status = "okay";
display0: display0 { port {
bits-per-pixel = <16>; display_out: endpoint {
bus-width = <24>; remote-endpoint = <&panel_in>;
display-timings {
native-mode = <&timing0>;
timing0: timing0 {
clock-frequency = <33500000>;
hactive = <800>;
vactive = <480>;
hback-porch = <89>;
hfront-porch = <164>;
vback-porch = <23>;
vfront-porch = <10>;
hsync-len = <10>;
vsync-len = <10>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <1>;
pixelclk-active = <0>;
};
}; };
}; };
}; };
...@@ -453,6 +459,18 @@ MX6SX_PAD_LCD1_RESET__GPIO3_IO_27 0x4001b0b0 ...@@ -453,6 +459,18 @@ MX6SX_PAD_LCD1_RESET__GPIO3_IO_27 0x4001b0b0
>; >;
}; };
pinctrl_pcie: pciegrp {
fsl,pins = <
MX6SX_PAD_ENET1_COL__GPIO2_IO_0 0x10b0
>;
};
pinctrl_pcie_reg: pciereggrp {
fsl,pins = <
MX6SX_PAD_ENET1_CRS__GPIO2_IO_1 0x10b0
>;
};
pinctrl_peri_3v3: peri3v3grp { pinctrl_peri_3v3: peri3v3grp {
fsl,pins = < fsl,pins = <
MX6SX_PAD_QSPI1A_DATA0__GPIO4_IO_16 0x80000000 MX6SX_PAD_QSPI1A_DATA0__GPIO4_IO_16 0x80000000
......
...@@ -141,18 +141,29 @@ ipp_di1: clock@3 { ...@@ -141,18 +141,29 @@ ipp_di1: clock@3 {
}; };
}; };
soc { tempmon: tempmon {
#address-cells = <1>; compatible = "fsl,imx6sx-tempmon", "fsl,imx6q-tempmon";
#size-cells = <1>;
compatible = "simple-bus";
interrupt-parent = <&gpc>; interrupt-parent = <&gpc>;
ranges; interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
fsl,tempmon = <&anatop>;
nvmem-cells = <&tempmon_calib>, <&tempmon_temp_grade>;
nvmem-cell-names = "calib", "temp_grade";
clocks = <&clks IMX6SX_CLK_PLL3_USB_OTG>;
};
pmu { pmu {
compatible = "arm,cortex-a9-pmu"; compatible = "arm,cortex-a9-pmu";
interrupt-parent = <&gpc>;
interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
}; };
soc {
#address-cells = <1>;
#size-cells = <1>;
compatible = "simple-bus";
interrupt-parent = <&gpc>;
ranges;
ocram: sram@900000 { ocram: sram@900000 {
compatible = "mmio-sram"; compatible = "mmio-sram";
reg = <0x00900000 0x20000>; reg = <0x00900000 0x20000>;
...@@ -574,8 +585,11 @@ anatop: anatop@20c8000 { ...@@ -574,8 +585,11 @@ anatop: anatop@20c8000 {
interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
regulator-1p1 { regulator-1p1@20c8110 {
reg = <0x20c8110>;
compatible = "fsl,anatop-regulator"; compatible = "fsl,anatop-regulator";
regulator-name = "vdd1p1"; regulator-name = "vdd1p1";
regulator-min-microvolt = <800000>; regulator-min-microvolt = <800000>;
...@@ -590,7 +604,8 @@ regulator-1p1 { ...@@ -590,7 +604,8 @@ regulator-1p1 {
anatop-enable-bit = <0>; anatop-enable-bit = <0>;
}; };
regulator-3p0 { regulator-3p0@20c8120 {
reg = <0x20c8120>;
compatible = "fsl,anatop-regulator"; compatible = "fsl,anatop-regulator";
regulator-name = "vdd3p0"; regulator-name = "vdd3p0";
regulator-min-microvolt = <2800000>; regulator-min-microvolt = <2800000>;
...@@ -605,7 +620,8 @@ regulator-3p0 { ...@@ -605,7 +620,8 @@ regulator-3p0 {
anatop-enable-bit = <0>; anatop-enable-bit = <0>;
}; };
regulator-2p5 { regulator-2p5@20c8130 {
reg = <0x20c8130>;
compatible = "fsl,anatop-regulator"; compatible = "fsl,anatop-regulator";
regulator-name = "vdd2p5"; regulator-name = "vdd2p5";
regulator-min-microvolt = <2100000>; regulator-min-microvolt = <2100000>;
...@@ -620,7 +636,8 @@ regulator-2p5 { ...@@ -620,7 +636,8 @@ regulator-2p5 {
anatop-enable-bit = <0>; anatop-enable-bit = <0>;
}; };
reg_arm: regulator-vddcore { reg_arm: regulator-vddcore@20c8140 {
reg = <0x20c8140>;
compatible = "fsl,anatop-regulator"; compatible = "fsl,anatop-regulator";
regulator-name = "vddarm"; regulator-name = "vddarm";
regulator-min-microvolt = <725000>; regulator-min-microvolt = <725000>;
...@@ -637,7 +654,8 @@ reg_arm: regulator-vddcore { ...@@ -637,7 +654,8 @@ reg_arm: regulator-vddcore {
anatop-max-voltage = <1450000>; anatop-max-voltage = <1450000>;
}; };
reg_pcie: regulator-vddpcie { reg_pcie: regulator-vddpcie@20c8140 {
reg = <0x20c8140>;
compatible = "fsl,anatop-regulator"; compatible = "fsl,anatop-regulator";
regulator-name = "vddpcie"; regulator-name = "vddpcie";
regulator-min-microvolt = <725000>; regulator-min-microvolt = <725000>;
...@@ -653,7 +671,8 @@ reg_pcie: regulator-vddpcie { ...@@ -653,7 +671,8 @@ reg_pcie: regulator-vddpcie {
anatop-max-voltage = <1450000>; anatop-max-voltage = <1450000>;
}; };
reg_soc: regulator-vddsoc { reg_soc: regulator-vddsoc@20c8140 {
reg = <0x20c8140>;
compatible = "fsl,anatop-regulator"; compatible = "fsl,anatop-regulator";
regulator-name = "vddsoc"; regulator-name = "vddsoc";
regulator-min-microvolt = <725000>; regulator-min-microvolt = <725000>;
...@@ -671,15 +690,6 @@ reg_soc: regulator-vddsoc { ...@@ -671,15 +690,6 @@ reg_soc: regulator-vddsoc {
}; };
}; };
tempmon: tempmon {
compatible = "fsl,imx6sx-tempmon", "fsl,imx6q-tempmon";
interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
fsl,tempmon = <&anatop>;
nvmem-cells = <&tempmon_calib>, <&tempmon_temp_grade>;
nvmem-cell-names = "calib", "temp_grade";
clocks = <&clks IMX6SX_CLK_PLL3_USB_OTG>;
};
usbphy1: usbphy@20c9000 { usbphy1: usbphy@20c9000 {
compatible = "fsl,imx6sx-usbphy", "fsl,imx23-usbphy"; compatible = "fsl,imx6sx-usbphy", "fsl,imx23-usbphy";
reg = <0x020c9000 0x1000>; reg = <0x020c9000 0x1000>;
...@@ -750,6 +760,19 @@ gpc: gpc@20dc000 { ...@@ -750,6 +760,19 @@ gpc: gpc@20dc000 {
#interrupt-cells = <3>; #interrupt-cells = <3>;
interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
interrupt-parent = <&intc>; interrupt-parent = <&intc>;
clocks = <&clks IMX6SX_CLK_IPG>;
clock-names = "ipg";
pgc {
#address-cells = <1>;
#size-cells = <0>;
pd_pci: power-domain@3 {
reg = <3>;
#power-domain-cells = <0>;
power-supply = <&reg_pcie>;
};
};
}; };
iomuxc: iomuxc@20e0000 { iomuxc: iomuxc@20e0000 {
...@@ -862,6 +885,7 @@ usbmisc: usbmisc@2184800 { ...@@ -862,6 +885,7 @@ usbmisc: usbmisc@2184800 {
fec1: ethernet@2188000 { fec1: ethernet@2188000 {
compatible = "fsl,imx6sx-fec", "fsl,imx6q-fec"; compatible = "fsl,imx6sx-fec", "fsl,imx6q-fec";
reg = <0x02188000 0x4000>; reg = <0x02188000 0x4000>;
interrupt-names = "int0", "pps";
interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>, interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>; <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX6SX_CLK_ENET>, clocks = <&clks IMX6SX_CLK_ENET>,
...@@ -971,6 +995,7 @@ mmdc: mmdc@21b0000 { ...@@ -971,6 +995,7 @@ mmdc: mmdc@21b0000 {
fec2: ethernet@21b4000 { fec2: ethernet@21b4000 {
compatible = "fsl,imx6sx-fec", "fsl,imx6q-fec"; compatible = "fsl,imx6sx-fec", "fsl,imx6q-fec";
reg = <0x021b4000 0x4000>; reg = <0x021b4000 0x4000>;
interrupt-names = "int0", "pps";
interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>, interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>; <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX6SX_CLK_ENET>, clocks = <&clks IMX6SX_CLK_ENET>,
...@@ -1138,7 +1163,7 @@ aips3: aips-bus@2200000 { ...@@ -1138,7 +1163,7 @@ aips3: aips-bus@2200000 {
reg = <0x02200000 0x100000>; reg = <0x02200000 0x100000>;
ranges; ranges;
spba-bus@2200000 { spba-bus@2240000 {
compatible = "fsl,spba-bus", "simple-bus"; compatible = "fsl,spba-bus", "simple-bus";
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
...@@ -1304,25 +1329,29 @@ pwm8: pwm@22b0000 { ...@@ -1304,25 +1329,29 @@ pwm8: pwm@22b0000 {
pcie: pcie@8ffc000 { pcie: pcie@8ffc000 {
compatible = "fsl,imx6sx-pcie", "snps,dw-pcie"; compatible = "fsl,imx6sx-pcie", "snps,dw-pcie";
reg = <0x08ffc000 0x4000>; /* DBI */ reg = <0x08ffc000 0x04000>, <0x08f00000 0x80000>;
reg-names = "dbi", "config";
#address-cells = <3>; #address-cells = <3>;
#size-cells = <2>; #size-cells = <2>;
device_type = "pci"; device_type = "pci";
/* configuration space */
ranges = <0x00000800 0 0x08f00000 0x08f00000 0 0x00080000
/* downstream I/O */
0x81000000 0 0 0x08f80000 0 0x00010000
/* non-prefetchable memory */
0x82000000 0 0x08000000 0x08000000 0 0x00f00000>;
bus-range = <0x00 0xff>; bus-range = <0x00 0xff>;
ranges = <0x81000000 0 0 0x08f80000 0 0x00010000 /* downstream I/O */
0x82000000 0 0x08000000 0x08000000 0 0x00f00000>; /* non-prefetchable memory */
num-lanes = <1>; num-lanes = <1>;
interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX6SX_CLK_PCIE_REF_125M>, interrupt-names = "msi";
<&clks IMX6SX_CLK_PCIE_AXI>, #interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0x7>;
interrupt-map = <0 0 0 1 &gpc GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
<0 0 0 2 &gpc GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
<0 0 0 3 &gpc GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
<0 0 0 4 &gpc GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX6SX_CLK_PCIE_AXI>,
<&clks IMX6SX_CLK_LVDS1_OUT>, <&clks IMX6SX_CLK_LVDS1_OUT>,
<&clks IMX6SX_CLK_PCIE_REF_125M>,
<&clks IMX6SX_CLK_DISPLAY_AXI>; <&clks IMX6SX_CLK_DISPLAY_AXI>;
clock-names = "pcie_ref_125m", "pcie_axi", clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_inbound_axi";
"lvds_gate", "display_axi"; power-domains = <&pd_pci>;
status = "disabled"; status = "disabled";
}; };
}; };
......
...@@ -30,12 +30,8 @@ backlight_display: backlight-display { ...@@ -30,12 +30,8 @@ backlight_display: backlight-display {
status = "okay"; status = "okay";
}; };
regulators {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
reg_sd1_vmmc: sd1_regulator { reg_sd1_vmmc: regulator-sd1-vmmc {
compatible = "regulator-fixed"; compatible = "regulator-fixed";
regulator-name = "VSD_3V3"; regulator-name = "VSD_3V3";
regulator-min-microvolt = <3300000>; regulator-min-microvolt = <3300000>;
...@@ -43,7 +39,6 @@ reg_sd1_vmmc: sd1_regulator { ...@@ -43,7 +39,6 @@ reg_sd1_vmmc: sd1_regulator {
gpio = <&gpio1 9 GPIO_ACTIVE_HIGH>; gpio = <&gpio1 9 GPIO_ACTIVE_HIGH>;
enable-active-high; enable-active-high;
}; };
};
sound { sound {
compatible = "simple-audio-card"; compatible = "simple-audio-card";
......
...@@ -136,19 +136,30 @@ ipp_di1: clock-di1 { ...@@ -136,19 +136,30 @@ ipp_di1: clock-di1 {
clock-output-names = "ipp_di1"; clock-output-names = "ipp_di1";
}; };
soc { tempmon: tempmon {
#address-cells = <1>; compatible = "fsl,imx6ul-tempmon", "fsl,imx6sx-tempmon";
#size-cells = <1>;
compatible = "simple-bus";
interrupt-parent = <&gpc>; interrupt-parent = <&gpc>;
ranges; interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
fsl,tempmon = <&anatop>;
nvmem-cells = <&tempmon_calib>, <&tempmon_temp_grade>;
nvmem-cell-names = "calib", "temp_grade";
clocks = <&clks IMX6UL_CLK_PLL3_USB_OTG>;
};
pmu { pmu {
compatible = "arm,cortex-a7-pmu"; compatible = "arm,cortex-a7-pmu";
interrupt-parent = <&gpc>;
interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled"; status = "disabled";
}; };
soc {
#address-cells = <1>;
#size-cells = <1>;
compatible = "simple-bus";
interrupt-parent = <&gpc>;
ranges;
ocram: sram@900000 { ocram: sram@900000 {
compatible = "mmio-sram"; compatible = "mmio-sram";
reg = <0x00900000 0x20000>; reg = <0x00900000 0x20000>;
...@@ -476,6 +487,7 @@ gpio5: gpio@20ac000 { ...@@ -476,6 +487,7 @@ gpio5: gpio@20ac000 {
fec2: ethernet@20b4000 { fec2: ethernet@20b4000 {
compatible = "fsl,imx6ul-fec", "fsl,imx6q-fec"; compatible = "fsl,imx6ul-fec", "fsl,imx6q-fec";
reg = <0x020b4000 0x4000>; reg = <0x020b4000 0x4000>;
interrupt-names = "int0", "pps";
interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>; <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX6UL_CLK_ENET>, clocks = <&clks IMX6UL_CLK_ENET>,
...@@ -530,8 +542,11 @@ anatop: anatop@20c8000 { ...@@ -530,8 +542,11 @@ anatop: anatop@20c8000 {
interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
reg_3p0: regulator-3p0 { reg_3p0: regulator-3p0@20c8110 {
reg = <0x20c8110>;
compatible = "fsl,anatop-regulator"; compatible = "fsl,anatop-regulator";
regulator-name = "vdd3p0"; regulator-name = "vdd3p0";
regulator-min-microvolt = <2625000>; regulator-min-microvolt = <2625000>;
...@@ -545,7 +560,8 @@ reg_3p0: regulator-3p0 { ...@@ -545,7 +560,8 @@ reg_3p0: regulator-3p0 {
anatop-enable-bit = <0>; anatop-enable-bit = <0>;
}; };
reg_arm: regulator-vddcore { reg_arm: regulator-vddcore@20c8140 {
reg = <0x20c8140>;
compatible = "fsl,anatop-regulator"; compatible = "fsl,anatop-regulator";
regulator-name = "cpu"; regulator-name = "cpu";
regulator-min-microvolt = <725000>; regulator-min-microvolt = <725000>;
...@@ -562,7 +578,8 @@ reg_arm: regulator-vddcore { ...@@ -562,7 +578,8 @@ reg_arm: regulator-vddcore {
anatop-max-voltage = <1450000>; anatop-max-voltage = <1450000>;
}; };
reg_soc: regulator-vddsoc { reg_soc: regulator-vddsoc@20c8140 {
reg = <0x20c8140>;
compatible = "fsl,anatop-regulator"; compatible = "fsl,anatop-regulator";
regulator-name = "vddsoc"; regulator-name = "vddsoc";
regulator-min-microvolt = <725000>; regulator-min-microvolt = <725000>;
...@@ -598,15 +615,6 @@ usbphy2: usbphy@20ca000 { ...@@ -598,15 +615,6 @@ usbphy2: usbphy@20ca000 {
fsl,anatop = <&anatop>; fsl,anatop = <&anatop>;
}; };
tempmon: tempmon {
compatible = "fsl,imx6ul-tempmon", "fsl,imx6sx-tempmon";
interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
fsl,tempmon = <&anatop>;
nvmem-cells = <&tempmon_calib>, <&tempmon_temp_grade>;
nvmem-cell-names = "calib", "temp_grade";
clocks = <&clks IMX6UL_CLK_PLL3_USB_OTG>;
};
snvs: snvs@20cc000 { snvs: snvs@20cc000 {
compatible = "fsl,sec-v4.0-mon", "syscon", "simple-mfd"; compatible = "fsl,sec-v4.0-mon", "syscon", "simple-mfd";
reg = <0x020cc000 0x4000>; reg = <0x020cc000 0x4000>;
...@@ -635,6 +643,10 @@ snvs_pwrkey: snvs-powerkey { ...@@ -635,6 +643,10 @@ snvs_pwrkey: snvs-powerkey {
linux,keycode = <KEY_POWER>; linux,keycode = <KEY_POWER>;
wakeup-source; wakeup-source;
}; };
snvs_lpgpr: snvs-lpgpr {
compatible = "fsl,imx6ul-snvs-lpgpr";
};
}; };
epit1: epit@20d0000 { epit1: epit@20d0000 {
...@@ -784,6 +796,7 @@ usbmisc: usbmisc@2184800 { ...@@ -784,6 +796,7 @@ usbmisc: usbmisc@2184800 {
fec1: ethernet@2188000 { fec1: ethernet@2188000 {
compatible = "fsl,imx6ul-fec", "fsl,imx6q-fec"; compatible = "fsl,imx6ul-fec", "fsl,imx6q-fec";
reg = <0x02188000 0x4000>; reg = <0x02188000 0x4000>;
interrupt-names = "int0", "pps";
interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>, interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>; <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX6UL_CLK_ENET>, clocks = <&clks IMX6UL_CLK_ENET>,
......
...@@ -45,6 +45,13 @@ chosen { ...@@ -45,6 +45,13 @@ chosen {
stdout-path = "serial0:115200n8"; stdout-path = "serial0:115200n8";
}; };
/* fixed crystal dedicated to mpc258x */
clk16m: clk16m {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <16000000>;
};
panel: panel { panel: panel {
compatible = "edt,et057090dhu"; compatible = "edt,et057090dhu";
backlight = <&bl>; backlight = <&bl>;
...@@ -70,6 +77,17 @@ reg_5v0: regulator-5v0 { ...@@ -70,6 +77,17 @@ reg_5v0: regulator-5v0 {
regulator-min-microvolt = <5000000>; regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>; regulator-max-microvolt = <5000000>;
}; };
reg_usbh_vbus: regulator-usbh-vbus {
compatible = "regulator-fixed";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usbh_reg>;
regulator-name = "VCC_USB[1-4]";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio4 7 GPIO_ACTIVE_LOW>;
vin-supply = <&reg_5v0>;
};
}; };
&bl { &bl {
...@@ -88,6 +106,24 @@ &adc2 { ...@@ -88,6 +106,24 @@ &adc2 {
status = "okay"; status = "okay";
}; };
&ecspi3 {
status = "okay";
mcp2515: can@0 {
compatible = "microchip,mcp2515";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_can_int>;
reg = <0>;
clocks = <&clk16m>;
interrupt-parent = <&gpio5>;
interrupts = <2 IRQ_TYPE_EDGE_FALLING>;
spi-max-frequency = <10000000>;
vdd-supply = <&reg_3v3>;
xceiver-supply = <&reg_5v0>;
status = "okay";
};
};
&fec1 { &fec1 {
status = "okay"; status = "okay";
}; };
...@@ -97,7 +133,7 @@ &i2c4 { ...@@ -97,7 +133,7 @@ &i2c4 {
/* M41T0M6 real time clock on carrier board */ /* M41T0M6 real time clock on carrier board */
rtc: m41t0m6@68 { rtc: m41t0m6@68 {
compatible = "st,m41t00"; compatible = "st,m41t0";
reg = <0x68>; reg = <0x68>;
}; };
}; };
...@@ -147,5 +183,6 @@ &usbotg1 { ...@@ -147,5 +183,6 @@ &usbotg1 {
&usdhc1 { &usdhc1 {
keep-power-in-suspend; keep-power-in-suspend;
wakeup-source; wakeup-source;
vmmc-supply = <&reg_3v3>;
status = "okay"; status = "okay";
}; };
...@@ -43,7 +43,10 @@ ...@@ -43,7 +43,10 @@
/ { / {
bl: backlight { bl: backlight {
compatible = "pwm-backlight"; compatible = "pwm-backlight";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_bl_on>;
pwms = <&pwm1 0 5000000 0>; pwms = <&pwm1 0 5000000 0>;
enable-gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
}; };
reg_module_3v3: regulator-module-3v3 { reg_module_3v3: regulator-module-3v3 {
...@@ -86,7 +89,13 @@ &adc2 { ...@@ -86,7 +89,13 @@ &adc2 {
}; };
&cpu0 { &cpu0 {
arm-supply = <&reg_DCDC2>; cpu-supply = <&reg_DCDC2>;
};
&ecspi3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ecspi3 &pinctrl_ecspi3_cs>;
cs-gpios = <&gpio4 11 GPIO_ACTIVE_HIGH>;
}; };
&fec1 { &fec1 {
...@@ -112,7 +121,6 @@ &gpmi { ...@@ -112,7 +121,6 @@ &gpmi {
fsl,use-minimum-ecc; fsl,use-minimum-ecc;
nand-on-flash-bbt; nand-on-flash-bbt;
nand-ecc-mode = "hw"; nand-ecc-mode = "hw";
status = "okay";
}; };
&i2c1 { &i2c1 {
...@@ -299,6 +307,22 @@ &usdhc1 { ...@@ -299,6 +307,22 @@ &usdhc1 {
no-1-8-v; no-1-8-v;
cd-gpios = <&gpio1 0 GPIO_ACTIVE_LOW>; cd-gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
disable-wp; disable-wp;
vqmmc-supply = <&reg_LDO2>;
};
&usdhc3 {
pinctrl-names = "default", "state_100mhz", "state_200mhz";
pinctrl-0 = <&pinctrl_usdhc3>;
pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
assigned-clocks = <&clks IMX7D_USDHC3_ROOT_CLK>;
assigned-clock-rates = <400000000>;
bus-width = <8>;
fsl,tuning-step = <2>;
max-frequency = <100000000>;
vmmc-supply = <&reg_module_3v3>;
vqmmc-supply = <&reg_DCDC3>;
non-removable;
}; };
&iomuxc { &iomuxc {
...@@ -307,17 +331,16 @@ &iomuxc { ...@@ -307,17 +331,16 @@ &iomuxc {
pinctrl_gpio1: gpio1-grp { pinctrl_gpio1: gpio1-grp {
fsl,pins = < fsl,pins = <
MX7D_PAD_ENET1_RGMII_RD3__GPIO7_IO3 0x14 /* SODIMM 55 */ MX7D_PAD_ENET1_RGMII_RD3__GPIO7_IO3 0x74 /* SODIMM 55 */
MX7D_PAD_ENET1_RGMII_RD2__GPIO7_IO2 0x14 /* SODIMM 63 */ MX7D_PAD_ENET1_RGMII_RD2__GPIO7_IO2 0x74 /* SODIMM 63 */
MX7D_PAD_SD1_RESET_B__GPIO5_IO2 0X14 /* SODIMM 73 */ MX7D_PAD_SAI1_RX_SYNC__GPIO6_IO16 0x14 /* SODIMM 77 */
MX7D_PAD_SAI1_RX_SYNC__GPIO6_IO16 0X14 /* SODIMM 77 */
MX7D_PAD_EPDC_DATA09__GPIO2_IO9 0x14 /* SODIMM 89 */ MX7D_PAD_EPDC_DATA09__GPIO2_IO9 0x14 /* SODIMM 89 */
MX7D_PAD_EPDC_DATA08__GPIO2_IO8 0x14 /* SODIMM 91 */ MX7D_PAD_EPDC_DATA08__GPIO2_IO8 0x74 /* SODIMM 91 */
MX7D_PAD_LCD_RESET__GPIO3_IO4 0x14 /* SODIMM 93 */ MX7D_PAD_LCD_RESET__GPIO3_IO4 0x14 /* SODIMM 93 */
MX7D_PAD_EPDC_DATA13__GPIO2_IO13 0x14 /* SODIMM 95 */ MX7D_PAD_EPDC_DATA13__GPIO2_IO13 0x14 /* SODIMM 95 */
MX7D_PAD_ENET1_RGMII_TXC__GPIO7_IO11 0x14 /* SODIMM 99 */ MX7D_PAD_ENET1_RGMII_TXC__GPIO7_IO11 0x14 /* SODIMM 99 */
MX7D_PAD_EPDC_DATA10__GPIO2_IO10 0x14 /* SODIMM 105 */ MX7D_PAD_EPDC_DATA10__GPIO2_IO10 0x74 /* SODIMM 105 */
MX7D_PAD_EPDC_DATA15__GPIO2_IO15 0x14 /* SODIMM 107 */ MX7D_PAD_EPDC_DATA15__GPIO2_IO15 0x74 /* SODIMM 107 */
MX7D_PAD_EPDC_DATA00__GPIO2_IO0 0x14 /* SODIMM 111 */ MX7D_PAD_EPDC_DATA00__GPIO2_IO0 0x14 /* SODIMM 111 */
MX7D_PAD_EPDC_DATA01__GPIO2_IO1 0x14 /* SODIMM 113 */ MX7D_PAD_EPDC_DATA01__GPIO2_IO1 0x14 /* SODIMM 113 */
MX7D_PAD_EPDC_DATA02__GPIO2_IO2 0x14 /* SODIMM 115 */ MX7D_PAD_EPDC_DATA02__GPIO2_IO2 0x14 /* SODIMM 115 */
...@@ -329,11 +352,12 @@ MX7D_PAD_EPDC_DATA07__GPIO2_IO7 0x14 /* SODIMM 125 */ ...@@ -329,11 +352,12 @@ MX7D_PAD_EPDC_DATA07__GPIO2_IO7 0x14 /* SODIMM 125 */
MX7D_PAD_EPDC_SDCE2__GPIO2_IO22 0x14 /* SODIMM 127 */ MX7D_PAD_EPDC_SDCE2__GPIO2_IO22 0x14 /* SODIMM 127 */
MX7D_PAD_UART3_RTS_B__GPIO4_IO6 0x14 /* SODIMM 131 */ MX7D_PAD_UART3_RTS_B__GPIO4_IO6 0x14 /* SODIMM 131 */
MX7D_PAD_EPDC_GDRL__GPIO2_IO26 0x14 /* SODIMM 133 */ MX7D_PAD_EPDC_GDRL__GPIO2_IO26 0x14 /* SODIMM 133 */
MX7D_PAD_SAI1_RX_DATA__GPIO6_IO12 0x14 /* SODIMM 169 */
MX7D_PAD_SAI1_RX_BCLK__GPIO6_IO17 0x14 /* SODIMM 24 */ MX7D_PAD_SAI1_RX_BCLK__GPIO6_IO17 0x14 /* SODIMM 24 */
MX7D_PAD_SD2_DATA2__GPIO5_IO16 0x14 /* SODIMM 100 */ MX7D_PAD_SD2_DATA2__GPIO5_IO16 0x14 /* SODIMM 100 */
MX7D_PAD_SD2_DATA3__GPIO5_IO17 0x14 /* SODIMM 102 */ MX7D_PAD_SD2_DATA3__GPIO5_IO17 0x14 /* SODIMM 102 */
MX7D_PAD_EPDC_GDSP__GPIO2_IO27 0x14 /* SODIMM 104 */ MX7D_PAD_EPDC_GDSP__GPIO2_IO27 0x14 /* SODIMM 104 */
MX7D_PAD_EPDC_BDR0__GPIO2_IO28 0x14 /* SODIMM 106 */ MX7D_PAD_EPDC_BDR0__GPIO2_IO28 0x74 /* SODIMM 106 */
MX7D_PAD_EPDC_BDR1__GPIO2_IO29 0x14 /* SODIMM 110 */ MX7D_PAD_EPDC_BDR1__GPIO2_IO29 0x14 /* SODIMM 110 */
MX7D_PAD_EPDC_PWR_COM__GPIO2_IO30 0x14 /* SODIMM 112 */ MX7D_PAD_EPDC_PWR_COM__GPIO2_IO30 0x14 /* SODIMM 112 */
MX7D_PAD_EPDC_SDCLK__GPIO2_IO16 0x14 /* SODIMM 114 */ MX7D_PAD_EPDC_SDCLK__GPIO2_IO16 0x14 /* SODIMM 114 */
...@@ -357,8 +381,7 @@ MX7D_PAD_SD2_CMD__GPIO5_IO13 0x14 /* SODIMM 186 */ ...@@ -357,8 +381,7 @@ MX7D_PAD_SD2_CMD__GPIO5_IO13 0x14 /* SODIMM 186 */
pinctrl_gpio2: gpio2-grp { /* On X22 Camera interface */ pinctrl_gpio2: gpio2-grp { /* On X22 Camera interface */
fsl,pins = < fsl,pins = <
MX7D_PAD_ECSPI2_SS0__GPIO4_IO23 0x14 /* SODIMM 65 */ MX7D_PAD_ECSPI2_SS0__GPIO4_IO23 0x14 /* SODIMM 65 */
MX7D_PAD_SD1_CD_B__GPIO5_IO0 0x14 /* SODIMM 69 */ MX7D_PAD_SD1_CD_B__GPIO5_IO0 0x74 /* SODIMM 69 */
MX7D_PAD_SD1_WP__GPIO5_IO1 0x14 /* SODIMM 71 */
MX7D_PAD_I2C4_SDA__GPIO4_IO15 0x14 /* SODIMM 75 */ MX7D_PAD_I2C4_SDA__GPIO4_IO15 0x14 /* SODIMM 75 */
MX7D_PAD_ECSPI1_MISO__GPIO4_IO18 0x14 /* SODIMM 79 */ MX7D_PAD_ECSPI1_MISO__GPIO4_IO18 0x14 /* SODIMM 79 */
MX7D_PAD_I2C3_SCL__GPIO4_IO12 0x14 /* SODIMM 81 */ MX7D_PAD_I2C3_SCL__GPIO4_IO12 0x14 /* SODIMM 81 */
...@@ -378,8 +401,8 @@ MX7D_PAD_LCD_DATA18__GPIO3_IO23 0x14 /* SODIMM 136 */ ...@@ -378,8 +401,8 @@ MX7D_PAD_LCD_DATA18__GPIO3_IO23 0x14 /* SODIMM 136 */
MX7D_PAD_LCD_DATA19__GPIO3_IO24 0x14 /* SODIMM 138 */ MX7D_PAD_LCD_DATA19__GPIO3_IO24 0x14 /* SODIMM 138 */
MX7D_PAD_LCD_DATA20__GPIO3_IO25 0x14 /* SODIMM 140 */ MX7D_PAD_LCD_DATA20__GPIO3_IO25 0x14 /* SODIMM 140 */
MX7D_PAD_LCD_DATA21__GPIO3_IO26 0x14 /* SODIMM 142 */ MX7D_PAD_LCD_DATA21__GPIO3_IO26 0x14 /* SODIMM 142 */
MX7D_PAD_LCD_DATA22__GPIO3_IO27 0x14 /* SODIMM 146 */ MX7D_PAD_LCD_DATA22__GPIO3_IO27 0x74 /* SODIMM 144 */
MX7D_PAD_LCD_DATA23__GPIO3_IO28 0x14 /* SODIMM 148 */ MX7D_PAD_LCD_DATA23__GPIO3_IO28 0x74 /* SODIMM 146 */
>; >;
}; };
...@@ -396,6 +419,12 @@ MX7D_PAD_GPIO1_IO13__GPIO1_IO13 0x79 ...@@ -396,6 +419,12 @@ MX7D_PAD_GPIO1_IO13__GPIO1_IO13 0x79
>; >;
}; };
pinctrl_can_int: can-int-grp {
fsl,pins = <
MX7D_PAD_SD1_RESET_B__GPIO5_IO2 0X14 /* SODIMM 73 */
>;
};
pinctrl_enet1: enet1grp { pinctrl_enet1: enet1grp {
fsl,pins = < fsl,pins = <
MX7D_PAD_ENET1_CRS__GPIO7_IO14 0x14 MX7D_PAD_ENET1_CRS__GPIO7_IO14 0x14
...@@ -434,12 +463,17 @@ MX7D_PAD_GPIO1_IO15__FLEXCAN2_TX 0x59 ...@@ -434,12 +463,17 @@ MX7D_PAD_GPIO1_IO15__FLEXCAN2_TX 0x59
>; >;
}; };
pinctrl_gpio_bl_on: gpio-bl-on {
fsl,pins = <
MX7D_PAD_SD1_WP__GPIO5_IO1 0x14 /* SODIMM 71 */
>;
};
pinctrl_gpmi_nand: gpmi-nand-grp { pinctrl_gpmi_nand: gpmi-nand-grp {
fsl,pins = < fsl,pins = <
MX7D_PAD_SD3_CLK__NAND_CLE 0x71 MX7D_PAD_SD3_CLK__NAND_CLE 0x71
MX7D_PAD_SD3_CMD__NAND_ALE 0x71 MX7D_PAD_SD3_CMD__NAND_ALE 0x71
MX7D_PAD_SAI1_TX_BCLK__NAND_CE0_B 0x71 MX7D_PAD_SAI1_TX_BCLK__NAND_CE0_B 0x71
MX7D_PAD_SAI1_RX_DATA__NAND_CE1_B 0x71
MX7D_PAD_SAI1_TX_DATA__NAND_READY_B 0x74 MX7D_PAD_SAI1_TX_DATA__NAND_READY_B 0x74
MX7D_PAD_SD3_STROBE__NAND_RE_B 0x71 MX7D_PAD_SD3_STROBE__NAND_RE_B 0x71
MX7D_PAD_SD3_RESET_B__NAND_WE_B 0x71 MX7D_PAD_SD3_RESET_B__NAND_WE_B 0x71
...@@ -507,6 +541,7 @@ MX7D_PAD_LCD_HSYNC__LCD_HSYNC 0x79 ...@@ -507,6 +541,7 @@ MX7D_PAD_LCD_HSYNC__LCD_HSYNC 0x79
pinctrl_pwm1: pwm1-grp { pinctrl_pwm1: pwm1-grp {
fsl,pins = < fsl,pins = <
MX7D_PAD_GPIO1_IO08__PWM1_OUT 0x79 MX7D_PAD_GPIO1_IO08__PWM1_OUT 0x79
MX7D_PAD_ECSPI2_MOSI__GPIO4_IO21 0x4
>; >;
}; };
...@@ -525,6 +560,7 @@ MX7D_PAD_GPIO1_IO10__PWM3_OUT 0x79 ...@@ -525,6 +560,7 @@ MX7D_PAD_GPIO1_IO10__PWM3_OUT 0x79
pinctrl_pwm4: pwm4-grp { pinctrl_pwm4: pwm4-grp {
fsl,pins = < fsl,pins = <
MX7D_PAD_GPIO1_IO11__PWM4_OUT 0x79 MX7D_PAD_GPIO1_IO11__PWM4_OUT 0x79
MX7D_PAD_ECSPI2_SCLK__GPIO4_IO20 0x4
>; >;
}; };
...@@ -559,7 +595,7 @@ MX7D_PAD_UART3_RX_DATA__UART3_DTE_TX 0x79 ...@@ -559,7 +595,7 @@ MX7D_PAD_UART3_RX_DATA__UART3_DTE_TX 0x79
>; >;
}; };
pinctrl_usbotg2_reg: gpio-usbotg2-vbus { pinctrl_usbh_reg: gpio-usbh-vbus {
fsl,pins = < fsl,pins = <
MX7D_PAD_UART3_CTS_B__GPIO4_IO7 0x14 /* SODIMM 129 USBH PEN */ MX7D_PAD_UART3_CTS_B__GPIO4_IO7 0x14 /* SODIMM 129 USBH PEN */
>; >;
...@@ -576,6 +612,54 @@ MX7D_PAD_SD1_DATA3__SD1_DATA3 0x59 ...@@ -576,6 +612,54 @@ MX7D_PAD_SD1_DATA3__SD1_DATA3 0x59
>; >;
}; };
pinctrl_usdhc3: usdhc3grp {
fsl,pins = <
MX7D_PAD_SD3_CMD__SD3_CMD 0x59
MX7D_PAD_SD3_CLK__SD3_CLK 0x19
MX7D_PAD_SD3_DATA0__SD3_DATA0 0x59
MX7D_PAD_SD3_DATA1__SD3_DATA1 0x59
MX7D_PAD_SD3_DATA2__SD3_DATA2 0x59
MX7D_PAD_SD3_DATA3__SD3_DATA3 0x59
MX7D_PAD_SD3_DATA4__SD3_DATA4 0x59
MX7D_PAD_SD3_DATA5__SD3_DATA5 0x59
MX7D_PAD_SD3_DATA6__SD3_DATA6 0x59
MX7D_PAD_SD3_DATA7__SD3_DATA7 0x59
MX7D_PAD_SD3_STROBE__SD3_STROBE 0x19
>;
};
pinctrl_usdhc3_100mhz: usdhc3grp_100mhz {
fsl,pins = <
MX7D_PAD_SD3_CMD__SD3_CMD 0x5a
MX7D_PAD_SD3_CLK__SD3_CLK 0x1a
MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5a
MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5a
MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5a
MX7D_PAD_SD3_DATA3__SD3_DATA3 0x5a
MX7D_PAD_SD3_DATA4__SD3_DATA4 0x5a
MX7D_PAD_SD3_DATA5__SD3_DATA5 0x5a
MX7D_PAD_SD3_DATA6__SD3_DATA6 0x5a
MX7D_PAD_SD3_DATA7__SD3_DATA7 0x5a
MX7D_PAD_SD3_STROBE__SD3_STROBE 0x1a
>;
};
pinctrl_usdhc3_200mhz: usdhc3grp_200mhz {
fsl,pins = <
MX7D_PAD_SD3_CMD__SD3_CMD 0x5b
MX7D_PAD_SD3_CLK__SD3_CLK 0x1b
MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5b
MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5b
MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5b
MX7D_PAD_SD3_DATA3__SD3_DATA3 0x5b
MX7D_PAD_SD3_DATA4__SD3_DATA4 0x5b
MX7D_PAD_SD3_DATA5__SD3_DATA5 0x5b
MX7D_PAD_SD3_DATA6__SD3_DATA6 0x5b
MX7D_PAD_SD3_DATA7__SD3_DATA7 0x5b
MX7D_PAD_SD3_STROBE__SD3_STROBE 0x1b
>;
};
pinctrl_sai1: sai1-grp { pinctrl_sai1: sai1-grp {
fsl,pins = < fsl,pins = <
MX7D_PAD_ENET1_RX_CLK__SAI1_TX_BCLK 0x1f MX7D_PAD_ENET1_RX_CLK__SAI1_TX_BCLK 0x1f
......
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/*
* Copyright 2017 Toradex AG
*/
/dts-v1/;
#include "imx7d-colibri-emmc.dtsi"
#include "imx7-colibri-eval-v3.dtsi"
/ {
model = "Toradex Colibri iMX7D 1GB (eMMC) on Colibri Evaluation Board V3";
compatible = "toradex,colibri-imx7d-emmc-eval-v3",
"toradex,colibri-imx7d-emmc", "fsl,imx7d";
};
&usbotg2 {
vbus-supply = <&reg_usbh_vbus>;
status = "okay";
};
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/*
* Copyright 2017 Toradex AG
*/
#include "imx7d.dtsi"
#include "imx7-colibri.dtsi"
/ {
memory {
reg = <0x80000000 0x40000000>;
};
};
&usbotg2 {
dr_mode = "host";
};
&usdhc3 {
status = "okay";
};
...@@ -48,20 +48,9 @@ / { ...@@ -48,20 +48,9 @@ / {
model = "Toradex Colibri iMX7D on Colibri Evaluation Board V3"; model = "Toradex Colibri iMX7D on Colibri Evaluation Board V3";
compatible = "toradex,colibri-imx7d-eval-v3", "toradex,colibri-imx7d", compatible = "toradex,colibri-imx7d-eval-v3", "toradex,colibri-imx7d",
"fsl,imx7d"; "fsl,imx7d";
reg_usb_otg2_vbus: regulator-usb-otg2-vbus {
compatible = "regulator-fixed";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usbotg2_reg>;
regulator-name = "VCC_USB[1-4]";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio4 7 GPIO_ACTIVE_LOW>;
vin-supply = <&reg_5v0>;
};
}; };
&usbotg2 { &usbotg2 {
vbus-supply = <&reg_usb_otg2_vbus>; vbus-supply = <&reg_usbh_vbus>;
status = "okay"; status = "okay";
}; };
...@@ -49,6 +49,10 @@ memory { ...@@ -49,6 +49,10 @@ memory {
}; };
}; };
&gpmi {
status = "okay";
};
&usbotg2 { &usbotg2 {
dr_mode = "host"; dr_mode = "host";
}; };
/*
* Copyright 2017 NXP
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
#include "imx7d-pico.dtsi"
/ {
sound {
compatible = "simple-audio-card";
simple-audio-card,name = "imx7-sgtl5000";
simple-audio-card,format = "i2s";
simple-audio-card,bitclock-master = <&dailink_master>;
simple-audio-card,frame-master = <&dailink_master>;
simple-audio-card,cpu {
sound-dai = <&sai1>;
};
dailink_master: simple-audio-card,codec {
sound-dai = <&codec>;
clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_CLK>;
};
};
};
&fec1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet1>;
assigned-clocks = <&clks IMX7D_ENET1_TIME_ROOT_SRC>,
<&clks IMX7D_ENET1_TIME_ROOT_CLK>;
assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>;
assigned-clock-rates = <0>, <100000000>;
phy-mode = "rgmii";
phy-handle = <&ethphy0>;
fsl,magic-packet;
status = "okay";
mdio {
#address-cells = <1>;
#size-cells = <0>;
ethphy0: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <1>;
status = "okay";
};
};
};
&i2c1 {
clock-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c1>;
status = "okay";
codec: sgtl5000@a {
#sound-dai-cells = <0>;
reg = <0x0a>;
compatible = "fsl,sgtl5000";
clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_CLK>;
VDDA-supply = <&reg_2p5v>;
VDDIO-supply = <&reg_vref_1v8>;
};
};
&sai1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sai1>;
assigned-clocks = <&clks IMX7D_SAI1_ROOT_SRC>,
<&clks IMX7D_SAI1_ROOT_CLK>;
assigned-clock-parents = <&clks IMX7D_PLL_AUDIO_POST_DIV>;
assigned-clock-rates = <0>, <24576000>;
status = "okay";
};
&uart5 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart5>;
assigned-clocks = <&clks IMX7D_UART5_ROOT_SRC>;
assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;
status = "okay";
};
&usbotg1 {
vbus-supply = <&reg_usb_otg1_vbus>;
status = "okay";
};
&usbotg2 {
vbus-supply = <&reg_usb_otg2_vbus>;
dr_mode = "host";
status = "okay";
};
&iomuxc {
pinctrl_enet1: enet1grp {
fsl,pins = <
MX7D_PAD_SD2_CD_B__ENET1_MDIO 0x3
MX7D_PAD_SD2_WP__ENET1_MDC 0x3
MX7D_PAD_ENET1_RGMII_TXC__ENET1_RGMII_TXC 0x1
MX7D_PAD_ENET1_RGMII_TD0__ENET1_RGMII_TD0 0x1
MX7D_PAD_ENET1_RGMII_TD1__ENET1_RGMII_TD1 0x1
MX7D_PAD_ENET1_RGMII_TD2__ENET1_RGMII_TD2 0x1
MX7D_PAD_ENET1_RGMII_TD3__ENET1_RGMII_TD3 0x1
MX7D_PAD_ENET1_RGMII_TX_CTL__ENET1_RGMII_TX_CTL 0x1
MX7D_PAD_ENET1_RGMII_RXC__ENET1_RGMII_RXC 0x1
MX7D_PAD_ENET1_RGMII_RD0__ENET1_RGMII_RD0 0x1
MX7D_PAD_ENET1_RGMII_RD1__ENET1_RGMII_RD1 0x1
MX7D_PAD_ENET1_RGMII_RD2__ENET1_RGMII_RD2 0x1
MX7D_PAD_ENET1_RGMII_RD3__ENET1_RGMII_RD3 0x1
MX7D_PAD_ENET1_RGMII_RX_CTL__ENET1_RGMII_RX_CTL 0x1
>;
};
pinctrl_i2c1: i2c1grp {
fsl,pins = <
MX7D_PAD_UART1_TX_DATA__I2C1_SDA 0x4000007f
MX7D_PAD_UART1_RX_DATA__I2C1_SCL 0x4000007f
>;
};
pinctrl_sai1: sai1grp {
fsl,pins = <
MX7D_PAD_ENET1_RX_CLK__SAI1_TX_BCLK 0x1f
MX7D_PAD_ENET1_CRS__SAI1_TX_SYNC 0x1f
MX7D_PAD_ENET1_COL__SAI1_TX_DATA0 0x30
MX7D_PAD_ENET1_TX_CLK__SAI1_RX_DATA0 0x1f
>;
};
pinctrl_uart5: uart5grp {
fsl,pins = <
MX7D_PAD_I2C4_SDA__UART5_DCE_TX 0x79
MX7D_PAD_I2C4_SCL__UART5_DCE_RX 0x79
>;
};
pinctrl_usbotg1_pwr: usbotg_pwr {
fsl,pins = <
MX7D_PAD_UART3_TX_DATA__GPIO4_IO5 0x14
>;
};
};
...@@ -100,62 +100,6 @@ reg_vref_1v8: regulator-vref-1v8 { ...@@ -100,62 +100,6 @@ reg_vref_1v8: regulator-vref-1v8 {
regulator-min-microvolt = <1800000>; regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>; regulator-max-microvolt = <1800000>;
}; };
sound {
compatible = "simple-audio-card";
simple-audio-card,name = "imx7-sgtl5000";
simple-audio-card,format = "i2s";
simple-audio-card,bitclock-master = <&dailink_master>;
simple-audio-card,frame-master = <&dailink_master>;
simple-audio-card,cpu {
sound-dai = <&sai1>;
};
dailink_master: simple-audio-card,codec {
sound-dai = <&codec>;
clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_CLK>;
};
};
};
&fec1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet1>;
assigned-clocks = <&clks IMX7D_ENET1_TIME_ROOT_SRC>,
<&clks IMX7D_ENET1_TIME_ROOT_CLK>;
assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>;
assigned-clock-rates = <0>, <100000000>;
phy-mode = "rgmii";
phy-handle = <&ethphy0>;
fsl,magic-packet;
status = "okay";
mdio {
#address-cells = <1>;
#size-cells = <0>;
ethphy0: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <1>;
status = "okay";
};
};
};
&i2c1 {
clock-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c1>;
status = "okay";
codec: sgtl5000@a {
#sound-dai-cells = <0>;
reg = <0x0a>;
compatible = "fsl,sgtl5000";
clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_CLK>;
VDDA-supply = <&reg_2p5v>;
VDDIO-supply = <&reg_vref_1v8>;
};
}; };
&i2c4 { &i2c4 {
...@@ -253,35 +197,6 @@ vgen6_reg: vldo4 { ...@@ -253,35 +197,6 @@ vgen6_reg: vldo4 {
}; };
}; };
&sai1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sai1>;
assigned-clocks = <&clks IMX7D_SAI1_ROOT_SRC>,
<&clks IMX7D_SAI1_ROOT_CLK>;
assigned-clock-parents = <&clks IMX7D_PLL_AUDIO_POST_DIV>;
assigned-clock-rates = <0>, <24576000>;
status = "okay";
};
&uart5 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart5>;
assigned-clocks = <&clks IMX7D_UART5_ROOT_SRC>;
assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;
status = "okay";
};
&usbotg1 {
vbus-supply = <&reg_usb_otg1_vbus>;
status = "okay";
};
&usbotg2 {
vbus-supply = <&reg_usb_otg2_vbus>;
dr_mode = "host";
status = "okay";
};
&usdhc2 { /* Wifi SDIO */ &usdhc2 { /* Wifi SDIO */
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc2>; pinctrl-0 = <&pinctrl_usdhc2>;
...@@ -315,32 +230,6 @@ &wdog1 { ...@@ -315,32 +230,6 @@ &wdog1 {
}; };
&iomuxc { &iomuxc {
pinctrl_enet1: enet1grp {
fsl,pins = <
MX7D_PAD_SD2_CD_B__ENET1_MDIO 0x3
MX7D_PAD_SD2_WP__ENET1_MDC 0x3
MX7D_PAD_ENET1_RGMII_TXC__ENET1_RGMII_TXC 0x1
MX7D_PAD_ENET1_RGMII_TD0__ENET1_RGMII_TD0 0x1
MX7D_PAD_ENET1_RGMII_TD1__ENET1_RGMII_TD1 0x1
MX7D_PAD_ENET1_RGMII_TD2__ENET1_RGMII_TD2 0x1
MX7D_PAD_ENET1_RGMII_TD3__ENET1_RGMII_TD3 0x1
MX7D_PAD_ENET1_RGMII_TX_CTL__ENET1_RGMII_TX_CTL 0x1
MX7D_PAD_ENET1_RGMII_RXC__ENET1_RGMII_RXC 0x1
MX7D_PAD_ENET1_RGMII_RD0__ENET1_RGMII_RD0 0x1
MX7D_PAD_ENET1_RGMII_RD1__ENET1_RGMII_RD1 0x1
MX7D_PAD_ENET1_RGMII_RD2__ENET1_RGMII_RD2 0x1
MX7D_PAD_ENET1_RGMII_RD3__ENET1_RGMII_RD3 0x1
MX7D_PAD_ENET1_RGMII_RX_CTL__ENET1_RGMII_RX_CTL 0x1
>;
};
pinctrl_i2c1: i2c1grp {
fsl,pins = <
MX7D_PAD_UART1_TX_DATA__I2C1_SDA 0x4000007f
MX7D_PAD_UART1_RX_DATA__I2C1_SCL 0x4000007f
>;
};
pinctrl_i2c4: i2c4grp { pinctrl_i2c4: i2c4grp {
fsl,pins = < fsl,pins = <
MX7D_PAD_SAI1_RX_BCLK__I2C4_SDA 0x4000007f MX7D_PAD_SAI1_RX_BCLK__I2C4_SDA 0x4000007f
...@@ -354,28 +243,6 @@ MX7D_PAD_ECSPI1_SCLK__GPIO4_IO16 0x59 ...@@ -354,28 +243,6 @@ MX7D_PAD_ECSPI1_SCLK__GPIO4_IO16 0x59
>; >;
}; };
pinctrl_sai1: sai1grp {
fsl,pins = <
MX7D_PAD_ENET1_RX_CLK__SAI1_TX_BCLK 0x1f
MX7D_PAD_ENET1_CRS__SAI1_TX_SYNC 0x1f
MX7D_PAD_ENET1_COL__SAI1_TX_DATA0 0x30
MX7D_PAD_ENET1_TX_CLK__SAI1_RX_DATA0 0x1f
>;
};
pinctrl_uart5: uart5grp {
fsl,pins = <
MX7D_PAD_I2C4_SDA__UART5_DCE_TX 0x79
MX7D_PAD_I2C4_SCL__UART5_DCE_RX 0x79
>;
};
pinctrl_usbotg1_pwr: usbotg_pwr {
fsl,pins = <
MX7D_PAD_UART3_TX_DATA__GPIO4_IO5 0x14
>;
};
pinctrl_usdhc2: usdhc2grp { pinctrl_usdhc2: usdhc2grp {
fsl,pins = < fsl,pins = <
MX7D_PAD_SD2_CMD__SD2_CMD 0x59 MX7D_PAD_SD2_CMD__SD2_CMD 0x59
......
...@@ -63,6 +63,13 @@ cpu1: cpu@1 { ...@@ -63,6 +63,13 @@ cpu1: cpu@1 {
}; };
}; };
usbphynop2: usbphynop2 {
compatible = "usb-nop-xceiv";
clocks = <&clks IMX7D_USB_PHY2_CLK>;
clock-names = "main_clk";
#phy-cells = <0>;
};
soc { soc {
etm@3007d000 { etm@3007d000 {
compatible = "arm,coresight-etm3x", "arm,primecell"; compatible = "arm,coresight-etm3x", "arm,primecell";
...@@ -105,18 +112,14 @@ usbmisc2: usbmisc@30b20200 { ...@@ -105,18 +112,14 @@ usbmisc2: usbmisc@30b20200 {
reg = <0x30b20200 0x200>; reg = <0x30b20200 0x200>;
}; };
usbphynop2: usbphynop2 {
compatible = "usb-nop-xceiv";
clocks = <&clks IMX7D_USB_PHY2_CLK>;
clock-names = "main_clk";
};
fec2: ethernet@30bf0000 { fec2: ethernet@30bf0000 {
compatible = "fsl,imx7d-fec", "fsl,imx6sx-fec"; compatible = "fsl,imx7d-fec", "fsl,imx6sx-fec";
reg = <0x30bf0000 0x10000>; reg = <0x30bf0000 0x10000>;
interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>, interrupt-names = "int0", "int1", "int2", "pps";
interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX7D_ENET_AXI_ROOT_CLK>, clocks = <&clks IMX7D_ENET_AXI_ROOT_CLK>,
<&clks IMX7D_ENET_AXI_ROOT_CLK>, <&clks IMX7D_ENET_AXI_ROOT_CLK>,
<&clks IMX7D_ENET2_TIME_ROOT_CLK>, <&clks IMX7D_ENET2_TIME_ROOT_CLK>,
...@@ -129,7 +132,7 @@ fec2: ethernet@30bf0000 { ...@@ -129,7 +132,7 @@ fec2: ethernet@30bf0000 {
status = "disabled"; status = "disabled";
}; };
pcie: pcie@0x33800000 { pcie: pcie@33800000 {
compatible = "fsl,imx7d-pcie", "snps,dw-pcie"; compatible = "fsl,imx7d-pcie", "snps,dw-pcie";
reg = <0x33800000 0x4000>, reg = <0x33800000 0x4000>,
<0x4ff00000 0x80000>; <0x4ff00000 0x80000>;
...@@ -137,6 +140,7 @@ pcie: pcie@0x33800000 { ...@@ -137,6 +140,7 @@ pcie: pcie@0x33800000 {
#address-cells = <3>; #address-cells = <3>;
#size-cells = <2>; #size-cells = <2>;
device_type = "pci"; device_type = "pci";
bus-range = <0x00 0xff>;
ranges = <0x81000000 0 0 0x4ff80000 0 0x00010000 /* downstream I/O */ ranges = <0x81000000 0 0 0x4ff80000 0 0x00010000 /* downstream I/O */
0x82000000 0 0x40000000 0x40000000 0 0x0ff00000>; /* non-prefetchable memory */ 0x82000000 0 0x40000000 0x40000000 0 0x0ff00000>; /* non-prefetchable memory */
num-lanes = <1>; num-lanes = <1>;
......
...@@ -116,6 +116,66 @@ osc: clock-osc { ...@@ -116,6 +116,66 @@ osc: clock-osc {
clock-output-names = "osc"; clock-output-names = "osc";
}; };
usbphynop1: usbphynop1 {
compatible = "usb-nop-xceiv";
clocks = <&clks IMX7D_USB_PHY1_CLK>;
clock-names = "main_clk";
#phy-cells = <0>;
};
usbphynop3: usbphynop3 {
compatible = "usb-nop-xceiv";
clocks = <&clks IMX7D_USB_HSIC_ROOT_CLK>;
clock-names = "main_clk";
#phy-cells = <0>;
};
replicator {
/*
* non-configurable replicators don't show up on the
* AMBA bus. As such no need to add "arm,primecell"
*/
compatible = "arm,coresight-replicator";
ports {
#address-cells = <1>;
#size-cells = <0>;
/* replicator output ports */
port@0 {
reg = <0>;
replicator_out_port0: endpoint {
remote-endpoint = <&tpiu_in_port>;
};
};
port@1 {
reg = <1>;
replicator_out_port1: endpoint {
remote-endpoint = <&etr_in_port>;
};
};
/* replicator input port */
port@2 {
reg = <0>;
replicator_in_port0: endpoint {
slave-mode;
remote-endpoint = <&etf_out_port>;
};
};
};
};
timer {
compatible = "arm,armv7-timer";
interrupt-parent = <&intc>;
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
};
soc { soc {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
...@@ -260,43 +320,6 @@ tpiu_in_port: endpoint { ...@@ -260,43 +320,6 @@ tpiu_in_port: endpoint {
}; };
}; };
replicator {
/*
* non-configurable replicators don't show up on the
* AMBA bus. As such no need to add "arm,primecell"
*/
compatible = "arm,coresight-replicator";
ports {
#address-cells = <1>;
#size-cells = <0>;
/* replicator output ports */
port@0 {
reg = <0>;
replicator_out_port0: endpoint {
remote-endpoint = <&tpiu_in_port>;
};
};
port@1 {
reg = <1>;
replicator_out_port1: endpoint {
remote-endpoint = <&etr_in_port>;
};
};
/* replicator input port */
port@2 {
reg = <0>;
replicator_in_port0: endpoint {
slave-mode;
remote-endpoint = <&etf_out_port>;
};
};
};
};
intc: interrupt-controller@31001000 { intc: interrupt-controller@31001000 {
compatible = "arm,cortex-a7-gic"; compatible = "arm,cortex-a7-gic";
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
...@@ -309,15 +332,6 @@ intc: interrupt-controller@31001000 { ...@@ -309,15 +332,6 @@ intc: interrupt-controller@31001000 {
<0x31006000 0x2000>; <0x31006000 0x2000>;
}; };
timer {
compatible = "arm,armv7-timer";
interrupt-parent = <&intc>;
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
};
aips1: aips-bus@30000000 { aips1: aips-bus@30000000 {
compatible = "fsl,aips-bus", "simple-bus"; compatible = "fsl,aips-bus", "simple-bus";
#address-cells = <1>; #address-cells = <1>;
...@@ -508,8 +522,11 @@ anatop: anatop@30360000 { ...@@ -508,8 +522,11 @@ anatop: anatop@30360000 {
reg = <0x30360000 0x10000>; reg = <0x30360000 0x10000>;
interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>; <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
reg_1p0d: regulator-vdd1p0d { reg_1p0d: regulator-vdd1p0d@30360210 {
reg = <0x30360210>;
compatible = "fsl,anatop-regulator"; compatible = "fsl,anatop-regulator";
regulator-name = "vdd1p0d"; regulator-name = "vdd1p0d";
regulator-min-microvolt = <800000>; regulator-min-microvolt = <800000>;
...@@ -583,9 +600,9 @@ pgc { ...@@ -583,9 +600,9 @@ pgc {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
pgc_pcie_phy: pgc-power-domain@IMX7_POWER_DOMAIN_PCIE_PHY { pgc_pcie_phy: pgc-power-domain@1 {
#power-domain-cells = <0>; #power-domain-cells = <0>;
reg = <IMX7_POWER_DOMAIN_PCIE_PHY>; reg = <1>;
power-supply = <&reg_1p0d>; power-supply = <&reg_1p0d>;
}; };
}; };
...@@ -945,18 +962,6 @@ usbmisc3: usbmisc@30b30200 { ...@@ -945,18 +962,6 @@ usbmisc3: usbmisc@30b30200 {
reg = <0x30b30200 0x200>; reg = <0x30b30200 0x200>;
}; };
usbphynop1: usbphynop1 {
compatible = "usb-nop-xceiv";
clocks = <&clks IMX7D_USB_PHY1_CLK>;
clock-names = "main_clk";
};
usbphynop3: usbphynop3 {
compatible = "usb-nop-xceiv";
clocks = <&clks IMX7D_USB_HSIC_ROOT_CLK>;
clock-names = "main_clk";
};
usdhc1: usdhc@30b40000 { usdhc1: usdhc@30b40000 {
compatible = "fsl,imx7d-usdhc", "fsl,imx6sl-usdhc"; compatible = "fsl,imx7d-usdhc", "fsl,imx6sl-usdhc";
reg = <0x30b40000 0x10000>; reg = <0x30b40000 0x10000>;
...@@ -1007,9 +1012,11 @@ sdma: sdma@30bd0000 { ...@@ -1007,9 +1012,11 @@ sdma: sdma@30bd0000 {
fec1: ethernet@30be0000 { fec1: ethernet@30be0000 {
compatible = "fsl,imx7d-fec", "fsl,imx6sx-fec"; compatible = "fsl,imx7d-fec", "fsl,imx6sx-fec";
reg = <0x30be0000 0x10000>; reg = <0x30be0000 0x10000>;
interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>, interrupt-names = "int0", "int1", "int2", "pps";
interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>; <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX7D_ENET_AXI_ROOT_CLK>, clocks = <&clks IMX7D_ENET_AXI_ROOT_CLK>,
<&clks IMX7D_ENET_AXI_ROOT_CLK>, <&clks IMX7D_ENET_AXI_ROOT_CLK>,
<&clks IMX7D_ENET1_TIME_ROOT_CLK>, <&clks IMX7D_ENET1_TIME_ROOT_CLK>,
......
/*
* Copyright (C) 2017 Moxa Inc. - https://www.moxa.com/
*
* Author: Harry YJ Jhou (周亞諄) <harryyj.jhou@moxa.com>
* Jimmy Chen (陳永達) <jimmy.chen@moxa.com>
* SZ Lin (林上智) <sz.lin@moxa.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include "ls1021a.dtsi"
/ {
model = "Moxa UC-8410A";
aliases {
enet0_rgmii_phy = &rgmii_phy0;
enet1_rgmii_phy = &rgmii_phy1;
enet2_rgmii_phy = &rgmii_phy2;
};
sys_mclk: clock-mclk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <24576000>;
};
reg_3p3v: regulator-3p3v {
compatible = "regulator-fixed";
regulator-name = "3P3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
leds {
compatible = "gpio-leds";
cel-pwr {
label = "UC8410A:CEL-PWR";
gpios = <&gpio3 27 GPIO_ACTIVE_LOW>;
default-state = "off";
};
cel-reset {
label = "UC8410A:CEL-RESET";
gpios = <&gpio3 28 GPIO_ACTIVE_LOW>;
default-state = "off";
};
str-led {
label = "UC8410A:RED:PROG";
gpios = <&gpio0 16 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "mmc0";
};
sw-ready {
label = "UC8410A:GREEN:SWRDY";
gpios = <&gpio0 18 GPIO_ACTIVE_HIGH>;
default-state = "on";
};
beeper {
label = "UC8410A:BEEP";
gpios = <&gpio0 20 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
prog-led0 {
label = "UC8410A:GREEN:PROG2";
gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
prog-led1 {
label = "UC8410A:GREEN:PROG1";
gpios = <&gpio3 15 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
prog-led2 {
label = "UC8410A:GREEN:PROG0";
gpios = <&gpio3 16 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
wifi-signal0 {
label = "UC8410A:GREEN:CEL2";
gpios = <&gpio3 17 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
wifi-signal1 {
label = "UC8410A:GREEN:CEL1";
gpios = <&gpio3 18 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
wifi-signal2 {
label = "UC8410A:GREEN:CEL0";
gpios = <&gpio3 19 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
cpu-diag-red {
label = "UC8410A:RED:DIA";
gpios = <&gpio3 20 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
cpu-diag-green {
label = "UC8410A:GREEN:DIA";
gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
cpu-diag-yellow {
label = "UC8410A:YELLOW:DIA";
gpios = <&gpio3 22 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
};
gpio-keys {
compatible = "gpio-keys";
pushbtn-key {
label = "push button key";
gpios = <&gpio1 21 GPIO_ACTIVE_LOW>;
linux,code = <BTN_MISC>;
default-state = "on";
};
};
};
&enet0 {
phy-handle = <&rgmii_phy0>;
phy-connection-type = "rgmii-id";
status = "okay";
};
&enet1 {
phy-handle = <&rgmii_phy1>;
phy-connection-type = "rgmii-id";
status = "okay";
};
&enet2 {
phy-handle = <&rgmii_phy2>;
phy-connection-type = "rgmii-id";
status = "okay";
};
&i2c0 {
clock-frequency = <100000>;
status = "okay";
tpm@20 {
compatible = "infineon,slb9635tt";
reg = <0x20>;
};
rtc@68 {
compatible = "dallas,ds1374";
reg = <0x68>;
};
};
&lpuart0 {
status = "okay";
};
&mdio0 {
rgmii_phy0: ethernet-phy@0 {
compatible = "marvell,88e1118";
reg = <0x0>;
marvell,reg-init =
<3 0x11 0 0x4415>, /* Reg 3,17 */
<3 0x10 0 0x77>; /* Reg 3,16 */
};
rgmii_phy1: ethernet-phy@1 {
compatible = "marvell,88e1118";
reg = <0x1>;
marvell,reg-init =
<3 0x11 0 0x4415>, /* Reg 3,17 */
<3 0x10 0 0x77>; /* Reg 3,16 */
};
rgmii_phy2: ethernet-phy@2 {
compatible = "marvell,88e1118";
reg = <0x2>;
marvell,reg-init =
<3 0x11 0 0x4415>, /* Reg 3,17 */
<3 0x10 0 0x77>; /* Reg 3,16 */
};
};
&qspi {
bus-num = <0>;
fsl,spi-num-chipselects = <2>;
fsl,spi-flash-chipselects = <0>;
fsl,qspi-has-second-chip;
status = "okay";
flash: flash@0 {
compatible = "spansion,s25fl064l", "spansion,s25fl164k";
#address-cells = <1>;
#size-cells = <1>;
spi-max-frequency = <20000000>;
reg = <0>;
partitions@0 {
label = "U-Boot";
reg = <0x0 0x180000>;
};
partitions@180000 {
label = "U-Boot Env";
reg = <0x180000 0x680000>;
};
};
};
&sata {
status = "okay";
};
&uart0 {
status = "okay";
};
&uart1 {
status = "okay";
};
...@@ -215,7 +215,7 @@ codec: sgtl5000@2a { ...@@ -215,7 +215,7 @@ codec: sgtl5000@2a {
reg = <0x2a>; reg = <0x2a>;
VDDA-supply = <&reg_3p3v>; VDDA-supply = <&reg_3p3v>;
VDDIO-supply = <&reg_3p3v>; VDDIO-supply = <&reg_3p3v>;
clocks = <&sys_mclk 1>; clocks = <&sys_mclk>;
}; };
}; };
}; };
...@@ -239,6 +239,11 @@ nor@0,0 { ...@@ -239,6 +239,11 @@ nor@0,0 {
device-width = <1>; device-width = <1>;
}; };
nand@2,0 {
compatible = "fsl,ifc-nand";
reg = <0x2 0x0 0x10000>;
};
fpga: board-control@3,0 { fpga: board-control@3,0 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
......
...@@ -187,7 +187,7 @@ codec: sgtl5000@a { ...@@ -187,7 +187,7 @@ codec: sgtl5000@a {
reg = <0x0a>; reg = <0x0a>;
VDDA-supply = <&reg_3p3v>; VDDA-supply = <&reg_3p3v>;
VDDIO-supply = <&reg_3p3v>; VDDIO-supply = <&reg_3p3v>;
clocks = <&sys_mclk 1>; clocks = <&sys_mclk>;
}; };
}; };
...@@ -228,6 +228,10 @@ tbi1: tbi-phy@1f { ...@@ -228,6 +228,10 @@ tbi1: tbi-phy@1f {
}; };
}; };
&esdhc {
status = "okay";
};
&sai1 { &sai1 {
status = "okay"; status = "okay";
}; };
......
...@@ -106,6 +106,14 @@ pmu { ...@@ -106,6 +106,14 @@ pmu {
compatible = "arm,cortex-a7-pmu"; compatible = "arm,cortex-a7-pmu";
interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>, interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>; <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
interrupt-affinity = <&cpu0>, <&cpu1>;
};
reboot {
compatible = "syscon-reboot";
regmap = <&dcfg>;
offset = <0xb0>;
mask = <0x02>;
}; };
soc { soc {
...@@ -154,8 +162,22 @@ dcfg: dcfg@1ee0000 { ...@@ -154,8 +162,22 @@ dcfg: dcfg@1ee0000 {
big-endian; big-endian;
}; };
qspi: quadspi@1550000 {
compatible = "fsl,ls1021a-qspi";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x0 0x1550000 0x0 0x10000>,
<0x0 0x40000000 0x0 0x40000000>;
reg-names = "QuadSPI", "QuadSPI-memory";
interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "qspi_en", "qspi";
clocks = <&clockgen 4 1>, <&clockgen 4 1>;
big-endian;
status = "disabled";
};
esdhc: esdhc@1560000 { esdhc: esdhc@1560000 {
compatible = "fsl,esdhc"; compatible = "fsl,ls1021a-esdhc", "fsl,esdhc";
reg = <0x0 0x1560000 0x0 0x10000>; reg = <0x0 0x1560000 0x0 0x10000>;
interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
clock-frequency = <0>; clock-frequency = <0>;
...@@ -575,7 +597,7 @@ ptp_clock@2d10e00 { ...@@ -575,7 +597,7 @@ ptp_clock@2d10e00 {
fsl,tclk-period = <5>; fsl,tclk-period = <5>;
fsl,tmr-prsc = <2>; fsl,tmr-prsc = <2>;
fsl,tmr-add = <0xaaaaaaab>; fsl,tmr-add = <0xaaaaaaab>;
fsl,tmr-fiper1 = <999999990>; fsl,tmr-fiper1 = <999999995>;
fsl,tmr-fiper2 = <99990>; fsl,tmr-fiper2 = <99990>;
fsl,max-adj = <499999999>; fsl,max-adj = <499999999>;
}; };
...@@ -668,7 +690,7 @@ queue-group@2d94000 { ...@@ -668,7 +690,7 @@ queue-group@2d94000 {
}; };
}; };
usb@8600000 { usb2: usb@8600000 {
compatible = "fsl-usb2-dr-v2.5", "fsl-usb2-dr"; compatible = "fsl-usb2-dr-v2.5", "fsl-usb2-dr";
reg = <0x0 0x8600000 0x0 0x1000>; reg = <0x0 0x8600000 0x0 0x1000>;
interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
...@@ -676,7 +698,7 @@ usb@8600000 { ...@@ -676,7 +698,7 @@ usb@8600000 {
phy_type = "ulpi"; phy_type = "ulpi";
}; };
usb3@3100000 { usb3: usb3@3100000 {
compatible = "snps,dwc3"; compatible = "snps,dwc3";
reg = <0x0 0x3100000 0x0 0x10000>; reg = <0x0 0x3100000 0x0 0x10000>;
interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
......
...@@ -140,7 +140,7 @@ &i2c0 { ...@@ -140,7 +140,7 @@ &i2c0 {
/* M41T0M6 real time clock on carrier board */ /* M41T0M6 real time clock on carrier board */
rtc: m41t0m6@68 { rtc: m41t0m6@68 {
compatible = "st,m41t00"; compatible = "st,m41t0";
reg = <0x68>; reg = <0x68>;
}; };
}; };
......
...@@ -58,7 +58,7 @@ a5_cpu: cpu@0 { ...@@ -58,7 +58,7 @@ a5_cpu: cpu@0 {
soc { soc {
aips-bus@40000000 { aips-bus@40000000 {
intc: interrupt-controller@40002000 { intc: interrupt-controller@40003000 {
compatible = "arm,cortex-a9-gic"; compatible = "arm,cortex-a9-gic";
#interrupt-cells = <3>; #interrupt-cells = <3>;
interrupt-controller; interrupt-controller;
......
...@@ -255,16 +255,19 @@ ports { ...@@ -255,16 +255,19 @@ ports {
port@0 { port@0 {
reg = <0>; reg = <0>;
label = "lan6"; label = "lan6";
phy-handle = <&switch2phy0>;
}; };
port@1 { port@1 {
reg = <1>; reg = <1>;
label = "lan7"; label = "lan7";
phy-handle = <&switch2phy1>;
}; };
port@2 { port@2 {
reg = <2>; reg = <2>;
label = "lan8"; label = "lan8";
phy-handle = <&switch2phy2>;
}; };
port@3 { port@3 {
...@@ -304,6 +307,20 @@ fixed-link { ...@@ -304,6 +307,20 @@ fixed-link {
}; };
}; };
}; };
mdio {
#address-cells = <1>;
#size-cells = <0>;
switch2phy0: phy@0 {
reg = <0>;
};
switch2phy1: phy@1 {
reg = <1>;
};
switch2phy2: phy@2 {
reg = <2>;
};
};
}; };
}; };
...@@ -371,7 +388,8 @@ gpio6: pca9554@22 { ...@@ -371,7 +388,8 @@ gpio6: pca9554@22 {
reg = <0x22>; reg = <0x22>;
gpio-controller; gpio-controller;
#gpio-cells = <2>; #gpio-cells = <2>;
interrupt-parent = <&gpio2>; interrupt-controller;
interrupt-parent = <&gpio3>;
interrupts = <2 IRQ_TYPE_LEVEL_LOW>; interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
}; };
}; };
......
...@@ -73,7 +73,7 @@ switch0: switch@0 { ...@@ -73,7 +73,7 @@ switch0: switch@0 {
#size-cells = <0>; #size-cells = <0>;
reg = <0>; reg = <0>;
dsa,member = <0 0>; dsa,member = <0 0>;
eeprom-length = <512>; eeprom-length = <65536>;
interrupt-parent = <&gpio0>; interrupt-parent = <&gpio0>;
interrupts = <27 IRQ_TYPE_LEVEL_LOW>; interrupts = <27 IRQ_TYPE_LEVEL_LOW>;
interrupt-controller; interrupt-controller;
...@@ -170,7 +170,7 @@ switch1: switch@0 { ...@@ -170,7 +170,7 @@ switch1: switch@0 {
#size-cells = <0>; #size-cells = <0>;
reg = <0>; reg = <0>;
dsa,member = <0 1>; dsa,member = <0 1>;
eeprom-length = <512>; eeprom-length = <65536>;
interrupt-parent = <&gpio0>; interrupt-parent = <&gpio0>;
interrupts = <26 IRQ_TYPE_LEVEL_LOW>; interrupts = <26 IRQ_TYPE_LEVEL_LOW>;
interrupt-controller; interrupt-controller;
......
...@@ -96,6 +96,10 @@ &edma0 { ...@@ -96,6 +96,10 @@ &edma0 {
status = "okay"; status = "okay";
}; };
&edma1 {
status = "okay";
};
&esdhc1 { &esdhc1 {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_esdhc1>; pinctrl-0 = <&pinctrl_esdhc1>;
......
...@@ -84,6 +84,11 @@ reboot: syscon-reboot { ...@@ -84,6 +84,11 @@ reboot: syscon-reboot {
mask = <0x1000>; mask = <0x1000>;
}; };
iio-hwmon {
compatible = "iio-hwmon";
io-channels = <&adc0 16>, <&adc1 16>;
};
soc { soc {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
...@@ -762,10 +767,5 @@ i2c3: i2c@400e7000 { ...@@ -762,10 +767,5 @@ i2c3: i2c@400e7000 {
status = "disabled"; status = "disabled";
}; };
}; };
iio-hwmon {
compatible = "iio-hwmon";
io-channels = <&adc0 16>, <&adc1 16>;
};
}; };
}; };
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