Commit 86c25466 authored by Noam Camus's avatar Noam Camus Committed by Vineet Gupta

ARC: [plat-eznps] Use dedicated identity auxiliary register.

With generic "identity" num of CPUs is limited to 256 (8 bit).
We use our alternative AUX register GLOBAL_ID (12 bit).
Now we can support up to 4096 CPUs.
Signed-off-by: default avatarNoam Camus <noamc@ezchip.com>
parent b1f2f6f3
...@@ -36,6 +36,10 @@ ...@@ -36,6 +36,10 @@
#include <asm/irqflags-compact.h> #include <asm/irqflags-compact.h>
#include <asm/thread_info.h> /* For THREAD_SIZE */ #include <asm/thread_info.h> /* For THREAD_SIZE */
#ifdef CONFIG_ARC_PLAT_EZNPS
#include <plat/ctop.h>
#endif
/*-------------------------------------------------------------- /*--------------------------------------------------------------
* Switch to Kernel Mode stack if SP points to User Mode stack * Switch to Kernel Mode stack if SP points to User Mode stack
* *
...@@ -296,11 +300,13 @@ ...@@ -296,11 +300,13 @@
bic \reg, sp, (THREAD_SIZE - 1) bic \reg, sp, (THREAD_SIZE - 1)
.endm .endm
#ifndef CONFIG_ARC_PLAT_EZNPS
/* Get CPU-ID of this core */ /* Get CPU-ID of this core */
.macro GET_CPU_ID reg .macro GET_CPU_ID reg
lr \reg, [identity] lr \reg, [identity]
lsr \reg, \reg, 8 lsr \reg, \reg, 8
bmsk \reg, \reg, 7 bmsk \reg, \reg, 7
.endm .endm
#endif
#endif /* __ASM_ARC_ENTRY_COMPACT_H */ #endif /* __ASM_ARC_ENTRY_COMPACT_H */
...@@ -16,6 +16,9 @@ ...@@ -16,6 +16,9 @@
#include <asm/asm-offsets.h> #include <asm/asm-offsets.h>
#include <linux/sched.h> #include <linux/sched.h>
#ifdef CONFIG_ARC_PLAT_EZNPS
#include <plat/ctop.h>
#endif
#define KSP_WORD_OFF ((TASK_THREAD + THREAD_KSP) / 4) #define KSP_WORD_OFF ((TASK_THREAD + THREAD_KSP) / 4)
...@@ -66,10 +69,17 @@ __switch_to(struct task_struct *prev_task, struct task_struct *next_task) ...@@ -66,10 +69,17 @@ __switch_to(struct task_struct *prev_task, struct task_struct *next_task)
*/ */
#ifndef CONFIG_SMP #ifndef CONFIG_SMP
"st %2, [@_current_task] \n\t" "st %2, [@_current_task] \n\t"
#else
#ifdef CONFIG_ARC_PLAT_EZNPS
"lr r24, [%4] \n\t"
#ifndef CONFIG_EZNPS_MTM_EXT
"lsr r24, r24, 4 \n\t"
#endif
#else #else
"lr r24, [identity] \n\t" "lr r24, [identity] \n\t"
"lsr r24, r24, 8 \n\t" "lsr r24, r24, 8 \n\t"
"bmsk r24, r24, 7 \n\t" "bmsk r24, r24, 7 \n\t"
#endif
"add2 r24, @_current_task, r24 \n\t" "add2 r24, @_current_task, r24 \n\t"
"st %2, [r24] \n\t" "st %2, [r24] \n\t"
#endif #endif
...@@ -107,6 +117,9 @@ __switch_to(struct task_struct *prev_task, struct task_struct *next_task) ...@@ -107,6 +117,9 @@ __switch_to(struct task_struct *prev_task, struct task_struct *next_task)
: "=r"(tmp) : "=r"(tmp)
: "n"(KSP_WORD_OFF), "r"(next), "r"(prev) : "n"(KSP_WORD_OFF), "r"(next), "r"(prev)
#ifdef CONFIG_ARC_PLAT_EZNPS
, "i"(CTOP_AUX_LOGIC_GLOBAL_ID)
#endif
: "blink" : "blink"
); );
......
...@@ -195,6 +195,15 @@ struct nps_host_reg_aux_lpc { ...@@ -195,6 +195,15 @@ struct nps_host_reg_aux_lpc {
#define REG_GIM_P_INT_DST_25 nps_host_reg_non_cl(NPS_GIM_BLKID, 0x149) #define REG_GIM_P_INT_DST_25 nps_host_reg_non_cl(NPS_GIM_BLKID, 0x149)
#define REG_GIM_P_INT_DST_26 nps_host_reg_non_cl(NPS_GIM_BLKID, 0x14A) #define REG_GIM_P_INT_DST_26 nps_host_reg_non_cl(NPS_GIM_BLKID, 0x14A)
#else
.macro GET_CPU_ID reg
lr \reg, [CTOP_AUX_LOGIC_GLOBAL_ID]
#ifndef CONFIG_EZNPS_MTM_EXT
lsr \reg, \reg, 4
#endif
.endm
#endif /* __ASSEMBLY__ */ #endif /* __ASSEMBLY__ */
#endif /* _PLAT_EZNPS_CTOP_H */ #endif /* _PLAT_EZNPS_CTOP_H */
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