Commit 9b05706a authored by Arnd Bergmann's avatar Arnd Bergmann

score: make irq.h definitions local

Some internal definitions of the interrupt controller are
only needed in irq.c, so move them out of the global irq.h
header. Also add proper __iomem annotations for sparse.
Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parent c6067472
...@@ -18,16 +18,6 @@ ...@@ -18,16 +18,6 @@
#define irq_canonicalize(irq) (irq) #define irq_canonicalize(irq) (irq)
#define P_INT_PNDL 0x95F50000
#define P_INT_PNDH 0x95F50004
#define P_INT_PRIORITY_M 0x95F50008
#define P_INT_PRIORITY_SG0 0x95F50010
#define P_INT_PRIORITY_SG1 0x95F50014
#define P_INT_PRIORITY_SG2 0x95F50018
#define P_INT_PRIORITY_SG3 0x95F5001C
#define P_INT_MASKL 0x95F50020
#define P_INT_MASKH 0x95F50024
#define IRQ_TIMER (7) /* Timer IRQ number of SPCT6600 */ #define IRQ_TIMER (7) /* Timer IRQ number of SPCT6600 */
#endif /* _ASM_SCORE_IRQ_H */ #endif /* _ASM_SCORE_IRQ_H */
...@@ -29,6 +29,19 @@ ...@@ -29,6 +29,19 @@
#include <asm/io.h> #include <asm/io.h>
/* the interrupt controller is hardcoded at this address */
#define SCORE_PIC ((u32 __iomem __force *)0x95F50000)
#define INT_PNDL 0
#define INT_PNDH 1
#define INT_PRIORITY_M 2
#define INT_PRIORITY_SG0 4
#define INT_PRIORITY_SG1 5
#define INT_PRIORITY_SG2 6
#define INT_PRIORITY_SG3 7
#define INT_MASKL 8
#define INT_MASKH 9
/* /*
* handles all normal device IRQs * handles all normal device IRQs
*/ */
...@@ -44,11 +57,11 @@ static void score_mask(unsigned int irq_nr) ...@@ -44,11 +57,11 @@ static void score_mask(unsigned int irq_nr)
unsigned int irq_source = 63 - irq_nr; unsigned int irq_source = 63 - irq_nr;
if (irq_source < 32) if (irq_source < 32)
__raw_writel((__raw_readl((void *)P_INT_MASKL) | \ __raw_writel((__raw_readl(SCORE_PIC + INT_MASKL) | \
(1 << irq_source)), (void *)P_INT_MASKL); (1 << irq_source)), SCORE_PIC + INT_MASKL);
else else
__raw_writel((__raw_readl((void *)P_INT_MASKH) | \ __raw_writel((__raw_readl(SCORE_PIC + INT_MASKH) | \
(1 << (irq_source - 32))), (void *)P_INT_MASKH); (1 << (irq_source - 32))), SCORE_PIC + INT_MASKH);
} }
static void score_unmask(unsigned int irq_nr) static void score_unmask(unsigned int irq_nr)
...@@ -56,11 +69,11 @@ static void score_unmask(unsigned int irq_nr) ...@@ -56,11 +69,11 @@ static void score_unmask(unsigned int irq_nr)
unsigned int irq_source = 63 - irq_nr; unsigned int irq_source = 63 - irq_nr;
if (irq_source < 32) if (irq_source < 32)
__raw_writel((__raw_readl((void *)P_INT_MASKL) & \ __raw_writel((__raw_readl(SCORE_PIC + INT_MASKL) & \
~(1 << irq_source)), (void *)P_INT_MASKL); ~(1 << irq_source)), SCORE_PIC + INT_MASKL);
else else
__raw_writel((__raw_readl((void *)P_INT_MASKH) & \ __raw_writel((__raw_readl(SCORE_PIC + INT_MASKH) & \
~(1 << (irq_source - 32))), (void *)P_INT_MASKH); ~(1 << (irq_source - 32))), SCORE_PIC + INT_MASKH);
} }
struct irq_chip score_irq_chip = { struct irq_chip score_irq_chip = {
...@@ -88,8 +101,8 @@ void __init init_IRQ(void) ...@@ -88,8 +101,8 @@ void __init init_IRQ(void)
memcpy((void *)target_addr, \ memcpy((void *)target_addr, \
interrupt_exception_vector, IRQ_VECTOR_SIZE); interrupt_exception_vector, IRQ_VECTOR_SIZE);
__raw_writel(0xffffffff, (void *)P_INT_MASKL); __raw_writel(0xffffffff, SCORE_PIC + INT_MASKL);
__raw_writel(0xffffffff, (void *)P_INT_MASKH); __raw_writel(0xffffffff, SCORE_PIC + INT_MASKH);
__asm__ __volatile__( __asm__ __volatile__(
"mtcr %0, cr3\n\t" "mtcr %0, cr3\n\t"
......
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